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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-09-01 17:07:37 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-09-05 12:02:31 -0400
commite8a91c953fca683ef9a9335fb00d6eb3e49ac1ee (patch)
tree7a9c2ef4b9c25f137e2fb97d36e0248ee24c6ec4 /arch/arm/mach-omap2
parentd592dd1adc4f57171fa2570a94279d887b78d5b5 (diff)
[ARM] omap: Fix IO_ADDRESS() macros
OMAP1_IO_ADDRESS(), OMAP2_IO_ADDRESS() and IO_ADDRESS() returns cookies for use with __raw_{read|write}* for accessing registers. Therefore, these macros should return (void __iomem *) cookies, not integer values. Doing this improves typechecking, and means we can find those places where, eg, DMA controllers are incorrectly given virtual addresses to DMA to, or physical addresses are thrown through a virtual to physical address translation. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/cm.h2
-rw-r--r--arch/arm/mach-omap2/gpmc.c6
-rw-r--r--arch/arm/mach-omap2/id.c6
-rw-r--r--arch/arm/mach-omap2/irq.c4
-rw-r--r--arch/arm/mach-omap2/prm.h2
-rw-r--r--arch/arm/mach-omap2/serial.c14
6 files changed, 16 insertions, 18 deletions
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index 87a44c715aa4..65fdf78c91e1 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -18,7 +18,7 @@
18 18
19#ifndef __ASSEMBLER__ 19#ifndef __ASSEMBLER__
20#define OMAP_CM_REGADDR(module, reg) \ 20#define OMAP_CM_REGADDR(module, reg) \
21 (void __iomem *)IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg)) 21 IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg))
22#else 22#else
23#define OMAP2420_CM_REGADDR(module, reg) \ 23#define OMAP2420_CM_REGADDR(module, reg) \
24 IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) 24 IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index f51d69bc457d..9b4e58ee2ca2 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -64,10 +64,8 @@ static struct resource gpmc_cs_mem[GPMC_CS_NUM];
64static DEFINE_SPINLOCK(gpmc_mem_lock); 64static DEFINE_SPINLOCK(gpmc_mem_lock);
65static unsigned gpmc_cs_map; 65static unsigned gpmc_cs_map;
66 66
67static void __iomem *gpmc_base = 67static void __iomem *gpmc_base = IO_ADDRESS(GPMC_BASE);
68 (void __iomem *) IO_ADDRESS(GPMC_BASE); 68static void __iomem *gpmc_cs_base = IO_ADDRESS(GPMC_BASE) + GPMC_CS0;
69static void __iomem *gpmc_cs_base =
70 (void __iomem *) IO_ADDRESS(GPMC_BASE) + GPMC_CS0;
71 69
72static struct clk *gpmc_fck; 70static struct clk *gpmc_fck;
73 71
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index a5d4526ac4d6..e53ebe7d58be 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -21,11 +21,11 @@
21#include <mach/cpu.h> 21#include <mach/cpu.h>
22 22
23#if defined(CONFIG_ARCH_OMAP2420) 23#if defined(CONFIG_ARCH_OMAP2420)
24#define TAP_BASE io_p2v(0x48014000) 24#define TAP_BASE IO_ADDRESS(0x48014000)
25#elif defined(CONFIG_ARCH_OMAP2430) 25#elif defined(CONFIG_ARCH_OMAP2430)
26#define TAP_BASE io_p2v(0x4900A000) 26#define TAP_BASE IO_ADDRESS(0x4900A000)
27#elif defined(CONFIG_ARCH_OMAP34XX) 27#elif defined(CONFIG_ARCH_OMAP34XX)
28#define TAP_BASE io_p2v(0x4830A000) 28#define TAP_BASE IO_ADDRESS(0x4830A000)
29#endif 29#endif
30 30
31#define OMAP_TAP_IDCODE 0x0204 31#define OMAP_TAP_IDCODE 0x0204
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 9ef15b31d8fc..742bd0070e63 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -32,7 +32,7 @@
32 * for each bank.. when in doubt, consult the TRM. 32 * for each bank.. when in doubt, consult the TRM.
33 */ 33 */
34static struct omap_irq_bank { 34static struct omap_irq_bank {
35 unsigned long base_reg; 35 void __iomem *base_reg;
36 unsigned int nr_irqs; 36 unsigned int nr_irqs;
37} __attribute__ ((aligned(4))) irq_banks[] = { 37} __attribute__ ((aligned(4))) irq_banks[] = {
38 { 38 {
@@ -94,7 +94,7 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
94 unsigned long tmp; 94 unsigned long tmp;
95 95
96 tmp = __raw_readl(bank->base_reg + INTC_REVISION) & 0xff; 96 tmp = __raw_readl(bank->base_reg + INTC_REVISION) & 0xff;
97 printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx " 97 printk(KERN_INFO "IRQ: Found an INTC at 0x%p "
98 "(revision %ld.%ld) with %d interrupts\n", 98 "(revision %ld.%ld) with %d interrupts\n",
99 bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); 99 bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs);
100 100
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index bbf41fc8e9a9..026d8a776ae6 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -18,7 +18,7 @@
18 18
19#ifndef __ASSEMBLER__ 19#ifndef __ASSEMBLER__
20#define OMAP_PRM_REGADDR(module, reg) \ 20#define OMAP_PRM_REGADDR(module, reg) \
21 (void __iomem *)IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg)) 21 IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg))
22#else 22#else
23#define OMAP2420_PRM_REGADDR(module, reg) \ 23#define OMAP2420_PRM_REGADDR(module, reg) \
24 IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) 24 IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index adc8a26a8fb0..7faa53c3a925 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -32,24 +32,24 @@ static struct clk * uart3_fck = NULL;
32 32
33static struct plat_serial8250_port serial_platform_data[] = { 33static struct plat_serial8250_port serial_platform_data[] = {
34 { 34 {
35 .membase = (char *)IO_ADDRESS(OMAP_UART1_BASE), 35 .membase = IO_ADDRESS(OMAP_UART1_BASE),
36 .mapbase = (unsigned long)OMAP_UART1_BASE, 36 .mapbase = OMAP_UART1_BASE,
37 .irq = 72, 37 .irq = 72,
38 .flags = UPF_BOOT_AUTOCONF, 38 .flags = UPF_BOOT_AUTOCONF,
39 .iotype = UPIO_MEM, 39 .iotype = UPIO_MEM,
40 .regshift = 2, 40 .regshift = 2,
41 .uartclk = OMAP16XX_BASE_BAUD * 16, 41 .uartclk = OMAP16XX_BASE_BAUD * 16,
42 }, { 42 }, {
43 .membase = (char *)IO_ADDRESS(OMAP_UART2_BASE), 43 .membase = IO_ADDRESS(OMAP_UART2_BASE),
44 .mapbase = (unsigned long)OMAP_UART2_BASE, 44 .mapbase = OMAP_UART2_BASE,
45 .irq = 73, 45 .irq = 73,
46 .flags = UPF_BOOT_AUTOCONF, 46 .flags = UPF_BOOT_AUTOCONF,
47 .iotype = UPIO_MEM, 47 .iotype = UPIO_MEM,
48 .regshift = 2, 48 .regshift = 2,
49 .uartclk = OMAP16XX_BASE_BAUD * 16, 49 .uartclk = OMAP16XX_BASE_BAUD * 16,
50 }, { 50 }, {
51 .membase = (char *)IO_ADDRESS(OMAP_UART3_BASE), 51 .membase = IO_ADDRESS(OMAP_UART3_BASE),
52 .mapbase = (unsigned long)OMAP_UART3_BASE, 52 .mapbase = OMAP_UART3_BASE,
53 .irq = 74, 53 .irq = 74,
54 .flags = UPF_BOOT_AUTOCONF, 54 .flags = UPF_BOOT_AUTOCONF,
55 .iotype = UPIO_MEM, 55 .iotype = UPIO_MEM,
@@ -71,7 +71,7 @@ static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
71 int value) 71 int value)
72{ 72{
73 offset <<= p->regshift; 73 offset <<= p->regshift;
74 __raw_writeb(value, (unsigned long)(p->membase + offset)); 74 __raw_writeb(value, p->membase + offset);
75} 75}
76 76
77/* 77/*