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authorJuha Yrjola <juha.yrjola@solidboot.com>2006-09-25 05:41:49 -0400
committerTony Lindgren <tony@atomide.com>2006-09-25 05:41:49 -0400
commitdc0d794e488090082b7194738a08f18db0874900 (patch)
treee3bd71aa1de6395843023eebbe4776b179d557c1 /arch/arm/mach-omap2
parentdee45648a5e2f3075c51f5d6b5da65b32235d3f9 (diff)
ARM: OMAP2: Keep both APLLs active during bootup
Enabling and disabling the 54 MHz and 96 MHz APLLs can happen unnecessarily often during bootup. Make sure they're kept enabled during init. Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/clock.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 737aca4cff13..eee273bdd191 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -1117,6 +1117,12 @@ int __init omap2_clk_init(void)
1117 */ 1117 */
1118 clk_enable(&sync_32k_ick); 1118 clk_enable(&sync_32k_ick);
1119 clk_enable(&omapctrl_ick); 1119 clk_enable(&omapctrl_ick);
1120
1121 /* Force the APLLs active during bootup to avoid disabling and
1122 * enabling them unnecessarily. */
1123 clk_enable(&apll96_ck);
1124 clk_enable(&apll54_ck);
1125
1120 if (cpu_is_omap2430()) 1126 if (cpu_is_omap2430())
1121 clk_enable(&sdrc_ick); 1127 clk_enable(&sdrc_ick);
1122 1128
@@ -1126,3 +1132,12 @@ int __init omap2_clk_init(void)
1126 1132
1127 return 0; 1133 return 0;
1128} 1134}
1135
1136static int __init omap2_disable_aplls(void)
1137{
1138 clk_disable(&apll96_ck);
1139 clk_disable(&apll54_ck);
1140
1141 return 0;
1142}
1143late_initcall(omap2_disable_aplls);