diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-04 11:13:29 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-14 14:21:42 -0500 |
commit | ff2e27ae0b17f53a6a289c87d325f706598f3788 (patch) | |
tree | 1288f491bce11b3d8a6d48604fd00d68bea6eb98 /arch/arm/mach-omap2 | |
parent | 384895330e0f3954d9478fd0853145f9c169df12 (diff) |
ARM: GIC: consolidate gic_cpu_base_addr to common GIC code
Every architecture using the GIC has a gic_cpu_base_addr pointer for
GIC 0 for their entry assembly code to use to decode the cause of the
current interrupt. Move this into the common GIC code.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/include/mach/omap4-common.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap4-common.c | 9 |
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h b/arch/arm/mach-omap2/include/mach/omap4-common.h index 2744dfee1ff4..5b0270b28934 100644 --- a/arch/arm/mach-omap2/include/mach/omap4-common.h +++ b/arch/arm/mach-omap2/include/mach/omap4-common.h | |||
@@ -24,7 +24,6 @@ | |||
24 | extern void __iomem *l2cache_base; | 24 | extern void __iomem *l2cache_base; |
25 | #endif | 25 | #endif |
26 | 26 | ||
27 | extern void __iomem *gic_cpu_base_addr; | ||
28 | extern void __iomem *gic_dist_base_addr; | 27 | extern void __iomem *gic_dist_base_addr; |
29 | 28 | ||
30 | extern void __init gic_init_irq(void); | 29 | extern void __init gic_init_irq(void); |
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 3fd3df7a7697..666e852988d5 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c | |||
@@ -26,21 +26,22 @@ | |||
26 | void __iomem *l2cache_base; | 26 | void __iomem *l2cache_base; |
27 | #endif | 27 | #endif |
28 | 28 | ||
29 | void __iomem *gic_cpu_base_addr; | ||
30 | void __iomem *gic_dist_base_addr; | 29 | void __iomem *gic_dist_base_addr; |
31 | 30 | ||
32 | 31 | ||
33 | void __init gic_init_irq(void) | 32 | void __init gic_init_irq(void) |
34 | { | 33 | { |
34 | void __iomem *gic_cpu_base; | ||
35 | |||
35 | /* Static mapping, never released */ | 36 | /* Static mapping, never released */ |
36 | gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); | 37 | gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); |
37 | BUG_ON(!gic_dist_base_addr); | 38 | BUG_ON(!gic_dist_base_addr); |
38 | 39 | ||
39 | /* Static mapping, never released */ | 40 | /* Static mapping, never released */ |
40 | gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); | 41 | gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); |
41 | BUG_ON(!gic_cpu_base_addr); | 42 | BUG_ON(!gic_cpu_base); |
42 | 43 | ||
43 | gic_init(0, 29, gic_dist_base_addr, gic_cpu_base_addr); | 44 | gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); |
44 | } | 45 | } |
45 | 46 | ||
46 | #ifdef CONFIG_CACHE_L2X0 | 47 | #ifdef CONFIG_CACHE_L2X0 |