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authorJarkko Nikula <jhnikula@gmail.com>2010-08-31 06:12:56 -0400
committerTony Lindgren <tony@atomide.com>2010-09-27 13:15:25 -0400
commit7193559af4243279790fd8dbfef82f8536d9c514 (patch)
treed80acae9f744588dad7b2f25f04b6c90905b7ebc /arch/arm/mach-omap2
parentce3f054bdd4e022fa0ee9d11a215ec32f1caa12d (diff)
omap2: McBSP: Remove mux code for OMAP2420 McBSP2 and do cleanups
This 'legacy' OMAP2420 McBSP2 muxing code is currently broken after recent conversion to new mux code. The omap_mcbsp_request calling this code is usually called after booting whereas the omap_mux_init_signal is __init marked so null pointer dereference would occur. Fix this by removing the muxing code and let the bootloader or board file to do it if necessary. Remove also omap2_mcbsp_ops as there is no use for it. Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/mcbsp.c39
1 files changed, 0 insertions, 39 deletions
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 467aae245781..88b8790e4fec 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -23,29 +23,6 @@
23#include <plat/cpu.h> 23#include <plat/cpu.h>
24#include <plat/mcbsp.h> 24#include <plat/mcbsp.h>
25 25
26#include "mux.h"
27
28static void omap2_mcbsp2_mux_setup(void)
29{
30 omap_mux_init_signal("eac_ac_sclk.mcbsp2_clkx", OMAP_PULL_ENA);
31 omap_mux_init_signal("eac_ac_fs.mcbsp2_fsx", OMAP_PULL_ENA);
32 omap_mux_init_signal("eac_ac_din.mcbsp2_dr", OMAP_PULL_ENA);
33 omap_mux_init_signal("eac_ac_dout.mcbsp2_dx", OMAP_PULL_ENA);
34 omap_mux_init_gpio(117, OMAP_PULL_ENA);
35 /*
36 * TODO: Need to add MUX settings for OMAP 2430 SDP
37 */
38}
39
40static void omap2_mcbsp_request(unsigned int id)
41{
42 if (cpu_is_omap2420() && (id == OMAP_MCBSP2))
43 omap2_mcbsp2_mux_setup();
44}
45
46static struct omap_mcbsp_ops omap2_mcbsp_ops = {
47 .request = omap2_mcbsp_request,
48};
49 26
50#ifdef CONFIG_ARCH_OMAP2420 27#ifdef CONFIG_ARCH_OMAP2420
51static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { 28static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
@@ -55,7 +32,6 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
55 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, 32 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
56 .rx_irq = INT_24XX_MCBSP1_IRQ_RX, 33 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
57 .tx_irq = INT_24XX_MCBSP1_IRQ_TX, 34 .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
58 .ops = &omap2_mcbsp_ops,
59 }, 35 },
60 { 36 {
61 .phys_base = OMAP24XX_MCBSP2_BASE, 37 .phys_base = OMAP24XX_MCBSP2_BASE,
@@ -63,7 +39,6 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
63 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, 39 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
64 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 40 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
65 .tx_irq = INT_24XX_MCBSP2_IRQ_TX, 41 .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
66 .ops = &omap2_mcbsp_ops,
67 }, 42 },
68}; 43};
69#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) 44#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata)
@@ -82,7 +57,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
82 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, 57 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
83 .rx_irq = INT_24XX_MCBSP1_IRQ_RX, 58 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
84 .tx_irq = INT_24XX_MCBSP1_IRQ_TX, 59 .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
85 .ops = &omap2_mcbsp_ops,
86 }, 60 },
87 { 61 {
88 .phys_base = OMAP24XX_MCBSP2_BASE, 62 .phys_base = OMAP24XX_MCBSP2_BASE,
@@ -90,7 +64,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
90 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, 64 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
91 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 65 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
92 .tx_irq = INT_24XX_MCBSP2_IRQ_TX, 66 .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
93 .ops = &omap2_mcbsp_ops,
94 }, 67 },
95 { 68 {
96 .phys_base = OMAP2430_MCBSP3_BASE, 69 .phys_base = OMAP2430_MCBSP3_BASE,
@@ -98,7 +71,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
98 .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, 71 .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX,
99 .rx_irq = INT_24XX_MCBSP3_IRQ_RX, 72 .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
100 .tx_irq = INT_24XX_MCBSP3_IRQ_TX, 73 .tx_irq = INT_24XX_MCBSP3_IRQ_TX,
101 .ops = &omap2_mcbsp_ops,
102 }, 74 },
103 { 75 {
104 .phys_base = OMAP2430_MCBSP4_BASE, 76 .phys_base = OMAP2430_MCBSP4_BASE,
@@ -106,7 +78,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
106 .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, 78 .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX,
107 .rx_irq = INT_24XX_MCBSP4_IRQ_RX, 79 .rx_irq = INT_24XX_MCBSP4_IRQ_RX,
108 .tx_irq = INT_24XX_MCBSP4_IRQ_TX, 80 .tx_irq = INT_24XX_MCBSP4_IRQ_TX,
109 .ops = &omap2_mcbsp_ops,
110 }, 81 },
111 { 82 {
112 .phys_base = OMAP2430_MCBSP5_BASE, 83 .phys_base = OMAP2430_MCBSP5_BASE,
@@ -114,7 +85,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
114 .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, 85 .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX,
115 .rx_irq = INT_24XX_MCBSP5_IRQ_RX, 86 .rx_irq = INT_24XX_MCBSP5_IRQ_RX,
116 .tx_irq = INT_24XX_MCBSP5_IRQ_TX, 87 .tx_irq = INT_24XX_MCBSP5_IRQ_TX,
117 .ops = &omap2_mcbsp_ops,
118 }, 88 },
119}; 89};
120#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) 90#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata)
@@ -133,7 +103,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
133 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, 103 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
134 .rx_irq = INT_24XX_MCBSP1_IRQ_RX, 104 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
135 .tx_irq = INT_24XX_MCBSP1_IRQ_TX, 105 .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
136 .ops = &omap2_mcbsp_ops,
137 .buffer_size = 0x80, /* The FIFO has 128 locations */ 106 .buffer_size = 0x80, /* The FIFO has 128 locations */
138 }, 107 },
139 { 108 {
@@ -143,7 +112,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
143 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, 112 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
144 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 113 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
145 .tx_irq = INT_24XX_MCBSP2_IRQ_TX, 114 .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
146 .ops = &omap2_mcbsp_ops,
147 .buffer_size = 0x500, /* The FIFO has 1024 + 256 locations */ 115 .buffer_size = 0x500, /* The FIFO has 1024 + 256 locations */
148 }, 116 },
149 { 117 {
@@ -153,7 +121,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
153 .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, 121 .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX,
154 .rx_irq = INT_24XX_MCBSP3_IRQ_RX, 122 .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
155 .tx_irq = INT_24XX_MCBSP3_IRQ_TX, 123 .tx_irq = INT_24XX_MCBSP3_IRQ_TX,
156 .ops = &omap2_mcbsp_ops,
157 .buffer_size = 0x80, /* The FIFO has 128 locations */ 124 .buffer_size = 0x80, /* The FIFO has 128 locations */
158 }, 125 },
159 { 126 {
@@ -162,7 +129,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
162 .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, 129 .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX,
163 .rx_irq = INT_24XX_MCBSP4_IRQ_RX, 130 .rx_irq = INT_24XX_MCBSP4_IRQ_RX,
164 .tx_irq = INT_24XX_MCBSP4_IRQ_TX, 131 .tx_irq = INT_24XX_MCBSP4_IRQ_TX,
165 .ops = &omap2_mcbsp_ops,
166 .buffer_size = 0x80, /* The FIFO has 128 locations */ 132 .buffer_size = 0x80, /* The FIFO has 128 locations */
167 }, 133 },
168 { 134 {
@@ -171,7 +137,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
171 .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, 137 .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX,
172 .rx_irq = INT_24XX_MCBSP5_IRQ_RX, 138 .rx_irq = INT_24XX_MCBSP5_IRQ_RX,
173 .tx_irq = INT_24XX_MCBSP5_IRQ_TX, 139 .tx_irq = INT_24XX_MCBSP5_IRQ_TX,
174 .ops = &omap2_mcbsp_ops,
175 .buffer_size = 0x80, /* The FIFO has 128 locations */ 140 .buffer_size = 0x80, /* The FIFO has 128 locations */
176 }, 141 },
177}; 142};
@@ -189,28 +154,24 @@ static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = {
189 .dma_rx_sync = OMAP44XX_DMA_MCBSP1_RX, 154 .dma_rx_sync = OMAP44XX_DMA_MCBSP1_RX,
190 .dma_tx_sync = OMAP44XX_DMA_MCBSP1_TX, 155 .dma_tx_sync = OMAP44XX_DMA_MCBSP1_TX,
191 .tx_irq = OMAP44XX_IRQ_MCBSP1, 156 .tx_irq = OMAP44XX_IRQ_MCBSP1,
192 .ops = &omap2_mcbsp_ops,
193 }, 157 },
194 { 158 {
195 .phys_base = OMAP44XX_MCBSP2_BASE, 159 .phys_base = OMAP44XX_MCBSP2_BASE,
196 .dma_rx_sync = OMAP44XX_DMA_MCBSP2_RX, 160 .dma_rx_sync = OMAP44XX_DMA_MCBSP2_RX,
197 .dma_tx_sync = OMAP44XX_DMA_MCBSP2_TX, 161 .dma_tx_sync = OMAP44XX_DMA_MCBSP2_TX,
198 .tx_irq = OMAP44XX_IRQ_MCBSP2, 162 .tx_irq = OMAP44XX_IRQ_MCBSP2,
199 .ops = &omap2_mcbsp_ops,
200 }, 163 },
201 { 164 {
202 .phys_base = OMAP44XX_MCBSP3_BASE, 165 .phys_base = OMAP44XX_MCBSP3_BASE,
203 .dma_rx_sync = OMAP44XX_DMA_MCBSP3_RX, 166 .dma_rx_sync = OMAP44XX_DMA_MCBSP3_RX,
204 .dma_tx_sync = OMAP44XX_DMA_MCBSP3_TX, 167 .dma_tx_sync = OMAP44XX_DMA_MCBSP3_TX,
205 .tx_irq = OMAP44XX_IRQ_MCBSP3, 168 .tx_irq = OMAP44XX_IRQ_MCBSP3,
206 .ops = &omap2_mcbsp_ops,
207 }, 169 },
208 { 170 {
209 .phys_base = OMAP44XX_MCBSP4_BASE, 171 .phys_base = OMAP44XX_MCBSP4_BASE,
210 .dma_rx_sync = OMAP44XX_DMA_MCBSP4_RX, 172 .dma_rx_sync = OMAP44XX_DMA_MCBSP4_RX,
211 .dma_tx_sync = OMAP44XX_DMA_MCBSP4_TX, 173 .dma_tx_sync = OMAP44XX_DMA_MCBSP4_TX,
212 .tx_irq = OMAP44XX_IRQ_MCBSP4, 174 .tx_irq = OMAP44XX_IRQ_MCBSP4,
213 .ops = &omap2_mcbsp_ops,
214 }, 175 },
215}; 176};
216#define OMAP44XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap44xx_mcbsp_pdata) 177#define OMAP44XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap44xx_mcbsp_pdata)