diff options
author | Tony Lindgren <tony@atomide.com> | 2010-04-21 18:26:56 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2010-04-21 18:26:56 -0400 |
commit | e2bca7c76a79b68506bfc3699beb74c0d41fe230 (patch) | |
tree | 1b0269083de5ccc61a96b615ef271098df8e1b6a /arch/arm/mach-omap2 | |
parent | b3c7740a120c8a7775cb63b4d094466da5c01692 (diff) | |
parent | d54a45e2533ef33678dc340298b022a289d2b3e3 (diff) |
Merge branch 'for_2.6.34rc_a' of git://git.pwsan.com/linux-2.6 into omap-fixes-for-linus
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/clock3xxx_data.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clockdomain.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-omap2/powerdomain.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prcm.c | 4 |
5 files changed, 10 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index d5153b6bd6cb..9cba5560519b 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c | |||
@@ -895,7 +895,7 @@ static struct clk dpll4_m4x2_ck = { | |||
895 | .ops = &clkops_omap2_dflt_wait, | 895 | .ops = &clkops_omap2_dflt_wait, |
896 | .parent = &dpll4_m4_ck, | 896 | .parent = &dpll4_m4_ck, |
897 | .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), | 897 | .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), |
898 | .enable_bit = OMAP3430_PWRDN_CAM_SHIFT, | 898 | .enable_bit = OMAP3430_PWRDN_DSS1_SHIFT, |
899 | .flags = INVERT_ENABLE, | 899 | .flags = INVERT_ENABLE, |
900 | .clkdm_name = "dpll4_clkdm", | 900 | .clkdm_name = "dpll4_clkdm", |
901 | .recalc = &omap3_clkoutx2_recalc, | 901 | .recalc = &omap3_clkoutx2_recalc, |
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index b87ad66f083e..6e568ec995ee 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
@@ -240,7 +240,7 @@ static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable) | |||
240 | bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; | 240 | bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; |
241 | else | 241 | else |
242 | bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; | 242 | bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; |
243 | } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) { | 243 | } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) { |
244 | if (enable) | 244 | if (enable) |
245 | bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; | 245 | bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; |
246 | else | 246 | else |
@@ -812,7 +812,7 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm) | |||
812 | cm_set_mod_reg_bits(OMAP24XX_FORCESTATE, | 812 | cm_set_mod_reg_bits(OMAP24XX_FORCESTATE, |
813 | clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL); | 813 | clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL); |
814 | 814 | ||
815 | } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) { | 815 | } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) { |
816 | 816 | ||
817 | u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP << | 817 | u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP << |
818 | __ffs(clkdm->clktrctrl_mask)); | 818 | __ffs(clkdm->clktrctrl_mask)); |
@@ -856,7 +856,7 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm) | |||
856 | cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE, | 856 | cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE, |
857 | clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL); | 857 | clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL); |
858 | 858 | ||
859 | } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) { | 859 | } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) { |
860 | 860 | ||
861 | u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP << | 861 | u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP << |
862 | __ffs(clkdm->clktrctrl_mask)); | 862 | __ffs(clkdm->clktrctrl_mask)); |
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index c6649472ce0d..e436dcb19795 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
@@ -1511,6 +1511,9 @@ struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) | |||
1511 | c = oh->slaves[oh->_mpu_port_index]->_clk; | 1511 | c = oh->slaves[oh->_mpu_port_index]->_clk; |
1512 | } | 1512 | } |
1513 | 1513 | ||
1514 | if (!c->clkdm) | ||
1515 | return NULL; | ||
1516 | |||
1514 | return c->clkdm->pwrdm.ptr; | 1517 | return c->clkdm->pwrdm.ptr; |
1515 | 1518 | ||
1516 | } | 1519 | } |
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 9a0fb385622b..ebfce7d1a5d3 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c | |||
@@ -222,7 +222,7 @@ void pwrdm_init(struct powerdomain **pwrdm_list) | |||
222 | { | 222 | { |
223 | struct powerdomain **p = NULL; | 223 | struct powerdomain **p = NULL; |
224 | 224 | ||
225 | if (cpu_is_omap24xx() | cpu_is_omap34xx()) { | 225 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { |
226 | pwrstctrl_reg_offs = OMAP2_PM_PWSTCTRL; | 226 | pwrstctrl_reg_offs = OMAP2_PM_PWSTCTRL; |
227 | pwrstst_reg_offs = OMAP2_PM_PWSTST; | 227 | pwrstst_reg_offs = OMAP2_PM_PWSTST; |
228 | } else if (cpu_is_omap44xx()) { | 228 | } else if (cpu_is_omap44xx()) { |
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 9537f6f2352d..07a60f1204ca 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c | |||
@@ -123,7 +123,7 @@ struct omap3_prcm_regs prcm_context; | |||
123 | u32 omap_prcm_get_reset_sources(void) | 123 | u32 omap_prcm_get_reset_sources(void) |
124 | { | 124 | { |
125 | /* XXX This presumably needs modification for 34XX */ | 125 | /* XXX This presumably needs modification for 34XX */ |
126 | if (cpu_is_omap24xx() | cpu_is_omap34xx()) | 126 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) |
127 | return prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST) & 0x7f; | 127 | return prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST) & 0x7f; |
128 | if (cpu_is_omap44xx()) | 128 | if (cpu_is_omap44xx()) |
129 | return prm_read_mod_reg(WKUP_MOD, OMAP4_RM_RSTST) & 0x7f; | 129 | return prm_read_mod_reg(WKUP_MOD, OMAP4_RM_RSTST) & 0x7f; |
@@ -157,7 +157,7 @@ void omap_prcm_arch_reset(char mode, const char *cmd) | |||
157 | else | 157 | else |
158 | WARN_ON(1); | 158 | WARN_ON(1); |
159 | 159 | ||
160 | if (cpu_is_omap24xx() | cpu_is_omap34xx()) | 160 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) |
161 | prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs, | 161 | prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs, |
162 | OMAP2_RM_RSTCTRL); | 162 | OMAP2_RM_RSTCTRL); |
163 | if (cpu_is_omap44xx()) | 163 | if (cpu_is_omap44xx()) |