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authorTero Kristo <tero.kristo@nokia.com>2009-11-12 05:07:20 -0500
committerKevin Hilman <khilman@deeprootsystems.com>2010-01-20 21:16:03 -0500
commita087cad92c0d83f096024d6ec8c8a8f6b6286811 (patch)
tree899af3638df06a15c3096719d05d9520b0e56a63 /arch/arm/mach-omap2
parentafbcf6197d78aed814e90bad6099ecfbeb756ec1 (diff)
OMAP3: Fixed ARM aux ctrl register save/restore
Current value is stored on SDRAM and it is written back during wakeup. Previously a static value of 0x72 was written there. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Acked-by: Thara Gopinath <thara@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/sleep34xx.S13
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 15268f8b61de..c3626ea48143 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -245,7 +245,8 @@ restore:
245 mov r1, #0 @ set task id for ROM code in r1 245 mov r1, #0 @ set task id for ROM code in r1
246 mov r2, #4 @ set some flags in r2, r6 246 mov r2, #4 @ set some flags in r2, r6
247 mov r6, #0xff 247 mov r6, #0xff
248 adr r3, write_aux_control_params @ r3 points to parameters 248 ldr r4, scratchpad_base
249 ldr r3, [r4, #0xBC] @ r3 points to parameters
249 mcr p15, 0, r0, c7, c10, 4 @ data write barrier 250 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
250 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier 251 mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
251 .word 0xE1600071 @ call SMI monitor (smi #1) 252 .word 0xE1600071 @ call SMI monitor (smi #1)
@@ -253,14 +254,14 @@ restore:
253 b logic_l1_restore 254 b logic_l1_restore
254l2_inv_api_params: 255l2_inv_api_params:
255 .word 0x1, 0x00 256 .word 0x1, 0x00
256write_aux_control_params:
257 .word 0x1, 0x72
258l2_inv_gp: 257l2_inv_gp:
259 /* Execute smi to invalidate L2 cache */ 258 /* Execute smi to invalidate L2 cache */
260 mov r12, #0x1 @ set up to invalide L2 259 mov r12, #0x1 @ set up to invalide L2
261smi: .word 0xE1600070 @ Call SMI monitor (smieq) 260smi: .word 0xE1600070 @ Call SMI monitor (smieq)
262 /* Write to Aux control register to set some bits */ 261 /* Write to Aux control register to set some bits */
263 mov r0, #0x72 262 ldr r4, scratchpad_base
263 ldr r3, [r4,#0xBC]
264 ldr r0, [r3,#4]
264 mov r12, #0x3 265 mov r12, #0x3
265 .word 0xE1600070 @ Call SMI monitor (smieq) 266 .word 0xE1600070 @ Call SMI monitor (smieq)
266logic_l1_restore: 267logic_l1_restore:
@@ -271,6 +272,7 @@ logic_l1_restore:
271 272
272 ldr r4, scratchpad_base 273 ldr r4, scratchpad_base
273 ldr r3, [r4,#0xBC] 274 ldr r3, [r4,#0xBC]
275 adds r3, r3, #8
274 ldmia r3!, {r4-r6} 276 ldmia r3!, {r4-r6}
275 mov sp, r4 277 mov sp, r4
276 msr spsr_cxsf, r5 278 msr spsr_cxsf, r5
@@ -387,6 +389,9 @@ usettbr0:
387save_context_wfi: 389save_context_wfi:
388 /*b save_context_wfi*/ @ enable to debug save code 390 /*b save_context_wfi*/ @ enable to debug save code
389 mov r8, r0 /* Store SDRAM address in r8 */ 391 mov r8, r0 /* Store SDRAM address in r8 */
392 mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register
393 mov r4, #0x1 @ Number of parameters for restore call
394 stmia r8!, {r4-r5}
390 /* Check what that target sleep state is:stored in r1*/ 395 /* Check what that target sleep state is:stored in r1*/
391 /* 1 - Only L1 and logic lost */ 396 /* 1 - Only L1 and logic lost */
392 /* 2 - Only L2 lost */ 397 /* 2 - Only L2 lost */