diff options
author | Paul Walmsley <paul@pwsan.com> | 2010-02-23 00:09:26 -0500 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2010-02-24 14:29:43 -0500 |
commit | 51c19541624f5588bccb9d4fb3ae518c68c8082e (patch) | |
tree | 60f7b3df59806eea7ff7bbf691bb69f8791d5cc1 /arch/arm/mach-omap2 | |
parent | 8c34974ab0ecbbcdabd343f8cd0013cd2d2b0fa8 (diff) |
OMAP clock: drop RATE_FIXED clock flag
The RATE_FIXED clock flag is pointless. In the OMAP1 clock code, it
simply causes the omap1_clk_round_rate() function to return the
current rate of the clock. omap1_clk_round_rate(), however, should
never be called for a fixed-rate clock, since none of these clocks
have a .round_rate function pointer set in their struct clk records.
Similarly, in the OMAP2+ clock code, the RATE_FIXED flag just causes
the clock code to emit a warning if the OMAP clock maintainer was
foolish enough to add a .round_rate function pointer to a fixed-rate
clock. "Doctor, it hurts when I pretend that a fixed-rate clock is
rate-changeable." "Then don't pretend that a fixed-rate clock is
rate-changeable." It has no functional value. This patch drops the
RATE_FIXED clock flag, removing it from all clocks that are so marked.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/clkt_clksel.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock2420_data.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock2430_data.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock3xxx_data.c | 11 |
4 files changed, 4 insertions, 25 deletions
diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c index ade19f6369df..e50812dd03fd 100644 --- a/arch/arm/mach-omap2/clkt_clksel.c +++ b/arch/arm/mach-omap2/clkt_clksel.c | |||
@@ -258,10 +258,6 @@ long omap2_clk_round_rate(struct clk *clk, unsigned long rate) | |||
258 | if (clk->round_rate) | 258 | if (clk->round_rate) |
259 | return clk->round_rate(clk, rate); | 259 | return clk->round_rate(clk, rate); |
260 | 260 | ||
261 | if (clk->flags & RATE_FIXED) | ||
262 | printk(KERN_ERR "clock: generic omap2_clk_round_rate called " | ||
263 | "on fixed-rate clock %s\n", clk->name); | ||
264 | |||
265 | return clk->rate; | 261 | return clk->rate; |
266 | } | 262 | } |
267 | 263 | ||
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index d5913f01e5d6..f12af95ead45 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c | |||
@@ -55,7 +55,6 @@ static struct clk func_32k_ck = { | |||
55 | .name = "func_32k_ck", | 55 | .name = "func_32k_ck", |
56 | .ops = &clkops_null, | 56 | .ops = &clkops_null, |
57 | .rate = 32000, | 57 | .rate = 32000, |
58 | .flags = RATE_FIXED, | ||
59 | .clkdm_name = "wkup_clkdm", | 58 | .clkdm_name = "wkup_clkdm", |
60 | }; | 59 | }; |
61 | 60 | ||
@@ -63,7 +62,6 @@ static struct clk secure_32k_ck = { | |||
63 | .name = "secure_32k_ck", | 62 | .name = "secure_32k_ck", |
64 | .ops = &clkops_null, | 63 | .ops = &clkops_null, |
65 | .rate = 32768, | 64 | .rate = 32768, |
66 | .flags = RATE_FIXED, | ||
67 | .clkdm_name = "wkup_clkdm", | 65 | .clkdm_name = "wkup_clkdm", |
68 | }; | 66 | }; |
69 | 67 | ||
@@ -88,7 +86,6 @@ static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */ | |||
88 | .name = "alt_ck", | 86 | .name = "alt_ck", |
89 | .ops = &clkops_null, | 87 | .ops = &clkops_null, |
90 | .rate = 54000000, | 88 | .rate = 54000000, |
91 | .flags = RATE_FIXED, | ||
92 | .clkdm_name = "wkup_clkdm", | 89 | .clkdm_name = "wkup_clkdm", |
93 | }; | 90 | }; |
94 | 91 | ||
@@ -134,7 +131,7 @@ static struct clk apll96_ck = { | |||
134 | .ops = &clkops_apll96, | 131 | .ops = &clkops_apll96, |
135 | .parent = &sys_ck, | 132 | .parent = &sys_ck, |
136 | .rate = 96000000, | 133 | .rate = 96000000, |
137 | .flags = RATE_FIXED | ENABLE_ON_INIT, | 134 | .flags = ENABLE_ON_INIT, |
138 | .clkdm_name = "wkup_clkdm", | 135 | .clkdm_name = "wkup_clkdm", |
139 | .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), | 136 | .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), |
140 | .enable_bit = OMAP24XX_EN_96M_PLL_SHIFT, | 137 | .enable_bit = OMAP24XX_EN_96M_PLL_SHIFT, |
@@ -145,7 +142,7 @@ static struct clk apll54_ck = { | |||
145 | .ops = &clkops_apll54, | 142 | .ops = &clkops_apll54, |
146 | .parent = &sys_ck, | 143 | .parent = &sys_ck, |
147 | .rate = 54000000, | 144 | .rate = 54000000, |
148 | .flags = RATE_FIXED | ENABLE_ON_INIT, | 145 | .flags = ENABLE_ON_INIT, |
149 | .clkdm_name = "wkup_clkdm", | 146 | .clkdm_name = "wkup_clkdm", |
150 | .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), | 147 | .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), |
151 | .enable_bit = OMAP24XX_EN_54M_PLL_SHIFT, | 148 | .enable_bit = OMAP24XX_EN_54M_PLL_SHIFT, |
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index b3895840dc41..0438b6e4f51a 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c | |||
@@ -55,7 +55,6 @@ static struct clk func_32k_ck = { | |||
55 | .name = "func_32k_ck", | 55 | .name = "func_32k_ck", |
56 | .ops = &clkops_null, | 56 | .ops = &clkops_null, |
57 | .rate = 32000, | 57 | .rate = 32000, |
58 | .flags = RATE_FIXED, | ||
59 | .clkdm_name = "wkup_clkdm", | 58 | .clkdm_name = "wkup_clkdm", |
60 | }; | 59 | }; |
61 | 60 | ||
@@ -63,7 +62,6 @@ static struct clk secure_32k_ck = { | |||
63 | .name = "secure_32k_ck", | 62 | .name = "secure_32k_ck", |
64 | .ops = &clkops_null, | 63 | .ops = &clkops_null, |
65 | .rate = 32768, | 64 | .rate = 32768, |
66 | .flags = RATE_FIXED, | ||
67 | .clkdm_name = "wkup_clkdm", | 65 | .clkdm_name = "wkup_clkdm", |
68 | }; | 66 | }; |
69 | 67 | ||
@@ -88,7 +86,6 @@ static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */ | |||
88 | .name = "alt_ck", | 86 | .name = "alt_ck", |
89 | .ops = &clkops_null, | 87 | .ops = &clkops_null, |
90 | .rate = 54000000, | 88 | .rate = 54000000, |
91 | .flags = RATE_FIXED, | ||
92 | .clkdm_name = "wkup_clkdm", | 89 | .clkdm_name = "wkup_clkdm", |
93 | }; | 90 | }; |
94 | 91 | ||
@@ -134,7 +131,7 @@ static struct clk apll96_ck = { | |||
134 | .ops = &clkops_apll96, | 131 | .ops = &clkops_apll96, |
135 | .parent = &sys_ck, | 132 | .parent = &sys_ck, |
136 | .rate = 96000000, | 133 | .rate = 96000000, |
137 | .flags = RATE_FIXED | ENABLE_ON_INIT, | 134 | .flags = ENABLE_ON_INIT, |
138 | .clkdm_name = "wkup_clkdm", | 135 | .clkdm_name = "wkup_clkdm", |
139 | .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), | 136 | .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), |
140 | .enable_bit = OMAP24XX_EN_96M_PLL_SHIFT, | 137 | .enable_bit = OMAP24XX_EN_96M_PLL_SHIFT, |
@@ -145,7 +142,7 @@ static struct clk apll54_ck = { | |||
145 | .ops = &clkops_apll54, | 142 | .ops = &clkops_apll54, |
146 | .parent = &sys_ck, | 143 | .parent = &sys_ck, |
147 | .rate = 54000000, | 144 | .rate = 54000000, |
148 | .flags = RATE_FIXED | ENABLE_ON_INIT, | 145 | .flags = ENABLE_ON_INIT, |
149 | .clkdm_name = "wkup_clkdm", | 146 | .clkdm_name = "wkup_clkdm", |
150 | .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), | 147 | .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), |
151 | .enable_bit = OMAP24XX_EN_54M_PLL_SHIFT, | 148 | .enable_bit = OMAP24XX_EN_54M_PLL_SHIFT, |
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index f23790297003..fd832300be32 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c | |||
@@ -64,14 +64,12 @@ static struct clk omap_32k_fck = { | |||
64 | .name = "omap_32k_fck", | 64 | .name = "omap_32k_fck", |
65 | .ops = &clkops_null, | 65 | .ops = &clkops_null, |
66 | .rate = 32768, | 66 | .rate = 32768, |
67 | .flags = RATE_FIXED, | ||
68 | }; | 67 | }; |
69 | 68 | ||
70 | static struct clk secure_32k_fck = { | 69 | static struct clk secure_32k_fck = { |
71 | .name = "secure_32k_fck", | 70 | .name = "secure_32k_fck", |
72 | .ops = &clkops_null, | 71 | .ops = &clkops_null, |
73 | .rate = 32768, | 72 | .rate = 32768, |
74 | .flags = RATE_FIXED, | ||
75 | }; | 73 | }; |
76 | 74 | ||
77 | /* Virtual source clocks for osc_sys_ck */ | 75 | /* Virtual source clocks for osc_sys_ck */ |
@@ -79,42 +77,36 @@ static struct clk virt_12m_ck = { | |||
79 | .name = "virt_12m_ck", | 77 | .name = "virt_12m_ck", |
80 | .ops = &clkops_null, | 78 | .ops = &clkops_null, |
81 | .rate = 12000000, | 79 | .rate = 12000000, |
82 | .flags = RATE_FIXED, | ||
83 | }; | 80 | }; |
84 | 81 | ||
85 | static struct clk virt_13m_ck = { | 82 | static struct clk virt_13m_ck = { |
86 | .name = "virt_13m_ck", | 83 | .name = "virt_13m_ck", |
87 | .ops = &clkops_null, | 84 | .ops = &clkops_null, |
88 | .rate = 13000000, | 85 | .rate = 13000000, |
89 | .flags = RATE_FIXED, | ||
90 | }; | 86 | }; |
91 | 87 | ||
92 | static struct clk virt_16_8m_ck = { | 88 | static struct clk virt_16_8m_ck = { |
93 | .name = "virt_16_8m_ck", | 89 | .name = "virt_16_8m_ck", |
94 | .ops = &clkops_null, | 90 | .ops = &clkops_null, |
95 | .rate = 16800000, | 91 | .rate = 16800000, |
96 | .flags = RATE_FIXED, | ||
97 | }; | 92 | }; |
98 | 93 | ||
99 | static struct clk virt_19_2m_ck = { | 94 | static struct clk virt_19_2m_ck = { |
100 | .name = "virt_19_2m_ck", | 95 | .name = "virt_19_2m_ck", |
101 | .ops = &clkops_null, | 96 | .ops = &clkops_null, |
102 | .rate = 19200000, | 97 | .rate = 19200000, |
103 | .flags = RATE_FIXED, | ||
104 | }; | 98 | }; |
105 | 99 | ||
106 | static struct clk virt_26m_ck = { | 100 | static struct clk virt_26m_ck = { |
107 | .name = "virt_26m_ck", | 101 | .name = "virt_26m_ck", |
108 | .ops = &clkops_null, | 102 | .ops = &clkops_null, |
109 | .rate = 26000000, | 103 | .rate = 26000000, |
110 | .flags = RATE_FIXED, | ||
111 | }; | 104 | }; |
112 | 105 | ||
113 | static struct clk virt_38_4m_ck = { | 106 | static struct clk virt_38_4m_ck = { |
114 | .name = "virt_38_4m_ck", | 107 | .name = "virt_38_4m_ck", |
115 | .ops = &clkops_null, | 108 | .ops = &clkops_null, |
116 | .rate = 38400000, | 109 | .rate = 38400000, |
117 | .flags = RATE_FIXED, | ||
118 | }; | 110 | }; |
119 | 111 | ||
120 | static const struct clksel_rate osc_sys_12m_rates[] = { | 112 | static const struct clksel_rate osc_sys_12m_rates[] = { |
@@ -167,7 +159,6 @@ static struct clk osc_sys_ck = { | |||
167 | .clksel_mask = OMAP3430_SYS_CLKIN_SEL_MASK, | 159 | .clksel_mask = OMAP3430_SYS_CLKIN_SEL_MASK, |
168 | .clksel = osc_sys_clksel, | 160 | .clksel = osc_sys_clksel, |
169 | /* REVISIT: deal with autoextclkmode? */ | 161 | /* REVISIT: deal with autoextclkmode? */ |
170 | .flags = RATE_FIXED, | ||
171 | .recalc = &omap2_clksel_recalc, | 162 | .recalc = &omap2_clksel_recalc, |
172 | }; | 163 | }; |
173 | 164 | ||
@@ -3168,7 +3159,6 @@ static struct clk emac_ick = { | |||
3168 | static struct clk rmii_ck = { | 3159 | static struct clk rmii_ck = { |
3169 | .name = "rmii_ck", | 3160 | .name = "rmii_ck", |
3170 | .ops = &clkops_null, | 3161 | .ops = &clkops_null, |
3171 | .flags = RATE_FIXED, | ||
3172 | .rate = 50000000, | 3162 | .rate = 50000000, |
3173 | }; | 3163 | }; |
3174 | 3164 | ||
@@ -3224,7 +3214,6 @@ static struct clk vpfe_ick = { | |||
3224 | static struct clk pclk_ck = { | 3214 | static struct clk pclk_ck = { |
3225 | .name = "pclk_ck", | 3215 | .name = "pclk_ck", |
3226 | .ops = &clkops_null, | 3216 | .ops = &clkops_null, |
3227 | .flags = RATE_FIXED, | ||
3228 | .rate = 27000000, | 3217 | .rate = 27000000, |
3229 | }; | 3218 | }; |
3230 | 3219 | ||