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authorTony Lindgren <tony@atomide.com>2012-09-04 20:43:29 -0400
committerTony Lindgren <tony@atomide.com>2012-09-12 21:06:30 -0400
commit3003ce3ecd31b171a99d3693ee89f4640a000e13 (patch)
tree81e4f8e00468ce66ac8c5f5ff15c93943fc015cf /arch/arm/mach-omap2
parent936e0f2fd64efbb28444c916814b6232dddac03b (diff)
ARM: OMAP2+: Make INTCPS_NR_IRQS local for mach-omap2/irq.c
Make INTCPS_NR_IRQS local for mach-omap2/irq.c Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/irq.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index bcd83db41bbc..ac59f96a489f 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -49,6 +49,8 @@
49#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) 49#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
50#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */ 50#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */
51#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */ 51#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
52#define INTCPS_NR_MIR_REGS 3
53#define INTCPS_NR_IRQS 96
52 54
53/* 55/*
54 * OMAP2 has a number of different interrupt controllers, each interrupt 56 * OMAP2 has a number of different interrupt controllers, each interrupt