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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-03-25 14:31:35 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-03-25 14:31:35 -0400
commit8937b7349ca9e25a02b2a72ccb7fba404ddedc5b (patch)
tree434ffe23d318f8af55850a26c3431ce8b82ab6f4 /arch/arm/mach-omap2
parent997302259f386bca8fe1db67c50296ca426c438f (diff)
parentffe7f95bb1a4d1e9ca5d252445dc38476e1a208e (diff)
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into devel
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/Kconfig10
-rw-r--r--arch/arm/mach-omap2/Makefile8
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c15
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c542
-rw-r--r--arch/arm/mach-omap2/board-apollon.c3
-rw-r--r--arch/arm/mach-omap2/board-h4.c38
-rw-r--r--arch/arm/mach-omap2/board-ldp.c12
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c5
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c9
-rw-r--r--arch/arm/mach-omap2/board-overo.c70
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c419
-rw-r--r--arch/arm/mach-omap2/board-rx51.c96
-rw-r--r--arch/arm/mach-omap2/devices.c147
-rw-r--r--arch/arm/mach-omap2/mailbox.c195
-rw-r--r--arch/arm/mach-omap2/mmc-twl4030.c187
-rw-r--r--arch/arm/mach-omap2/mmc-twl4030.h6
-rw-r--r--arch/arm/mach-omap2/mux.c27
-rw-r--r--arch/arm/mach-omap2/usb-musb.c187
18 files changed, 1812 insertions, 164 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 3754b79092ab..64ab386a65c7 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -58,4 +58,12 @@ config MACH_OVERO
58 58
59config MACH_OMAP3_PANDORA 59config MACH_OMAP3_PANDORA
60 bool "OMAP3 Pandora" 60 bool "OMAP3 Pandora"
61 depends on ARCH_OMAP3 && ARCH_OMAP34XX \ No newline at end of file 61 depends on ARCH_OMAP3 && ARCH_OMAP34XX
62
63config MACH_OMAP_3430SDP
64 bool "OMAP 3430 SDP board"
65 depends on ARCH_OMAP3 && ARCH_OMAP34XX
66
67config MACH_NOKIA_RX51
68 bool "Nokia RX-51 board"
69 depends on ARCH_OMAP3 && ARCH_OMAP34XX
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 9717afcdbda7..a2c3fcc27a22 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -42,4 +42,12 @@ obj-$(CONFIG_MACH_OVERO) += board-overo.o \
42 mmc-twl4030.o 42 mmc-twl4030.o
43obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o \ 43obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o \
44 mmc-twl4030.o 44 mmc-twl4030.o
45obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o \
46 mmc-twl4030.o
45 47
48obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \
49 board-rx51-peripherals.o \
50# Platform specific device init code
51ifeq ($(CONFIG_USB_MUSB_SOC),y)
52obj-y += usb-musb.o
53endif
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 7b29e1d00f23..22143651037e 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -35,12 +35,16 @@
35#include <mach/board.h> 35#include <mach/board.h>
36#include <mach/common.h> 36#include <mach/common.h>
37#include <mach/gpmc.h> 37#include <mach/gpmc.h>
38#include <mach/usb.h>
38 39
39#include "mmc-twl4030.h" 40#include "mmc-twl4030.h"
40 41
42#define SDP2430_CS0_BASE 0x04000000
41#define SDP2430_FLASH_CS 0 43#define SDP2430_FLASH_CS 0
42#define SDP2430_SMC91X_CS 5 44#define SDP2430_SMC91X_CS 5
43 45
46#define SDP2430_ETHR_GPIO_IRQ 149
47
44static struct mtd_partition sdp2430_partitions[] = { 48static struct mtd_partition sdp2430_partitions[] = {
45 /* bootloader (U-Boot, etc) in first sector */ 49 /* bootloader (U-Boot, etc) in first sector */
46 { 50 {
@@ -102,8 +106,8 @@ static struct resource sdp2430_smc91x_resources[] = {
102 .flags = IORESOURCE_MEM, 106 .flags = IORESOURCE_MEM,
103 }, 107 },
104 [1] = { 108 [1] = {
105 .start = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), 109 .start = OMAP_GPIO_IRQ(SDP2430_ETHR_GPIO_IRQ),
106 .end = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), 110 .end = OMAP_GPIO_IRQ(SDP2430_ETHR_GPIO_IRQ),
107 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, 111 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
108 }, 112 },
109}; 113};
@@ -170,13 +174,13 @@ static inline void __init sdp2430_init_smc91x(void)
170 sdp2430_smc91x_resources[0].end = cs_mem_base + 0x30f; 174 sdp2430_smc91x_resources[0].end = cs_mem_base + 0x30f;
171 udelay(100); 175 udelay(100);
172 176
173 if (gpio_request(OMAP24XX_ETHR_GPIO_IRQ, "SMC91x irq") < 0) { 177 if (gpio_request(SDP2430_ETHR_GPIO_IRQ, "SMC91x irq") < 0) {
174 printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n", 178 printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
175 OMAP24XX_ETHR_GPIO_IRQ); 179 SDP2430_ETHR_GPIO_IRQ);
176 gpmc_cs_free(eth_cs); 180 gpmc_cs_free(eth_cs);
177 goto out; 181 goto out;
178 } 182 }
179 gpio_direction_input(OMAP24XX_ETHR_GPIO_IRQ); 183 gpio_direction_input(SDP2430_ETHR_GPIO_IRQ);
180 184
181out: 185out:
182 clk_disable(gpmc_fck); 186 clk_disable(gpmc_fck);
@@ -251,6 +255,7 @@ static void __init omap_2430sdp_init(void)
251 omap_board_config_size = ARRAY_SIZE(sdp2430_config); 255 omap_board_config_size = ARRAY_SIZE(sdp2430_config);
252 omap_serial_init(); 256 omap_serial_init();
253 twl4030_mmc_init(mmc); 257 twl4030_mmc_init(mmc);
258 usb_musb_init();
254} 259}
255 260
256static void __init omap_2430sdp_map_io(void) 261static void __init omap_2430sdp_map_io(void)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
new file mode 100644
index 000000000000..2af38e56db31
--- /dev/null
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -0,0 +1,542 @@
1/*
2 * linux/arch/arm/mach-omap2/board-3430sdp.c
3 *
4 * Copyright (C) 2007 Texas Instruments
5 *
6 * Modified from mach-omap2/board-generic.c
7 *
8 * Initial code: Syed Mohammed Khasim
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/delay.h>
19#include <linux/input.h>
20#include <linux/spi/spi.h>
21#include <linux/spi/ads7846.h>
22#include <linux/i2c/twl4030.h>
23#include <linux/regulator/machine.h>
24#include <linux/io.h>
25#include <linux/gpio.h>
26
27#include <mach/hardware.h>
28#include <asm/mach-types.h>
29#include <asm/mach/arch.h>
30#include <asm/mach/map.h>
31
32#include <mach/mcspi.h>
33#include <mach/mux.h>
34#include <mach/board.h>
35#include <mach/usb.h>
36#include <mach/common.h>
37#include <mach/dma.h>
38#include <mach/gpmc.h>
39
40#include <mach/control.h>
41#include <mach/keypad.h>
42
43#include "mmc-twl4030.h"
44
45#define CONFIG_DISABLE_HFCLK 1
46
47#define SDP3430_ETHR_GPIO_IRQ_SDPV1 29
48#define SDP3430_ETHR_GPIO_IRQ_SDPV2 6
49#define SDP3430_SMC91X_CS 3
50
51#define SDP3430_TS_GPIO_IRQ_SDPV1 3
52#define SDP3430_TS_GPIO_IRQ_SDPV2 2
53
54#define ENABLE_VAUX3_DEDICATED 0x03
55#define ENABLE_VAUX3_DEV_GRP 0x20
56
57#define TWL4030_MSECURE_GPIO 22
58
59static struct resource sdp3430_smc91x_resources[] = {
60 [0] = {
61 .flags = IORESOURCE_MEM,
62 },
63 [1] = {
64 .start = 0,
65 .end = 0,
66 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
67 },
68};
69
70static struct platform_device sdp3430_smc91x_device = {
71 .name = "smc91x",
72 .id = -1,
73 .num_resources = ARRAY_SIZE(sdp3430_smc91x_resources),
74 .resource = sdp3430_smc91x_resources,
75};
76
77static int sdp3430_keymap[] = {
78 KEY(0, 0, KEY_LEFT),
79 KEY(0, 1, KEY_RIGHT),
80 KEY(0, 2, KEY_A),
81 KEY(0, 3, KEY_B),
82 KEY(0, 4, KEY_C),
83 KEY(1, 0, KEY_DOWN),
84 KEY(1, 1, KEY_UP),
85 KEY(1, 2, KEY_E),
86 KEY(1, 3, KEY_F),
87 KEY(1, 4, KEY_G),
88 KEY(2, 0, KEY_ENTER),
89 KEY(2, 1, KEY_I),
90 KEY(2, 2, KEY_J),
91 KEY(2, 3, KEY_K),
92 KEY(2, 4, KEY_3),
93 KEY(3, 0, KEY_M),
94 KEY(3, 1, KEY_N),
95 KEY(3, 2, KEY_O),
96 KEY(3, 3, KEY_P),
97 KEY(3, 4, KEY_Q),
98 KEY(4, 0, KEY_R),
99 KEY(4, 1, KEY_4),
100 KEY(4, 2, KEY_T),
101 KEY(4, 3, KEY_U),
102 KEY(4, 4, KEY_D),
103 KEY(5, 0, KEY_V),
104 KEY(5, 1, KEY_W),
105 KEY(5, 2, KEY_L),
106 KEY(5, 3, KEY_S),
107 KEY(5, 4, KEY_H),
108 0
109};
110
111static struct twl4030_keypad_data sdp3430_kp_data = {
112 .rows = 5,
113 .cols = 6,
114 .keymap = sdp3430_keymap,
115 .keymapsize = ARRAY_SIZE(sdp3430_keymap),
116 .rep = 1,
117};
118
119static int ts_gpio; /* Needed for ads7846_get_pendown_state */
120
121/**
122 * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq
123 *
124 * @return - void. If request gpio fails then Flag KERN_ERR.
125 */
126static void ads7846_dev_init(void)
127{
128 if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) {
129 printk(KERN_ERR "can't get ads746 pen down GPIO\n");
130 return;
131 }
132
133 gpio_direction_input(ts_gpio);
134
135 omap_set_gpio_debounce(ts_gpio, 1);
136 omap_set_gpio_debounce_time(ts_gpio, 0xa);
137}
138
139static int ads7846_get_pendown_state(void)
140{
141 return !gpio_get_value(ts_gpio);
142}
143
144static struct ads7846_platform_data tsc2046_config __initdata = {
145 .get_pendown_state = ads7846_get_pendown_state,
146 .keep_vref_on = 1,
147};
148
149
150static struct omap2_mcspi_device_config tsc2046_mcspi_config = {
151 .turbo_mode = 0,
152 .single_channel = 1, /* 0: slave, 1: master */
153};
154
155static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
156 [0] = {
157 /*
158 * TSC2046 operates at a max freqency of 2MHz, so
159 * operate slightly below at 1.5MHz
160 */
161 .modalias = "ads7846",
162 .bus_num = 1,
163 .chip_select = 0,
164 .max_speed_hz = 1500000,
165 .controller_data = &tsc2046_mcspi_config,
166 .irq = 0,
167 .platform_data = &tsc2046_config,
168 },
169};
170
171static struct platform_device sdp3430_lcd_device = {
172 .name = "sdp2430_lcd",
173 .id = -1,
174};
175
176static struct regulator_consumer_supply sdp3430_vdac_supply = {
177 .supply = "vdac",
178 .dev = &sdp3430_lcd_device.dev,
179};
180
181static struct regulator_consumer_supply sdp3430_vdvi_supply = {
182 .supply = "vdvi",
183 .dev = &sdp3430_lcd_device.dev,
184};
185
186static struct platform_device *sdp3430_devices[] __initdata = {
187 &sdp3430_smc91x_device,
188 &sdp3430_lcd_device,
189};
190
191static inline void __init sdp3430_init_smc91x(void)
192{
193 int eth_cs;
194 unsigned long cs_mem_base;
195 int eth_gpio = 0;
196
197 eth_cs = SDP3430_SMC91X_CS;
198
199 if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) {
200 printk(KERN_ERR "Failed to request GPMC mem for smc91x\n");
201 return;
202 }
203
204 sdp3430_smc91x_resources[0].start = cs_mem_base + 0x300;
205 sdp3430_smc91x_resources[0].end = cs_mem_base + 0x30f;
206 udelay(100);
207
208 if (omap_rev() > OMAP3430_REV_ES1_0)
209 eth_gpio = SDP3430_ETHR_GPIO_IRQ_SDPV2;
210 else
211 eth_gpio = SDP3430_ETHR_GPIO_IRQ_SDPV1;
212
213 sdp3430_smc91x_resources[1].start = gpio_to_irq(eth_gpio);
214
215 if (gpio_request(eth_gpio, "SMC91x irq") < 0) {
216 printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
217 eth_gpio);
218 return;
219 }
220 gpio_direction_input(eth_gpio);
221}
222
223static void __init omap_3430sdp_init_irq(void)
224{
225 omap2_init_common_hw();
226 omap_init_irq();
227 omap_gpio_init();
228 sdp3430_init_smc91x();
229}
230
231static struct omap_uart_config sdp3430_uart_config __initdata = {
232 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
233};
234
235static struct omap_lcd_config sdp3430_lcd_config __initdata = {
236 .ctrl_name = "internal",
237};
238
239static struct omap_board_config_kernel sdp3430_config[] __initdata = {
240 { OMAP_TAG_UART, &sdp3430_uart_config },
241 { OMAP_TAG_LCD, &sdp3430_lcd_config },
242};
243
244static int sdp3430_batt_table[] = {
245/* 0 C*/
24630800, 29500, 28300, 27100,
24726000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
24817200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
24911600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
2508020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
2515640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
2524040, 3910, 3790, 3670, 3550
253};
254
255static struct twl4030_bci_platform_data sdp3430_bci_data = {
256 .battery_tmp_tbl = sdp3430_batt_table,
257 .tblsize = ARRAY_SIZE(sdp3430_batt_table),
258};
259
260static struct twl4030_hsmmc_info mmc[] = {
261 {
262 .mmc = 1,
263 /* 8 bits (default) requires S6.3 == ON,
264 * so the SIM card isn't used; else 4 bits.
265 */
266 .wires = 8,
267 .gpio_wp = 4,
268 },
269 {
270 .mmc = 2,
271 .wires = 8,
272 .gpio_wp = 7,
273 },
274 {} /* Terminator */
275};
276
277static struct regulator_consumer_supply sdp3430_vmmc1_supply = {
278 .supply = "vmmc",
279};
280
281static struct regulator_consumer_supply sdp3430_vsim_supply = {
282 .supply = "vmmc_aux",
283};
284
285static struct regulator_consumer_supply sdp3430_vmmc2_supply = {
286 .supply = "vmmc",
287};
288
289static int sdp3430_twl_gpio_setup(struct device *dev,
290 unsigned gpio, unsigned ngpio)
291{
292 /* gpio + 0 is "mmc0_cd" (input/IRQ),
293 * gpio + 1 is "mmc1_cd" (input/IRQ)
294 */
295 mmc[0].gpio_cd = gpio + 0;
296 mmc[1].gpio_cd = gpio + 1;
297 twl4030_mmc_init(mmc);
298
299 /* link regulators to MMC adapters ... we "know" the
300 * regulators will be set up only *after* we return.
301 */
302 sdp3430_vmmc1_supply.dev = mmc[0].dev;
303 sdp3430_vsim_supply.dev = mmc[0].dev;
304 sdp3430_vmmc2_supply.dev = mmc[1].dev;
305
306 /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
307 gpio_request(gpio + 7, "sub_lcd_en_bkl");
308 gpio_direction_output(gpio + 7, 0);
309
310 /* gpio + 15 is "sub_lcd_nRST" (output) */
311 gpio_request(gpio + 15, "sub_lcd_nRST");
312 gpio_direction_output(gpio + 15, 0);
313
314 return 0;
315}
316
317static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
318 .gpio_base = OMAP_MAX_GPIO_LINES,
319 .irq_base = TWL4030_GPIO_IRQ_BASE,
320 .irq_end = TWL4030_GPIO_IRQ_END,
321 .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
322 | BIT(16) | BIT(17),
323 .setup = sdp3430_twl_gpio_setup,
324};
325
326static struct twl4030_usb_data sdp3430_usb_data = {
327 .usb_mode = T2_USB_MODE_ULPI,
328};
329
330static struct twl4030_madc_platform_data sdp3430_madc_data = {
331 .irq_line = 1,
332};
333
334/*
335 * Apply all the fixed voltages since most versions of U-Boot
336 * don't bother with that initialization.
337 */
338
339/* VAUX1 for mainboard (irda and sub-lcd) */
340static struct regulator_init_data sdp3430_vaux1 = {
341 .constraints = {
342 .min_uV = 2800000,
343 .max_uV = 2800000,
344 .apply_uV = true,
345 .valid_modes_mask = REGULATOR_MODE_NORMAL
346 | REGULATOR_MODE_STANDBY,
347 .valid_ops_mask = REGULATOR_CHANGE_MODE
348 | REGULATOR_CHANGE_STATUS,
349 },
350};
351
352/* VAUX2 for camera module */
353static struct regulator_init_data sdp3430_vaux2 = {
354 .constraints = {
355 .min_uV = 2800000,
356 .max_uV = 2800000,
357 .apply_uV = true,
358 .valid_modes_mask = REGULATOR_MODE_NORMAL
359 | REGULATOR_MODE_STANDBY,
360 .valid_ops_mask = REGULATOR_CHANGE_MODE
361 | REGULATOR_CHANGE_STATUS,
362 },
363};
364
365/* VAUX3 for LCD board */
366static struct regulator_init_data sdp3430_vaux3 = {
367 .constraints = {
368 .min_uV = 2800000,
369 .max_uV = 2800000,
370 .apply_uV = true,
371 .valid_modes_mask = REGULATOR_MODE_NORMAL
372 | REGULATOR_MODE_STANDBY,
373 .valid_ops_mask = REGULATOR_CHANGE_MODE
374 | REGULATOR_CHANGE_STATUS,
375 },
376};
377
378/* VAUX4 for OMAP VDD_CSI2 (camera) */
379static struct regulator_init_data sdp3430_vaux4 = {
380 .constraints = {
381 .min_uV = 1800000,
382 .max_uV = 1800000,
383 .apply_uV = true,
384 .valid_modes_mask = REGULATOR_MODE_NORMAL
385 | REGULATOR_MODE_STANDBY,
386 .valid_ops_mask = REGULATOR_CHANGE_MODE
387 | REGULATOR_CHANGE_STATUS,
388 },
389};
390
391/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
392static struct regulator_init_data sdp3430_vmmc1 = {
393 .constraints = {
394 .min_uV = 1850000,
395 .max_uV = 3150000,
396 .valid_modes_mask = REGULATOR_MODE_NORMAL
397 | REGULATOR_MODE_STANDBY,
398 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
399 | REGULATOR_CHANGE_MODE
400 | REGULATOR_CHANGE_STATUS,
401 },
402 .num_consumer_supplies = 1,
403 .consumer_supplies = &sdp3430_vmmc1_supply,
404};
405
406/* VMMC2 for MMC2 card */
407static struct regulator_init_data sdp3430_vmmc2 = {
408 .constraints = {
409 .min_uV = 1850000,
410 .max_uV = 1850000,
411 .apply_uV = true,
412 .valid_modes_mask = REGULATOR_MODE_NORMAL
413 | REGULATOR_MODE_STANDBY,
414 .valid_ops_mask = REGULATOR_CHANGE_MODE
415 | REGULATOR_CHANGE_STATUS,
416 },
417 .num_consumer_supplies = 1,
418 .consumer_supplies = &sdp3430_vmmc2_supply,
419};
420
421/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
422static struct regulator_init_data sdp3430_vsim = {
423 .constraints = {
424 .min_uV = 1800000,
425 .max_uV = 3000000,
426 .valid_modes_mask = REGULATOR_MODE_NORMAL
427 | REGULATOR_MODE_STANDBY,
428 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
429 | REGULATOR_CHANGE_MODE
430 | REGULATOR_CHANGE_STATUS,
431 },
432 .num_consumer_supplies = 1,
433 .consumer_supplies = &sdp3430_vsim_supply,
434};
435
436/* VDAC for DSS driving S-Video */
437static struct regulator_init_data sdp3430_vdac = {
438 .constraints = {
439 .min_uV = 1800000,
440 .max_uV = 1800000,
441 .apply_uV = true,
442 .valid_modes_mask = REGULATOR_MODE_NORMAL
443 | REGULATOR_MODE_STANDBY,
444 .valid_ops_mask = REGULATOR_CHANGE_MODE
445 | REGULATOR_CHANGE_STATUS,
446 },
447 .num_consumer_supplies = 1,
448 .consumer_supplies = &sdp3430_vdac_supply,
449};
450
451/* VPLL2 for digital video outputs */
452static struct regulator_init_data sdp3430_vpll2 = {
453 .constraints = {
454 .name = "VDVI",
455 .min_uV = 1800000,
456 .max_uV = 1800000,
457 .valid_modes_mask = REGULATOR_MODE_NORMAL
458 | REGULATOR_MODE_STANDBY,
459 .valid_ops_mask = REGULATOR_CHANGE_MODE
460 | REGULATOR_CHANGE_STATUS,
461 },
462 .num_consumer_supplies = 1,
463 .consumer_supplies = &sdp3430_vdvi_supply,
464};
465
466static struct twl4030_platform_data sdp3430_twldata = {
467 .irq_base = TWL4030_IRQ_BASE,
468 .irq_end = TWL4030_IRQ_END,
469
470 /* platform_data for children goes here */
471 .bci = &sdp3430_bci_data,
472 .gpio = &sdp3430_gpio_data,
473 .madc = &sdp3430_madc_data,
474 .keypad = &sdp3430_kp_data,
475 .usb = &sdp3430_usb_data,
476
477 .vaux1 = &sdp3430_vaux1,
478 .vaux2 = &sdp3430_vaux2,
479 .vaux3 = &sdp3430_vaux3,
480 .vaux4 = &sdp3430_vaux4,
481 .vmmc1 = &sdp3430_vmmc1,
482 .vmmc2 = &sdp3430_vmmc2,
483 .vsim = &sdp3430_vsim,
484 .vdac = &sdp3430_vdac,
485 .vpll2 = &sdp3430_vpll2,
486};
487
488static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = {
489 {
490 I2C_BOARD_INFO("twl4030", 0x48),
491 .flags = I2C_CLIENT_WAKE,
492 .irq = INT_34XX_SYS_NIRQ,
493 .platform_data = &sdp3430_twldata,
494 },
495};
496
497static int __init omap3430_i2c_init(void)
498{
499 /* i2c1 for PMIC only */
500 omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo,
501 ARRAY_SIZE(sdp3430_i2c_boardinfo));
502 /* i2c2 on camera connector (for sensor control) and optional isp1301 */
503 omap_register_i2c_bus(2, 400, NULL, 0);
504 /* i2c3 on display connector (for DVI, tfp410) */
505 omap_register_i2c_bus(3, 400, NULL, 0);
506 return 0;
507}
508
509static void __init omap_3430sdp_init(void)
510{
511 omap3430_i2c_init();
512 platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
513 omap_board_config = sdp3430_config;
514 omap_board_config_size = ARRAY_SIZE(sdp3430_config);
515 if (omap_rev() > OMAP3430_REV_ES1_0)
516 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
517 else
518 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1;
519 sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
520 spi_register_board_info(sdp3430_spi_board_info,
521 ARRAY_SIZE(sdp3430_spi_board_info));
522 ads7846_dev_init();
523 omap_serial_init();
524 usb_musb_init();
525}
526
527static void __init omap_3430sdp_map_io(void)
528{
529 omap2_set_globals_343x();
530 omap2_map_common_io();
531}
532
533MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
534 /* Maintainer: Syed Khasim - Texas Instruments Inc */
535 .phys_io = 0x48000000,
536 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
537 .boot_params = 0x80000100,
538 .map_io = omap_3430sdp_map_io,
539 .init_irq = omap_3430sdp_init_irq,
540 .init_machine = omap_3430sdp_init,
541 .timer = &omap_timer,
542MACHINE_END
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 0c911f414d8d..06dfba888b0c 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -51,6 +51,7 @@
51 51
52#define APOLLON_FLASH_CS 0 52#define APOLLON_FLASH_CS 0
53#define APOLLON_ETH_CS 1 53#define APOLLON_ETH_CS 1
54#define APOLLON_ETHR_GPIO_IRQ 74
54 55
55static struct mtd_partition apollon_partitions[] = { 56static struct mtd_partition apollon_partitions[] = {
56 { 57 {
@@ -272,7 +273,6 @@ static struct omap_lcd_config apollon_lcd_config __initdata = {
272 273
273static struct omap_board_config_kernel apollon_config[] = { 274static struct omap_board_config_kernel apollon_config[] = {
274 { OMAP_TAG_UART, &apollon_uart_config }, 275 { OMAP_TAG_UART, &apollon_uart_config },
275 { OMAP_TAG_USB, &apollon_usb_config },
276 { OMAP_TAG_LCD, &apollon_lcd_config }, 276 { OMAP_TAG_LCD, &apollon_lcd_config },
277}; 277};
278 278
@@ -299,6 +299,7 @@ static void __init apollon_usb_init(void)
299 omap_cfg_reg(P21_242X_GPIO12); 299 omap_cfg_reg(P21_242X_GPIO12);
300 gpio_request(12, "USB suspend"); 300 gpio_request(12, "USB suspend");
301 gpio_direction_output(12, 0); 301 gpio_direction_output(12, 0);
302 omap_usb_init(&apollon_usb_config);
302} 303}
303 304
304static void __init omap_apollon_init(void) 305static void __init omap_apollon_init(void)
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index ef55b45ab769..a0267a9ab466 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -47,6 +47,8 @@
47#define H4_FLASH_CS 0 47#define H4_FLASH_CS 0
48#define H4_SMC91X_CS 1 48#define H4_SMC91X_CS 1
49 49
50#define H4_ETHR_GPIO_IRQ 92
51
50static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 }; 52static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 };
51static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 }; 53static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 };
52 54
@@ -341,7 +343,7 @@ static inline void __init h4_init_debug(void)
341 udelay(100); 343 udelay(100);
342 344
343 omap_cfg_reg(M15_24XX_GPIO92); 345 omap_cfg_reg(M15_24XX_GPIO92);
344 if (debug_card_init(cs_mem_base, OMAP24XX_ETHR_GPIO_IRQ) < 0) 346 if (debug_card_init(cs_mem_base, H4_ETHR_GPIO_IRQ) < 0)
345 gpmc_cs_free(eth_cs); 347 gpmc_cs_free(eth_cs);
346 348
347out: 349out:
@@ -377,6 +379,39 @@ static struct omap_lcd_config h4_lcd_config __initdata = {
377 .ctrl_name = "internal", 379 .ctrl_name = "internal",
378}; 380};
379 381
382static struct omap_usb_config h4_usb_config __initdata = {
383#ifdef CONFIG_MACH_OMAP2_H4_USB1
384 /* NOTE: usb1 could also be used with 3 wire signaling */
385 .pins[1] = 4,
386#endif
387
388#ifdef CONFIG_MACH_OMAP_H4_OTG
389 /* S1.10 ON -- USB OTG port
390 * usb0 switched to Mini-AB port and isp1301 transceiver;
391 * S2.POS3 = OFF, S2.POS4 = ON ... to allow battery charging
392 */
393 .otg = 1,
394 .pins[0] = 4,
395#ifdef CONFIG_USB_GADGET_OMAP
396 /* use OTG cable, or standard A-to-MiniB */
397 .hmc_mode = 0x14, /* 0:dev/otg 1:host 2:disable */
398#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
399 /* use OTG cable, or NONSTANDARD (B-to-MiniB) */
400 .hmc_mode = 0x11, /* 0:host 1:host 2:disable */
401#endif /* XX */
402
403#else
404 /* S1.10 OFF -- usb "download port"
405 * usb0 switched to Mini-B port and isp1105 transceiver;
406 * S2.POS3 = ON, S2.POS4 = OFF ... to enable battery charging
407 */
408 .register_dev = 1,
409 .pins[0] = 3,
410/* .hmc_mode = 0x14,*/ /* 0:dev 1:host 2:disable */
411 .hmc_mode = 0x00, /* 0:dev|otg 1:disable 2:disable */
412#endif
413};
414
380static struct omap_board_config_kernel h4_config[] = { 415static struct omap_board_config_kernel h4_config[] = {
381 { OMAP_TAG_UART, &h4_uart_config }, 416 { OMAP_TAG_UART, &h4_uart_config },
382 { OMAP_TAG_LCD, &h4_lcd_config }, 417 { OMAP_TAG_LCD, &h4_lcd_config },
@@ -428,6 +463,7 @@ static void __init omap_h4_init(void)
428 platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); 463 platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
429 omap_board_config = h4_config; 464 omap_board_config = h4_config;
430 omap_board_config_size = ARRAY_SIZE(h4_config); 465 omap_board_config_size = ARRAY_SIZE(h4_config);
466 omap_usb_init(&h4_usb_config);
431 omap_serial_init(); 467 omap_serial_init();
432} 468}
433 469
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index c71580557c62..e096f776f996 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -29,7 +29,6 @@
29#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 30#include <asm/mach/map.h>
31 31
32#include <mach/board-ldp.h>
33#include <mach/mcspi.h> 32#include <mach/mcspi.h>
34#include <mach/gpio.h> 33#include <mach/gpio.h>
35#include <mach/board.h> 34#include <mach/board.h>
@@ -38,15 +37,19 @@
38 37
39#include <asm/delay.h> 38#include <asm/delay.h>
40#include <mach/control.h> 39#include <mach/control.h>
40#include <mach/usb.h>
41 41
42#include "mmc-twl4030.h" 42#include "mmc-twl4030.h"
43 43
44#define SDP3430_SMC91X_CS 3 44#define LDP_SMC911X_CS 1
45#define LDP_SMC911X_GPIO 152
46#define DEBUG_BASE 0x08000000
47#define LDP_ETHR_START DEBUG_BASE
45 48
46static struct resource ldp_smc911x_resources[] = { 49static struct resource ldp_smc911x_resources[] = {
47 [0] = { 50 [0] = {
48 .start = OMAP34XX_ETHR_START, 51 .start = LDP_ETHR_START,
49 .end = OMAP34XX_ETHR_START + SZ_4K, 52 .end = LDP_ETHR_START + SZ_4K,
50 .flags = IORESOURCE_MEM, 53 .flags = IORESOURCE_MEM,
51 }, 54 },
52 [1] = { 55 [1] = {
@@ -162,6 +165,7 @@ static void __init omap_ldp_init(void)
162 omap_board_config_size = ARRAY_SIZE(ldp_config); 165 omap_board_config_size = ARRAY_SIZE(ldp_config);
163 omap_serial_init(); 166 omap_serial_init();
164 twl4030_mmc_init(mmc); 167 twl4030_mmc_init(mmc);
168 usb_musb_init();
165} 169}
166 170
167static void __init omap_ldp_map_io(void) 171static void __init omap_ldp_map_io(void)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index b70b1e65034b..744740ae1b9c 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -41,6 +41,7 @@
41#include <mach/gpmc.h> 41#include <mach/gpmc.h>
42#include <mach/nand.h> 42#include <mach/nand.h>
43#include <mach/mux.h> 43#include <mach/mux.h>
44#include <mach/usb.h>
44 45
45#include "mmc-twl4030.h" 46#include "mmc-twl4030.h"
46 47
@@ -175,9 +176,6 @@ static int __init omap3_beagle_i2c_init(void)
175{ 176{
176 omap_register_i2c_bus(1, 2600, beagle_i2c_boardinfo, 177 omap_register_i2c_bus(1, 2600, beagle_i2c_boardinfo,
177 ARRAY_SIZE(beagle_i2c_boardinfo)); 178 ARRAY_SIZE(beagle_i2c_boardinfo));
178#ifdef CONFIG_I2C2_OMAP_BEAGLE
179 omap_register_i2c_bus(2, 400, NULL, 0);
180#endif
181 /* Bus 3 is attached to the DVI port where devices like the pico DLP 179 /* Bus 3 is attached to the DVI port where devices like the pico DLP
182 * projector don't work reliably with 400kHz */ 180 * projector don't work reliably with 400kHz */
183 omap_register_i2c_bus(3, 100, NULL, 0); 181 omap_register_i2c_bus(3, 100, NULL, 0);
@@ -316,6 +314,7 @@ static void __init omap3_beagle_init(void)
316 /* REVISIT leave DVI powered down until it's needed ... */ 314 /* REVISIT leave DVI powered down until it's needed ... */
317 gpio_direction_output(170, true); 315 gpio_direction_output(170, true);
318 316
317 usb_musb_init();
319 omap3beagle_flash_init(); 318 omap3beagle_flash_init();
320} 319}
321 320
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index b3196107afdb..16e2128daa12 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -34,6 +34,7 @@
34#include <mach/gpio.h> 34#include <mach/gpio.h>
35#include <mach/hardware.h> 35#include <mach/hardware.h>
36#include <mach/mcspi.h> 36#include <mach/mcspi.h>
37#include <mach/usb.h>
37 38
38#include "mmc-twl4030.h" 39#include "mmc-twl4030.h"
39 40
@@ -53,6 +54,13 @@ static struct twl4030_hsmmc_info omap3pandora_mmc[] = {
53 .gpio_cd = -EINVAL, 54 .gpio_cd = -EINVAL,
54 .gpio_wp = 127, 55 .gpio_wp = 127,
55 .ext_clock = 1, 56 .ext_clock = 1,
57 .transceiver = true,
58 },
59 {
60 .mmc = 3,
61 .wires = 4,
62 .gpio_cd = -EINVAL,
63 .gpio_wp = -EINVAL,
56 }, 64 },
57 {} /* Terminator */ 65 {} /* Terminator */
58}; 66};
@@ -193,6 +201,7 @@ static void __init omap3pandora_init(void)
193 spi_register_board_info(omap3pandora_spi_board_info, 201 spi_register_board_info(omap3pandora_spi_board_info,
194 ARRAY_SIZE(omap3pandora_spi_board_info)); 202 ARRAY_SIZE(omap3pandora_spi_board_info));
195 omap3pandora_ads7846_init(); 203 omap3pandora_ads7846_init();
204 usb_musb_init();
196} 205}
197 206
198static void __init omap3pandora_map_io(void) 207static void __init omap3pandora_map_io(void)
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 82b3dc557c96..782268c91942 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -37,20 +37,85 @@
37#include <asm/mach/flash.h> 37#include <asm/mach/flash.h>
38#include <asm/mach/map.h> 38#include <asm/mach/map.h>
39 39
40#include <mach/board-overo.h>
41#include <mach/board.h> 40#include <mach/board.h>
42#include <mach/common.h> 41#include <mach/common.h>
43#include <mach/gpio.h> 42#include <mach/gpio.h>
44#include <mach/gpmc.h> 43#include <mach/gpmc.h>
45#include <mach/hardware.h> 44#include <mach/hardware.h>
46#include <mach/nand.h> 45#include <mach/nand.h>
46#include <mach/usb.h>
47 47
48#include "mmc-twl4030.h" 48#include "mmc-twl4030.h"
49 49
50#define OVERO_GPIO_BT_XGATE 15
51#define OVERO_GPIO_W2W_NRESET 16
52#define OVERO_GPIO_BT_NRESET 164
53#define OVERO_GPIO_USBH_CPEN 168
54#define OVERO_GPIO_USBH_NRESET 183
55
50#define NAND_BLOCK_SIZE SZ_128K 56#define NAND_BLOCK_SIZE SZ_128K
51#define GPMC_CS0_BASE 0x60 57#define GPMC_CS0_BASE 0x60
52#define GPMC_CS_SIZE 0x30 58#define GPMC_CS_SIZE 0x30
53 59
60#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
61 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
62
63#include <mach/mcspi.h>
64#include <linux/spi/spi.h>
65#include <linux/spi/ads7846.h>
66
67static struct omap2_mcspi_device_config ads7846_mcspi_config = {
68 .turbo_mode = 0,
69 .single_channel = 1, /* 0: slave, 1: master */
70};
71
72static int ads7846_get_pendown_state(void)
73{
74 return !gpio_get_value(OVERO_GPIO_PENDOWN);
75}
76
77static struct ads7846_platform_data ads7846_config = {
78 .x_max = 0x0fff,
79 .y_max = 0x0fff,
80 .x_plate_ohms = 180,
81 .pressure_max = 255,
82 .debounce_max = 10,
83 .debounce_tol = 3,
84 .debounce_rep = 1,
85 .get_pendown_state = ads7846_get_pendown_state,
86 .keep_vref_on = 1,
87};
88
89static struct spi_board_info overo_spi_board_info[] __initdata = {
90 {
91 .modalias = "ads7846",
92 .bus_num = 1,
93 .chip_select = 0,
94 .max_speed_hz = 1500000,
95 .controller_data = &ads7846_mcspi_config,
96 .irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN),
97 .platform_data = &ads7846_config,
98 }
99};
100
101static void __init overo_ads7846_init(void)
102{
103 if ((gpio_request(OVERO_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) &&
104 (gpio_direction_input(OVERO_GPIO_PENDOWN) == 0)) {
105 gpio_export(OVERO_GPIO_PENDOWN, 0);
106 } else {
107 printk(KERN_ERR "could not obtain gpio for ADS7846_PENDOWN\n");
108 return;
109 }
110
111 spi_register_board_info(overo_spi_board_info,
112 ARRAY_SIZE(overo_spi_board_info));
113}
114
115#else
116static inline void __init overo_ads7846_init(void) { return; }
117#endif
118
54static struct mtd_partition overo_nand_partitions[] = { 119static struct mtd_partition overo_nand_partitions[] = {
55 { 120 {
56 .name = "xloader", 121 .name = "xloader",
@@ -209,6 +274,7 @@ static struct twl4030_hsmmc_info mmc[] __initdata = {
209 .wires = 4, 274 .wires = 4,
210 .gpio_cd = -EINVAL, 275 .gpio_cd = -EINVAL,
211 .gpio_wp = -EINVAL, 276 .gpio_wp = -EINVAL,
277 .transceiver = true,
212 }, 278 },
213 {} /* Terminator */ 279 {} /* Terminator */
214}; 280};
@@ -222,6 +288,8 @@ static void __init overo_init(void)
222 omap_serial_init(); 288 omap_serial_init();
223 twl4030_mmc_init(mmc); 289 twl4030_mmc_init(mmc);
224 overo_flash_init(); 290 overo_flash_init();
291 usb_musb_init();
292 overo_ads7846_init();
225 293
226 if ((gpio_request(OVERO_GPIO_W2W_NRESET, 294 if ((gpio_request(OVERO_GPIO_W2W_NRESET,
227 "OVERO_GPIO_W2W_NRESET") == 0) && 295 "OVERO_GPIO_W2W_NRESET") == 0) &&
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
new file mode 100644
index 000000000000..a7381729645c
--- /dev/null
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -0,0 +1,419 @@
1/*
2 * linux/arch/arm/mach-omap2/board-rx51-flash.c
3 *
4 * Copyright (C) 2008-2009 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/input.h>
15#include <linux/spi/spi.h>
16#include <linux/i2c.h>
17#include <linux/i2c/twl4030.h>
18#include <linux/clk.h>
19#include <linux/delay.h>
20#include <linux/regulator/machine.h>
21#include <linux/gpio.h>
22
23#include <mach/mcspi.h>
24#include <mach/mux.h>
25#include <mach/board.h>
26#include <mach/common.h>
27#include <mach/dma.h>
28#include <mach/gpmc.h>
29#include <mach/keypad.h>
30
31#include "mmc-twl4030.h"
32
33
34#define SMC91X_CS 1
35#define SMC91X_GPIO_IRQ 54
36#define SMC91X_GPIO_RESET 164
37#define SMC91X_GPIO_PWRDWN 86
38
39static struct resource rx51_smc91x_resources[] = {
40 [0] = {
41 .flags = IORESOURCE_MEM,
42 },
43 [1] = {
44 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
45 },
46};
47
48static struct platform_device rx51_smc91x_device = {
49 .name = "smc91x",
50 .id = -1,
51 .num_resources = ARRAY_SIZE(rx51_smc91x_resources),
52 .resource = rx51_smc91x_resources,
53};
54
55static int rx51_keymap[] = {
56 KEY(0, 0, KEY_Q),
57 KEY(0, 1, KEY_W),
58 KEY(0, 2, KEY_E),
59 KEY(0, 3, KEY_R),
60 KEY(0, 4, KEY_T),
61 KEY(0, 5, KEY_Y),
62 KEY(0, 6, KEY_U),
63 KEY(0, 7, KEY_I),
64 KEY(1, 0, KEY_O),
65 KEY(1, 1, KEY_D),
66 KEY(1, 2, KEY_DOT),
67 KEY(1, 3, KEY_V),
68 KEY(1, 4, KEY_DOWN),
69 KEY(2, 0, KEY_P),
70 KEY(2, 1, KEY_F),
71 KEY(2, 2, KEY_UP),
72 KEY(2, 3, KEY_B),
73 KEY(2, 4, KEY_RIGHT),
74 KEY(3, 0, KEY_COMMA),
75 KEY(3, 1, KEY_G),
76 KEY(3, 2, KEY_ENTER),
77 KEY(3, 3, KEY_N),
78 KEY(4, 0, KEY_BACKSPACE),
79 KEY(4, 1, KEY_H),
80 KEY(4, 3, KEY_M),
81 KEY(4, 4, KEY_LEFTCTRL),
82 KEY(5, 1, KEY_J),
83 KEY(5, 2, KEY_Z),
84 KEY(5, 3, KEY_SPACE),
85 KEY(5, 4, KEY_LEFTSHIFT),
86 KEY(6, 0, KEY_A),
87 KEY(6, 1, KEY_K),
88 KEY(6, 2, KEY_X),
89 KEY(6, 3, KEY_SPACE),
90 KEY(6, 4, KEY_FN),
91 KEY(7, 0, KEY_S),
92 KEY(7, 1, KEY_L),
93 KEY(7, 2, KEY_C),
94 KEY(7, 3, KEY_LEFT),
95 KEY(0xff, 0, KEY_F6),
96 KEY(0xff, 1, KEY_F7),
97 KEY(0xff, 2, KEY_F8),
98 KEY(0xff, 4, KEY_F9),
99 KEY(0xff, 5, KEY_F10),
100};
101
102static struct twl4030_keypad_data rx51_kp_data = {
103 .rows = 8,
104 .cols = 8,
105 .keymap = rx51_keymap,
106 .keymapsize = ARRAY_SIZE(rx51_keymap),
107 .rep = 1,
108};
109
110static struct platform_device *rx51_peripherals_devices[] = {
111 &rx51_smc91x_device,
112};
113
114/*
115 * Timings are taken from smsc-lan91c96-ms.pdf
116 */
117static int smc91x_init_gpmc(int cs)
118{
119 struct gpmc_timings t;
120 const int t2_r = 45; /* t2 in Figure 12.10 */
121 const int t2_w = 30; /* t2 in Figure 12.11 */
122 const int t3 = 15; /* t3 in Figure 12.10 */
123 const int t5_r = 0; /* t5 in Figure 12.10 */
124 const int t6_r = 45; /* t6 in Figure 12.10 */
125 const int t6_w = 0; /* t6 in Figure 12.11 */
126 const int t7_w = 15; /* t7 in Figure 12.11 */
127 const int t15 = 12; /* t15 in Figure 12.2 */
128 const int t20 = 185; /* t20 in Figure 12.2 */
129
130 memset(&t, 0, sizeof(t));
131
132 t.cs_on = t15;
133 t.cs_rd_off = t3 + t2_r + t5_r; /* Figure 12.10 */
134 t.cs_wr_off = t3 + t2_w + t6_w; /* Figure 12.11 */
135 t.adv_on = t3; /* Figure 12.10 */
136 t.adv_rd_off = t3 + t2_r; /* Figure 12.10 */
137 t.adv_wr_off = t3 + t2_w; /* Figure 12.11 */
138 t.oe_off = t3 + t2_r + t5_r; /* Figure 12.10 */
139 t.oe_on = t.oe_off - t6_r; /* Figure 12.10 */
140 t.we_off = t3 + t2_w + t6_w; /* Figure 12.11 */
141 t.we_on = t.we_off - t7_w; /* Figure 12.11 */
142 t.rd_cycle = t20; /* Figure 12.2 */
143 t.wr_cycle = t20; /* Figure 12.4 */
144 t.access = t3 + t2_r + t5_r; /* Figure 12.10 */
145 t.wr_access = t3 + t2_w + t6_w; /* Figure 12.11 */
146
147 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, GPMC_CONFIG1_DEVICESIZE_16);
148
149 return gpmc_cs_set_timings(cs, &t);
150}
151
152static void __init rx51_init_smc91x(void)
153{
154 unsigned long cs_mem_base;
155 int ret;
156
157 omap_cfg_reg(U8_34XX_GPIO54_DOWN);
158 omap_cfg_reg(G25_34XX_GPIO86_OUT);
159 omap_cfg_reg(H19_34XX_GPIO164_OUT);
160
161 if (gpmc_cs_request(SMC91X_CS, SZ_16M, &cs_mem_base) < 0) {
162 printk(KERN_ERR "Failed to request GPMC mem for smc91x\n");
163 return;
164 }
165
166 rx51_smc91x_resources[0].start = cs_mem_base + 0x300;
167 rx51_smc91x_resources[0].end = cs_mem_base + 0x30f;
168
169 smc91x_init_gpmc(SMC91X_CS);
170
171 if (gpio_request(SMC91X_GPIO_IRQ, "SMC91X irq") < 0)
172 goto free1;
173
174 gpio_direction_input(SMC91X_GPIO_IRQ);
175 rx51_smc91x_resources[1].start = gpio_to_irq(SMC91X_GPIO_IRQ);
176
177 ret = gpio_request(SMC91X_GPIO_PWRDWN, "SMC91X powerdown");
178 if (ret)
179 goto free2;
180 gpio_direction_output(SMC91X_GPIO_PWRDWN, 0);
181
182 ret = gpio_request(SMC91X_GPIO_RESET, "SMC91X reset");
183 if (ret)
184 goto free3;
185 gpio_direction_output(SMC91X_GPIO_RESET, 0);
186 gpio_set_value(SMC91X_GPIO_RESET, 1);
187 msleep(100);
188 gpio_set_value(SMC91X_GPIO_RESET, 0);
189
190 return;
191
192free3:
193 gpio_free(SMC91X_GPIO_PWRDWN);
194free2:
195 gpio_free(SMC91X_GPIO_IRQ);
196free1:
197 gpmc_cs_free(SMC91X_CS);
198
199 printk(KERN_ERR "Could not initialize smc91x\n");
200}
201
202static struct twl4030_madc_platform_data rx51_madc_data = {
203 .irq_line = 1,
204};
205
206static struct twl4030_hsmmc_info mmc[] = {
207 {
208 .name = "external",
209 .mmc = 1,
210 .wires = 4,
211 .cover_only = true,
212 .gpio_cd = 160,
213 .gpio_wp = -EINVAL,
214 },
215 {
216 .name = "internal",
217 .mmc = 2,
218 .wires = 8,
219 .gpio_cd = -EINVAL,
220 .gpio_wp = -EINVAL,
221 },
222 {} /* Terminator */
223};
224
225static struct regulator_consumer_supply rx51_vmmc1_supply = {
226 .supply = "vmmc",
227};
228
229static struct regulator_consumer_supply rx51_vmmc2_supply = {
230 .supply = "vmmc",
231};
232
233static struct regulator_consumer_supply rx51_vsim_supply = {
234 .supply = "vmmc_aux",
235};
236
237static struct regulator_init_data rx51_vaux1 = {
238 .constraints = {
239 .name = "V28",
240 .min_uV = 2800000,
241 .max_uV = 2800000,
242 .valid_modes_mask = REGULATOR_MODE_NORMAL
243 | REGULATOR_MODE_STANDBY,
244 .valid_ops_mask = REGULATOR_CHANGE_MODE
245 | REGULATOR_CHANGE_STATUS,
246 },
247};
248
249static struct regulator_init_data rx51_vaux2 = {
250 .constraints = {
251 .name = "VCSI",
252 .min_uV = 1800000,
253 .max_uV = 1800000,
254 .valid_modes_mask = REGULATOR_MODE_NORMAL
255 | REGULATOR_MODE_STANDBY,
256 .valid_ops_mask = REGULATOR_CHANGE_MODE
257 | REGULATOR_CHANGE_STATUS,
258 },
259};
260
261/* VAUX3 - adds more power to VIO_18 rail */
262static struct regulator_init_data rx51_vaux3 = {
263 .constraints = {
264 .name = "VCAM_DIG_18",
265 .min_uV = 1800000,
266 .max_uV = 1800000,
267 .apply_uV = true,
268 .valid_modes_mask = REGULATOR_MODE_NORMAL
269 | REGULATOR_MODE_STANDBY,
270 .valid_ops_mask = REGULATOR_CHANGE_MODE
271 | REGULATOR_CHANGE_STATUS,
272 },
273};
274
275static struct regulator_init_data rx51_vaux4 = {
276 .constraints = {
277 .name = "VCAM_ANA_28",
278 .min_uV = 2800000,
279 .max_uV = 2800000,
280 .apply_uV = true,
281 .valid_modes_mask = REGULATOR_MODE_NORMAL
282 | REGULATOR_MODE_STANDBY,
283 .valid_ops_mask = REGULATOR_CHANGE_MODE
284 | REGULATOR_CHANGE_STATUS,
285 },
286};
287
288static struct regulator_init_data rx51_vmmc1 = {
289 .constraints = {
290 .min_uV = 1850000,
291 .max_uV = 3150000,
292 .valid_modes_mask = REGULATOR_MODE_NORMAL
293 | REGULATOR_MODE_STANDBY,
294 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
295 | REGULATOR_CHANGE_MODE
296 | REGULATOR_CHANGE_STATUS,
297 },
298 .num_consumer_supplies = 1,
299 .consumer_supplies = &rx51_vmmc1_supply,
300};
301
302static struct regulator_init_data rx51_vmmc2 = {
303 .constraints = {
304 .name = "VMMC2_30",
305 .min_uV = 1850000,
306 .max_uV = 3150000,
307 .apply_uV = true,
308 .valid_modes_mask = REGULATOR_MODE_NORMAL
309 | REGULATOR_MODE_STANDBY,
310 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
311 | REGULATOR_CHANGE_MODE
312 | REGULATOR_CHANGE_STATUS,
313 },
314 .num_consumer_supplies = 1,
315 .consumer_supplies = &rx51_vmmc2_supply,
316};
317
318static struct regulator_init_data rx51_vsim = {
319 .constraints = {
320 .name = "VMMC2_IO_18",
321 .min_uV = 1800000,
322 .max_uV = 1800000,
323 .apply_uV = true,
324 .valid_modes_mask = REGULATOR_MODE_NORMAL
325 | REGULATOR_MODE_STANDBY,
326 .valid_ops_mask = REGULATOR_CHANGE_MODE
327 | REGULATOR_CHANGE_STATUS,
328 },
329 .num_consumer_supplies = 1,
330 .consumer_supplies = &rx51_vsim_supply,
331};
332
333static struct regulator_init_data rx51_vdac = {
334 .constraints = {
335 .min_uV = 1800000,
336 .max_uV = 1800000,
337 .valid_modes_mask = REGULATOR_MODE_NORMAL
338 | REGULATOR_MODE_STANDBY,
339 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
340 | REGULATOR_CHANGE_MODE
341 | REGULATOR_CHANGE_STATUS,
342 },
343};
344
345static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
346{
347 /* FIXME this gpio setup is just a placeholder for now */
348 gpio_request(gpio + 6, "backlight_pwm");
349 gpio_direction_output(gpio + 6, 0);
350 gpio_request(gpio + 7, "speaker_en");
351 gpio_direction_output(gpio + 7, 1);
352
353 /* set up MMC adapters, linking their regulators to them */
354 twl4030_mmc_init(mmc);
355 rx51_vmmc1_supply.dev = mmc[0].dev;
356 rx51_vmmc2_supply.dev = mmc[1].dev;
357 rx51_vsim_supply.dev = mmc[1].dev;
358
359 return 0;
360}
361
362static struct twl4030_gpio_platform_data rx51_gpio_data = {
363 .gpio_base = OMAP_MAX_GPIO_LINES,
364 .irq_base = TWL4030_GPIO_IRQ_BASE,
365 .irq_end = TWL4030_GPIO_IRQ_END,
366 .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
367 | BIT(4) | BIT(5)
368 | BIT(8) | BIT(9) | BIT(10) | BIT(11)
369 | BIT(12) | BIT(13) | BIT(14) | BIT(15)
370 | BIT(16) | BIT(17) ,
371 .setup = rx51_twlgpio_setup,
372};
373
374static struct twl4030_platform_data rx51_twldata = {
375 .irq_base = TWL4030_IRQ_BASE,
376 .irq_end = TWL4030_IRQ_END,
377
378 /* platform_data for children goes here */
379 .gpio = &rx51_gpio_data,
380 .keypad = &rx51_kp_data,
381 .madc = &rx51_madc_data,
382
383 .vaux1 = &rx51_vaux1,
384 .vaux2 = &rx51_vaux2,
385 .vaux3 = &rx51_vaux3,
386 .vaux4 = &rx51_vaux4,
387 .vmmc1 = &rx51_vmmc1,
388 .vmmc2 = &rx51_vmmc2,
389 .vsim = &rx51_vsim,
390 .vdac = &rx51_vdac,
391};
392
393static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = {
394 {
395 I2C_BOARD_INFO("twl5030", 0x48),
396 .flags = I2C_CLIENT_WAKE,
397 .irq = INT_34XX_SYS_NIRQ,
398 .platform_data = &rx51_twldata,
399 },
400};
401
402static int __init rx51_i2c_init(void)
403{
404 omap_register_i2c_bus(1, 2600, rx51_peripherals_i2c_board_info_1,
405 ARRAY_SIZE(rx51_peripherals_i2c_board_info_1));
406 omap_register_i2c_bus(2, 100, NULL, 0);
407 omap_register_i2c_bus(3, 400, NULL, 0);
408 return 0;
409}
410
411
412void __init rx51_peripherals_init(void)
413{
414 platform_add_devices(rx51_peripherals_devices,
415 ARRAY_SIZE(rx51_peripherals_devices));
416 rx51_i2c_init();
417 rx51_init_smc91x();
418}
419
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
new file mode 100644
index 000000000000..6a3c5e53d99c
--- /dev/null
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -0,0 +1,96 @@
1/*
2 * linux/arch/arm/mach-omap2/board-rx51.c
3 *
4 * Copyright (C) 2007, 2008 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/delay.h>
15#include <linux/err.h>
16#include <linux/clk.h>
17#include <linux/io.h>
18#include <linux/delay.h>
19#include <linux/gpio.h>
20
21#include <mach/hardware.h>
22#include <asm/mach-types.h>
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25
26#include <mach/mcspi.h>
27#include <mach/mux.h>
28#include <mach/board.h>
29#include <mach/common.h>
30#include <mach/keypad.h>
31#include <mach/dma.h>
32#include <mach/gpmc.h>
33#include <mach/usb.h>
34
35static struct omap_uart_config rx51_uart_config = {
36 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
37};
38
39static struct omap_lcd_config rx51_lcd_config = {
40 .ctrl_name = "internal",
41};
42
43static struct omap_fbmem_config rx51_fbmem0_config = {
44 .size = 752 * 1024,
45};
46
47static struct omap_fbmem_config rx51_fbmem1_config = {
48 .size = 752 * 1024,
49};
50
51static struct omap_fbmem_config rx51_fbmem2_config = {
52 .size = 752 * 1024,
53};
54
55static struct omap_board_config_kernel rx51_config[] = {
56 { OMAP_TAG_UART, &rx51_uart_config },
57 { OMAP_TAG_FBMEM, &rx51_fbmem0_config },
58 { OMAP_TAG_FBMEM, &rx51_fbmem1_config },
59 { OMAP_TAG_FBMEM, &rx51_fbmem2_config },
60 { OMAP_TAG_LCD, &rx51_lcd_config },
61};
62
63static void __init rx51_init_irq(void)
64{
65 omap2_init_common_hw();
66 omap_init_irq();
67 omap_gpio_init();
68}
69
70extern void __init rx51_peripherals_init(void);
71
72static void __init rx51_init(void)
73{
74 omap_board_config = rx51_config;
75 omap_board_config_size = ARRAY_SIZE(rx51_config);
76 omap_serial_init();
77 usb_musb_init();
78 rx51_peripherals_init();
79}
80
81static void __init rx51_map_io(void)
82{
83 omap2_set_globals_343x();
84 omap2_map_common_io();
85}
86
87MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
88 /* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */
89 .phys_io = 0x48000000,
90 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
91 .boot_params = 0x80000100,
92 .map_io = rx51_map_io,
93 .init_irq = rx51_init_irq,
94 .init_machine = rx51_init,
95 .timer = &omap_timer,
96MACHINE_END
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 8075f5868c38..d6b4b2f8722f 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -28,13 +28,121 @@
28#include <mach/eac.h> 28#include <mach/eac.h>
29#include <mach/mmc.h> 29#include <mach/mmc.h>
30 30
31#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) 31#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
32#define OMAP2_MBOX_BASE IO_ADDRESS(OMAP24XX_MAILBOX_BASE)
33 32
34static struct resource mbox_resources[] = { 33static struct resource cam_resources[] = {
35 { 34 {
36 .start = OMAP2_MBOX_BASE, 35 .start = OMAP24XX_CAMERA_BASE,
37 .end = OMAP2_MBOX_BASE + 0x11f, 36 .end = OMAP24XX_CAMERA_BASE + 0xfff,
37 .flags = IORESOURCE_MEM,
38 },
39 {
40 .start = INT_24XX_CAM_IRQ,
41 .flags = IORESOURCE_IRQ,
42 }
43};
44
45static struct platform_device omap_cam_device = {
46 .name = "omap24xxcam",
47 .id = -1,
48 .num_resources = ARRAY_SIZE(cam_resources),
49 .resource = cam_resources,
50};
51
52static inline void omap_init_camera(void)
53{
54 platform_device_register(&omap_cam_device);
55}
56
57#elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
58
59static struct resource omap3isp_resources[] = {
60 {
61 .start = OMAP3430_ISP_BASE,
62 .end = OMAP3430_ISP_END,
63 .flags = IORESOURCE_MEM,
64 },
65 {
66 .start = OMAP3430_ISP_CBUFF_BASE,
67 .end = OMAP3430_ISP_CBUFF_END,
68 .flags = IORESOURCE_MEM,
69 },
70 {
71 .start = OMAP3430_ISP_CCP2_BASE,
72 .end = OMAP3430_ISP_CCP2_END,
73 .flags = IORESOURCE_MEM,
74 },
75 {
76 .start = OMAP3430_ISP_CCDC_BASE,
77 .end = OMAP3430_ISP_CCDC_END,
78 .flags = IORESOURCE_MEM,
79 },
80 {
81 .start = OMAP3430_ISP_HIST_BASE,
82 .end = OMAP3430_ISP_HIST_END,
83 .flags = IORESOURCE_MEM,
84 },
85 {
86 .start = OMAP3430_ISP_H3A_BASE,
87 .end = OMAP3430_ISP_H3A_END,
88 .flags = IORESOURCE_MEM,
89 },
90 {
91 .start = OMAP3430_ISP_PREV_BASE,
92 .end = OMAP3430_ISP_PREV_END,
93 .flags = IORESOURCE_MEM,
94 },
95 {
96 .start = OMAP3430_ISP_RESZ_BASE,
97 .end = OMAP3430_ISP_RESZ_END,
98 .flags = IORESOURCE_MEM,
99 },
100 {
101 .start = OMAP3430_ISP_SBL_BASE,
102 .end = OMAP3430_ISP_SBL_END,
103 .flags = IORESOURCE_MEM,
104 },
105 {
106 .start = OMAP3430_ISP_CSI2A_BASE,
107 .end = OMAP3430_ISP_CSI2A_END,
108 .flags = IORESOURCE_MEM,
109 },
110 {
111 .start = OMAP3430_ISP_CSI2PHY_BASE,
112 .end = OMAP3430_ISP_CSI2PHY_END,
113 .flags = IORESOURCE_MEM,
114 },
115 {
116 .start = INT_34XX_CAM_IRQ,
117 .flags = IORESOURCE_IRQ,
118 }
119};
120
121static struct platform_device omap3isp_device = {
122 .name = "omap3isp",
123 .id = -1,
124 .num_resources = ARRAY_SIZE(omap3isp_resources),
125 .resource = omap3isp_resources,
126};
127
128static inline void omap_init_camera(void)
129{
130 platform_device_register(&omap3isp_device);
131}
132#else
133static inline void omap_init_camera(void)
134{
135}
136#endif
137
138#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
139
140#define MBOX_REG_SIZE 0x120
141
142static struct resource omap2_mbox_resources[] = {
143 {
144 .start = OMAP24XX_MAILBOX_BASE,
145 .end = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
38 .flags = IORESOURCE_MEM, 146 .flags = IORESOURCE_MEM,
39 }, 147 },
40 { 148 {
@@ -47,20 +155,40 @@ static struct resource mbox_resources[] = {
47 }, 155 },
48}; 156};
49 157
158static struct resource omap3_mbox_resources[] = {
159 {
160 .start = OMAP34XX_MAILBOX_BASE,
161 .end = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
162 .flags = IORESOURCE_MEM,
163 },
164 {
165 .start = INT_24XX_MAIL_U0_MPU,
166 .flags = IORESOURCE_IRQ,
167 },
168};
169
50static struct platform_device mbox_device = { 170static struct platform_device mbox_device = {
51 .name = "mailbox", 171 .name = "omap2-mailbox",
52 .id = -1, 172 .id = -1,
53 .num_resources = ARRAY_SIZE(mbox_resources),
54 .resource = mbox_resources,
55}; 173};
56 174
57static inline void omap_init_mbox(void) 175static inline void omap_init_mbox(void)
58{ 176{
177 if (cpu_is_omap2420()) {
178 mbox_device.num_resources = ARRAY_SIZE(omap2_mbox_resources);
179 mbox_device.resource = omap2_mbox_resources;
180 } else if (cpu_is_omap3430()) {
181 mbox_device.num_resources = ARRAY_SIZE(omap3_mbox_resources);
182 mbox_device.resource = omap3_mbox_resources;
183 } else {
184 pr_err("%s: platform not supported\n", __func__);
185 return;
186 }
59 platform_device_register(&mbox_device); 187 platform_device_register(&mbox_device);
60} 188}
61#else 189#else
62static inline void omap_init_mbox(void) { } 190static inline void omap_init_mbox(void) { }
63#endif 191#endif /* CONFIG_OMAP_MBOX_FWK */
64 192
65#if defined(CONFIG_OMAP_STI) 193#if defined(CONFIG_OMAP_STI)
66 194
@@ -507,6 +635,7 @@ static int __init omap2_init_devices(void)
507 * in alphabetical order so they're easier to sort through. 635 * in alphabetical order so they're easier to sort through.
508 */ 636 */
509 omap_hsmmc_reset(); 637 omap_hsmmc_reset();
638 omap_init_camera();
510 omap_init_mbox(); 639 omap_init_mbox();
511 omap_init_mcspi(); 640 omap_init_mcspi();
512 omap_hdq_init(); 641 omap_hdq_init();
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 32b7af3c610b..fd5b8a5925cc 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -1,9 +1,9 @@
1/* 1/*
2 * Mailbox reservation modules for OMAP2 2 * Mailbox reservation modules for OMAP2/3
3 * 3 *
4 * Copyright (C) 2006 Nokia Corporation 4 * Copyright (C) 2006-2009 Nokia Corporation
5 * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> 5 * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
6 * and Paul Mundt <paul.mundt@nokia.com> 6 * and Paul Mundt
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -18,40 +18,22 @@
18#include <mach/mailbox.h> 18#include <mach/mailbox.h>
19#include <mach/irqs.h> 19#include <mach/irqs.h>
20 20
21#define MAILBOX_REVISION 0x00 21#define MAILBOX_REVISION 0x000
22#define MAILBOX_SYSCONFIG 0x10 22#define MAILBOX_SYSCONFIG 0x010
23#define MAILBOX_SYSSTATUS 0x14 23#define MAILBOX_SYSSTATUS 0x014
24#define MAILBOX_MESSAGE_0 0x40 24#define MAILBOX_MESSAGE(m) (0x040 + 4 * (m))
25#define MAILBOX_MESSAGE_1 0x44 25#define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m))
26#define MAILBOX_MESSAGE_2 0x48 26#define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m))
27#define MAILBOX_MESSAGE_3 0x4c 27#define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u))
28#define MAILBOX_MESSAGE_4 0x50 28#define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u))
29#define MAILBOX_MESSAGE_5 0x54 29
30#define MAILBOX_FIFOSTATUS_0 0x80 30#define MAILBOX_IRQ_NEWMSG(u) (1 << (2 * (u)))
31#define MAILBOX_FIFOSTATUS_1 0x84 31#define MAILBOX_IRQ_NOTFULL(u) (1 << (2 * (u) + 1))
32#define MAILBOX_FIFOSTATUS_2 0x88 32
33#define MAILBOX_FIFOSTATUS_3 0x8c 33#define MBOX_REG_SIZE 0x120
34#define MAILBOX_FIFOSTATUS_4 0x90 34#define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32))
35#define MAILBOX_FIFOSTATUS_5 0x94 35
36#define MAILBOX_MSGSTATUS_0 0xc0 36static void __iomem *mbox_base;
37#define MAILBOX_MSGSTATUS_1 0xc4
38#define MAILBOX_MSGSTATUS_2 0xc8
39#define MAILBOX_MSGSTATUS_3 0xcc
40#define MAILBOX_MSGSTATUS_4 0xd0
41#define MAILBOX_MSGSTATUS_5 0xd4
42#define MAILBOX_IRQSTATUS_0 0x100
43#define MAILBOX_IRQENABLE_0 0x104
44#define MAILBOX_IRQSTATUS_1 0x108
45#define MAILBOX_IRQENABLE_1 0x10c
46#define MAILBOX_IRQSTATUS_2 0x110
47#define MAILBOX_IRQENABLE_2 0x114
48#define MAILBOX_IRQSTATUS_3 0x118
49#define MAILBOX_IRQENABLE_3 0x11c
50
51static unsigned long mbox_base;
52
53#define MAILBOX_IRQ_NOTFULL(n) (1 << (2 * (n) + 1))
54#define MAILBOX_IRQ_NEWMSG(n) (1 << (2 * (n)))
55 37
56struct omap_mbox2_fifo { 38struct omap_mbox2_fifo {
57 unsigned long msg; 39 unsigned long msg;
@@ -66,6 +48,7 @@ struct omap_mbox2_priv {
66 unsigned long irqstatus; 48 unsigned long irqstatus;
67 u32 newmsg_bit; 49 u32 newmsg_bit;
68 u32 notfull_bit; 50 u32 notfull_bit;
51 u32 ctx[MBOX_NR_REGS];
69}; 52};
70 53
71static struct clk *mbox_ick_handle; 54static struct clk *mbox_ick_handle;
@@ -73,14 +56,14 @@ static struct clk *mbox_ick_handle;
73static void omap2_mbox_enable_irq(struct omap_mbox *mbox, 56static void omap2_mbox_enable_irq(struct omap_mbox *mbox,
74 omap_mbox_type_t irq); 57 omap_mbox_type_t irq);
75 58
76static inline unsigned int mbox_read_reg(unsigned int reg) 59static inline unsigned int mbox_read_reg(size_t ofs)
77{ 60{
78 return __raw_readl(mbox_base + reg); 61 return __raw_readl(mbox_base + ofs);
79} 62}
80 63
81static inline void mbox_write_reg(unsigned int val, unsigned int reg) 64static inline void mbox_write_reg(u32 val, size_t ofs)
82{ 65{
83 __raw_writel(val, mbox_base + reg); 66 __raw_writel(val, mbox_base + ofs);
84} 67}
85 68
86/* Mailbox H/W preparations */ 69/* Mailbox H/W preparations */
@@ -95,6 +78,9 @@ static int omap2_mbox_startup(struct omap_mbox *mbox)
95 } 78 }
96 clk_enable(mbox_ick_handle); 79 clk_enable(mbox_ick_handle);
97 80
81 l = mbox_read_reg(MAILBOX_REVISION);
82 pr_info("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f));
83
98 /* set smart-idle & autoidle */ 84 /* set smart-idle & autoidle */
99 l = mbox_read_reg(MAILBOX_SYSCONFIG); 85 l = mbox_read_reg(MAILBOX_SYSCONFIG);
100 l |= 0x00000011; 86 l |= 0x00000011;
@@ -183,6 +169,32 @@ static int omap2_mbox_is_irq(struct omap_mbox *mbox,
183 return (enable & status & bit); 169 return (enable & status & bit);
184} 170}
185 171
172static void omap2_mbox_save_ctx(struct omap_mbox *mbox)
173{
174 int i;
175 struct omap_mbox2_priv *p = mbox->priv;
176
177 for (i = 0; i < MBOX_NR_REGS; i++) {
178 p->ctx[i] = mbox_read_reg(i * sizeof(u32));
179
180 dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
181 i, p->ctx[i]);
182 }
183}
184
185static void omap2_mbox_restore_ctx(struct omap_mbox *mbox)
186{
187 int i;
188 struct omap_mbox2_priv *p = mbox->priv;
189
190 for (i = 0; i < MBOX_NR_REGS; i++) {
191 mbox_write_reg(p->ctx[i], i * sizeof(u32));
192
193 dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
194 i, p->ctx[i]);
195 }
196}
197
186static struct omap_mbox_ops omap2_mbox_ops = { 198static struct omap_mbox_ops omap2_mbox_ops = {
187 .type = OMAP_MBOX_TYPE2, 199 .type = OMAP_MBOX_TYPE2,
188 .startup = omap2_mbox_startup, 200 .startup = omap2_mbox_startup,
@@ -195,6 +207,8 @@ static struct omap_mbox_ops omap2_mbox_ops = {
195 .disable_irq = omap2_mbox_disable_irq, 207 .disable_irq = omap2_mbox_disable_irq,
196 .ack_irq = omap2_mbox_ack_irq, 208 .ack_irq = omap2_mbox_ack_irq,
197 .is_irq = omap2_mbox_is_irq, 209 .is_irq = omap2_mbox_is_irq,
210 .save_ctx = omap2_mbox_save_ctx,
211 .restore_ctx = omap2_mbox_restore_ctx,
198}; 212};
199 213
200/* 214/*
@@ -209,15 +223,15 @@ static struct omap_mbox_ops omap2_mbox_ops = {
209/* DSP */ 223/* DSP */
210static struct omap_mbox2_priv omap2_mbox_dsp_priv = { 224static struct omap_mbox2_priv omap2_mbox_dsp_priv = {
211 .tx_fifo = { 225 .tx_fifo = {
212 .msg = MAILBOX_MESSAGE_0, 226 .msg = MAILBOX_MESSAGE(0),
213 .fifo_stat = MAILBOX_FIFOSTATUS_0, 227 .fifo_stat = MAILBOX_FIFOSTATUS(0),
214 }, 228 },
215 .rx_fifo = { 229 .rx_fifo = {
216 .msg = MAILBOX_MESSAGE_1, 230 .msg = MAILBOX_MESSAGE(1),
217 .msg_stat = MAILBOX_MSGSTATUS_1, 231 .msg_stat = MAILBOX_MSGSTATUS(1),
218 }, 232 },
219 .irqenable = MAILBOX_IRQENABLE_0, 233 .irqenable = MAILBOX_IRQENABLE(0),
220 .irqstatus = MAILBOX_IRQSTATUS_0, 234 .irqstatus = MAILBOX_IRQSTATUS(0),
221 .notfull_bit = MAILBOX_IRQ_NOTFULL(0), 235 .notfull_bit = MAILBOX_IRQ_NOTFULL(0),
222 .newmsg_bit = MAILBOX_IRQ_NEWMSG(1), 236 .newmsg_bit = MAILBOX_IRQ_NEWMSG(1),
223}; 237};
@@ -229,18 +243,18 @@ struct omap_mbox mbox_dsp_info = {
229}; 243};
230EXPORT_SYMBOL(mbox_dsp_info); 244EXPORT_SYMBOL(mbox_dsp_info);
231 245
232/* IVA */ 246#if defined(CONFIG_ARCH_OMAP2420) /* IVA */
233static struct omap_mbox2_priv omap2_mbox_iva_priv = { 247static struct omap_mbox2_priv omap2_mbox_iva_priv = {
234 .tx_fifo = { 248 .tx_fifo = {
235 .msg = MAILBOX_MESSAGE_2, 249 .msg = MAILBOX_MESSAGE(2),
236 .fifo_stat = MAILBOX_FIFOSTATUS_2, 250 .fifo_stat = MAILBOX_FIFOSTATUS(2),
237 }, 251 },
238 .rx_fifo = { 252 .rx_fifo = {
239 .msg = MAILBOX_MESSAGE_3, 253 .msg = MAILBOX_MESSAGE(3),
240 .msg_stat = MAILBOX_MSGSTATUS_3, 254 .msg_stat = MAILBOX_MSGSTATUS(3),
241 }, 255 },
242 .irqenable = MAILBOX_IRQENABLE_3, 256 .irqenable = MAILBOX_IRQENABLE(3),
243 .irqstatus = MAILBOX_IRQSTATUS_3, 257 .irqstatus = MAILBOX_IRQSTATUS(3),
244 .notfull_bit = MAILBOX_IRQ_NOTFULL(2), 258 .notfull_bit = MAILBOX_IRQ_NOTFULL(2),
245 .newmsg_bit = MAILBOX_IRQ_NEWMSG(3), 259 .newmsg_bit = MAILBOX_IRQ_NEWMSG(3),
246}; 260};
@@ -250,17 +264,12 @@ static struct omap_mbox mbox_iva_info = {
250 .ops = &omap2_mbox_ops, 264 .ops = &omap2_mbox_ops,
251 .priv = &omap2_mbox_iva_priv, 265 .priv = &omap2_mbox_iva_priv,
252}; 266};
267#endif
253 268
254static int __init omap2_mbox_probe(struct platform_device *pdev) 269static int __devinit omap2_mbox_probe(struct platform_device *pdev)
255{ 270{
256 struct resource *res; 271 struct resource *res;
257 int ret = 0; 272 int ret;
258
259 if (pdev->num_resources != 3) {
260 dev_err(&pdev->dev, "invalid number of resources: %d\n",
261 pdev->num_resources);
262 return -ENODEV;
263 }
264 273
265 /* MBOX base */ 274 /* MBOX base */
266 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 275 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -268,42 +277,61 @@ static int __init omap2_mbox_probe(struct platform_device *pdev)
268 dev_err(&pdev->dev, "invalid mem resource\n"); 277 dev_err(&pdev->dev, "invalid mem resource\n");
269 return -ENODEV; 278 return -ENODEV;
270 } 279 }
271 mbox_base = res->start; 280 mbox_base = ioremap(res->start, res->end - res->start);
281 if (!mbox_base)
282 return -ENOMEM;
272 283
273 /* DSP IRQ */ 284 /* DSP or IVA2 IRQ */
274 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 285 mbox_dsp_info.irq = platform_get_irq(pdev, 0);
275 if (unlikely(!res)) { 286 if (mbox_dsp_info.irq < 0) {
276 dev_err(&pdev->dev, "invalid irq resource\n"); 287 dev_err(&pdev->dev, "invalid irq resource\n");
277 return -ENODEV; 288 ret = -ENODEV;
289 goto err_dsp;
278 } 290 }
279 mbox_dsp_info.irq = res->start;
280 291
281 ret = omap_mbox_register(&mbox_dsp_info); 292 ret = omap_mbox_register(&pdev->dev, &mbox_dsp_info);
282 293 if (ret)
283 /* IVA IRQ */ 294 goto err_dsp;
284 res = platform_get_resource(pdev, IORESOURCE_IRQ, 1); 295
285 if (unlikely(!res)) { 296#if defined(CONFIG_ARCH_OMAP2420) /* IVA */
286 dev_err(&pdev->dev, "invalid irq resource\n"); 297 if (cpu_is_omap2420()) {
287 return -ENODEV; 298 /* IVA IRQ */
299 res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
300 if (unlikely(!res)) {
301 dev_err(&pdev->dev, "invalid irq resource\n");
302 ret = -ENODEV;
303 goto err_iva1;
304 }
305 mbox_iva_info.irq = res->start;
306 ret = omap_mbox_register(&pdev->dev, &mbox_iva_info);
307 if (ret)
308 goto err_iva1;
288 } 309 }
289 mbox_iva_info.irq = res->start; 310#endif
290 311 return 0;
291 ret = omap_mbox_register(&mbox_iva_info);
292 312
313err_iva1:
314 omap_mbox_unregister(&mbox_dsp_info);
315err_dsp:
316 iounmap(mbox_base);
293 return ret; 317 return ret;
294} 318}
295 319
296static int omap2_mbox_remove(struct platform_device *pdev) 320static int __devexit omap2_mbox_remove(struct platform_device *pdev)
297{ 321{
322#if defined(CONFIG_ARCH_OMAP2420)
323 omap_mbox_unregister(&mbox_iva_info);
324#endif
298 omap_mbox_unregister(&mbox_dsp_info); 325 omap_mbox_unregister(&mbox_dsp_info);
326 iounmap(mbox_base);
299 return 0; 327 return 0;
300} 328}
301 329
302static struct platform_driver omap2_mbox_driver = { 330static struct platform_driver omap2_mbox_driver = {
303 .probe = omap2_mbox_probe, 331 .probe = omap2_mbox_probe,
304 .remove = omap2_mbox_remove, 332 .remove = __devexit_p(omap2_mbox_remove),
305 .driver = { 333 .driver = {
306 .name = "mailbox", 334 .name = "omap2-mailbox",
307 }, 335 },
308}; 336};
309 337
@@ -320,4 +348,7 @@ static void __exit omap2_mbox_exit(void)
320module_init(omap2_mbox_init); 348module_init(omap2_mbox_init);
321module_exit(omap2_mbox_exit); 349module_exit(omap2_mbox_exit);
322 350
323MODULE_LICENSE("GPL"); 351MODULE_LICENSE("GPL v2");
352MODULE_DESCRIPTION("omap mailbox: omap2/3 architecture specific functions");
353MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>, Paul Mundt");
354MODULE_ALIAS("platform:omap2-mailbox");
diff --git a/arch/arm/mach-omap2/mmc-twl4030.c b/arch/arm/mach-omap2/mmc-twl4030.c
index 437f52073f6e..dc40b3e72206 100644
--- a/arch/arm/mach-omap2/mmc-twl4030.c
+++ b/arch/arm/mach-omap2/mmc-twl4030.c
@@ -17,6 +17,7 @@
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/i2c/twl4030.h> 19#include <linux/i2c/twl4030.h>
20#include <linux/regulator/machine.h>
20 21
21#include <mach/hardware.h> 22#include <mach/hardware.h>
22#include <mach/control.h> 23#include <mach/control.h>
@@ -44,6 +45,7 @@
44#define VMMC2_315V 0x0c 45#define VMMC2_315V 0x0c
45#define VMMC2_300V 0x0b 46#define VMMC2_300V 0x0b
46#define VMMC2_285V 0x0a 47#define VMMC2_285V 0x0a
48#define VMMC2_280V 0x09
47#define VMMC2_260V 0x08 49#define VMMC2_260V 0x08
48#define VMMC2_185V 0x06 50#define VMMC2_185V 0x06
49#define VMMC2_DEDICATED 0x2E 51#define VMMC2_DEDICATED 0x2E
@@ -59,8 +61,8 @@ static struct twl_mmc_controller {
59 struct omap_mmc_platform_data *mmc; 61 struct omap_mmc_platform_data *mmc;
60 u8 twl_vmmc_dev_grp; 62 u8 twl_vmmc_dev_grp;
61 u8 twl_mmc_dedicated; 63 u8 twl_mmc_dedicated;
62 char name[HSMMC_NAME_LEN]; 64 char name[HSMMC_NAME_LEN + 1];
63} hsmmc[] = { 65} hsmmc[OMAP34XX_NR_MMC] = {
64 { 66 {
65 .twl_vmmc_dev_grp = VMMC1_DEV_GRP, 67 .twl_vmmc_dev_grp = VMMC1_DEV_GRP,
66 .twl_mmc_dedicated = VMMC1_DEDICATED, 68 .twl_mmc_dedicated = VMMC1_DEDICATED,
@@ -98,6 +100,14 @@ static int twl_mmc_get_ro(struct device *dev, int slot)
98 return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); 100 return gpio_get_value_cansleep(mmc->slots[0].gpio_wp);
99} 101}
100 102
103static int twl_mmc_get_cover_state(struct device *dev, int slot)
104{
105 struct omap_mmc_platform_data *mmc = dev->platform_data;
106
107 /* NOTE: assumes card detect signal is active-low */
108 return !gpio_get_value_cansleep(mmc->slots[0].switch_pin);
109}
110
101/* 111/*
102 * MMC Slot Initialization. 112 * MMC Slot Initialization.
103 */ 113 */
@@ -166,66 +176,85 @@ static int twl_mmc_resume(struct device *dev, int slot)
166/* 176/*
167 * Sets the MMC voltage in twl4030 177 * Sets the MMC voltage in twl4030
168 */ 178 */
179
180#define MMC1_OCR (MMC_VDD_165_195 \
181 |MMC_VDD_28_29|MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32)
182#define MMC2_OCR (MMC_VDD_165_195 \
183 |MMC_VDD_25_26|MMC_VDD_26_27|MMC_VDD_27_28 \
184 |MMC_VDD_28_29|MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32)
185
169static int twl_mmc_set_voltage(struct twl_mmc_controller *c, int vdd) 186static int twl_mmc_set_voltage(struct twl_mmc_controller *c, int vdd)
170{ 187{
171 int ret; 188 int ret;
172 u8 vmmc, dev_grp_val; 189 u8 vmmc = 0, dev_grp_val;
173 190
174 switch (1 << vdd) { 191 if (!vdd)
175 case MMC_VDD_35_36: 192 goto doit;
176 case MMC_VDD_34_35: 193
177 case MMC_VDD_33_34: 194 if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP) {
178 case MMC_VDD_32_33: 195 /* VMMC1: max 220 mA. And for 8-bit mode,
179 case MMC_VDD_31_32: 196 * VSIM: max 50 mA
180 case MMC_VDD_30_31: 197 */
181 if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP) 198 switch (1 << vdd) {
182 vmmc = VMMC1_315V; 199 case MMC_VDD_165_195:
183 else
184 vmmc = VMMC2_315V;
185 break;
186 case MMC_VDD_29_30:
187 if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
188 vmmc = VMMC1_315V;
189 else
190 vmmc = VMMC2_300V;
191 break;
192 case MMC_VDD_27_28:
193 case MMC_VDD_26_27:
194 if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
195 vmmc = VMMC1_285V;
196 else
197 vmmc = VMMC2_285V;
198 break;
199 case MMC_VDD_25_26:
200 case MMC_VDD_24_25:
201 case MMC_VDD_23_24:
202 case MMC_VDD_22_23:
203 case MMC_VDD_21_22:
204 case MMC_VDD_20_21:
205 if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
206 vmmc = VMMC1_285V;
207 else
208 vmmc = VMMC2_260V;
209 break;
210 case MMC_VDD_165_195:
211 if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
212 vmmc = VMMC1_185V; 200 vmmc = VMMC1_185V;
213 else 201 /* and VSIM_180V */
202 break;
203 case MMC_VDD_28_29:
204 vmmc = VMMC1_285V;
205 /* and VSIM_280V */
206 break;
207 case MMC_VDD_29_30:
208 case MMC_VDD_30_31:
209 vmmc = VMMC1_300V;
210 /* and VSIM_300V */
211 break;
212 case MMC_VDD_31_32:
213 vmmc = VMMC1_315V;
214 /* error if VSIM needed */
215 break;
216 default:
217 return -EINVAL;
218 }
219 } else if (c->twl_vmmc_dev_grp == VMMC2_DEV_GRP) {
220 /* VMMC2: max 100 mA */
221 switch (1 << vdd) {
222 case MMC_VDD_165_195:
214 vmmc = VMMC2_185V; 223 vmmc = VMMC2_185V;
215 break; 224 break;
216 default: 225 case MMC_VDD_25_26:
217 vmmc = 0; 226 case MMC_VDD_26_27:
218 break; 227 vmmc = VMMC2_260V;
228 break;
229 case MMC_VDD_27_28:
230 vmmc = VMMC2_280V;
231 break;
232 case MMC_VDD_28_29:
233 vmmc = VMMC2_285V;
234 break;
235 case MMC_VDD_29_30:
236 case MMC_VDD_30_31:
237 vmmc = VMMC2_300V;
238 break;
239 case MMC_VDD_31_32:
240 vmmc = VMMC2_315V;
241 break;
242 default:
243 return -EINVAL;
244 }
245 } else {
246 return -EINVAL;
219 } 247 }
220 248
221 if (vmmc) 249doit:
250 if (vdd)
222 dev_grp_val = VMMC_DEV_GRP_P1; /* Power up */ 251 dev_grp_val = VMMC_DEV_GRP_P1; /* Power up */
223 else 252 else
224 dev_grp_val = LDO_CLR; /* Power down */ 253 dev_grp_val = LDO_CLR; /* Power down */
225 254
226 ret = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 255 ret = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
227 dev_grp_val, c->twl_vmmc_dev_grp); 256 dev_grp_val, c->twl_vmmc_dev_grp);
228 if (ret) 257 if (ret || !vdd)
229 return ret; 258 return ret;
230 259
231 ret = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 260 ret = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
@@ -242,6 +271,14 @@ static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
242 struct twl_mmc_controller *c = &hsmmc[0]; 271 struct twl_mmc_controller *c = &hsmmc[0];
243 struct omap_mmc_platform_data *mmc = dev->platform_data; 272 struct omap_mmc_platform_data *mmc = dev->platform_data;
244 273
274 /*
275 * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
276 * card using the same TWL VMMC1 supply (hsmmc[0]); OMAP has both
277 * 1.8V and 3.0V modes, controlled by the PBIAS register.
278 *
279 * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
280 * is most naturally TWL VSIM; those pins also use PBIAS.
281 */
245 if (power_on) { 282 if (power_on) {
246 if (cpu_is_omap2430()) { 283 if (cpu_is_omap2430()) {
247 reg = omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1); 284 reg = omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1);
@@ -298,6 +335,12 @@ static int twl_mmc2_set_power(struct device *dev, int slot, int power_on, int vd
298 struct twl_mmc_controller *c = &hsmmc[1]; 335 struct twl_mmc_controller *c = &hsmmc[1];
299 struct omap_mmc_platform_data *mmc = dev->platform_data; 336 struct omap_mmc_platform_data *mmc = dev->platform_data;
300 337
338 /*
339 * Assume TWL VMMC2 (hsmmc[1]) is used only to power the card ... OMAP
340 * VDDS is used to power the pins, optionally with a transceiver to
341 * support cards using voltages other than VDDS (1.8V nominal). When a
342 * transceiver is used, DAT3..7 are muxed as transceiver control pins.
343 */
301 if (power_on) { 344 if (power_on) {
302 if (mmc->slots[0].internal_clock) { 345 if (mmc->slots[0].internal_clock) {
303 u32 reg; 346 u32 reg;
@@ -314,6 +357,16 @@ static int twl_mmc2_set_power(struct device *dev, int slot, int power_on, int vd
314 return ret; 357 return ret;
315} 358}
316 359
360static int twl_mmc3_set_power(struct device *dev, int slot, int power_on,
361 int vdd)
362{
363 /*
364 * Assume MMC3 has self-powered device connected, for example on-board
365 * chip with external power source.
366 */
367 return 0;
368}
369
317static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata; 370static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata;
318 371
319void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers) 372void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
@@ -349,13 +402,13 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
349 return; 402 return;
350 } 403 }
351 404
352 sprintf(twl->name, "mmc%islot%i", c->mmc, 1); 405 if (c->name)
406 strncpy(twl->name, c->name, HSMMC_NAME_LEN);
407 else
408 snprintf(twl->name, ARRAY_SIZE(twl->name),
409 "mmc%islot%i", c->mmc, 1);
353 mmc->slots[0].name = twl->name; 410 mmc->slots[0].name = twl->name;
354 mmc->nr_slots = 1; 411 mmc->nr_slots = 1;
355 mmc->slots[0].ocr_mask = MMC_VDD_165_195 |
356 MMC_VDD_26_27 | MMC_VDD_27_28 |
357 MMC_VDD_29_30 |
358 MMC_VDD_30_31 | MMC_VDD_31_32;
359 mmc->slots[0].wires = c->wires; 412 mmc->slots[0].wires = c->wires;
360 mmc->slots[0].internal_clock = !c->ext_clock; 413 mmc->slots[0].internal_clock = !c->ext_clock;
361 mmc->dma_mask = 0xffffffff; 414 mmc->dma_mask = 0xffffffff;
@@ -369,7 +422,10 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
369 422
370 mmc->slots[0].switch_pin = c->gpio_cd; 423 mmc->slots[0].switch_pin = c->gpio_cd;
371 mmc->slots[0].card_detect_irq = gpio_to_irq(c->gpio_cd); 424 mmc->slots[0].card_detect_irq = gpio_to_irq(c->gpio_cd);
372 mmc->slots[0].card_detect = twl_mmc_card_detect; 425 if (c->cover_only)
426 mmc->slots[0].get_cover_state = twl_mmc_get_cover_state;
427 else
428 mmc->slots[0].card_detect = twl_mmc_card_detect;
373 } else 429 } else
374 mmc->slots[0].switch_pin = -EINVAL; 430 mmc->slots[0].switch_pin = -EINVAL;
375 431
@@ -385,24 +441,43 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
385 441
386 /* NOTE: we assume OMAP's MMC1 and MMC2 use 442 /* NOTE: we assume OMAP's MMC1 and MMC2 use
387 * the TWL4030's VMMC1 and VMMC2, respectively; 443 * the TWL4030's VMMC1 and VMMC2, respectively;
388 * and that OMAP's MMC3 isn't used. 444 * and that MMC3 device has it's own power source.
389 */ 445 */
390 446
391 switch (c->mmc) { 447 switch (c->mmc) {
392 case 1: 448 case 1:
393 mmc->slots[0].set_power = twl_mmc1_set_power; 449 mmc->slots[0].set_power = twl_mmc1_set_power;
450 mmc->slots[0].ocr_mask = MMC1_OCR;
394 break; 451 break;
395 case 2: 452 case 2:
396 mmc->slots[0].set_power = twl_mmc2_set_power; 453 mmc->slots[0].set_power = twl_mmc2_set_power;
454 if (c->transceiver)
455 mmc->slots[0].ocr_mask = MMC2_OCR;
456 else
457 mmc->slots[0].ocr_mask = MMC_VDD_165_195;
458 break;
459 case 3:
460 mmc->slots[0].set_power = twl_mmc3_set_power;
461 mmc->slots[0].ocr_mask = MMC_VDD_165_195;
397 break; 462 break;
398 default: 463 default:
399 pr_err("MMC%d configuration not supported!\n", c->mmc); 464 pr_err("MMC%d configuration not supported!\n", c->mmc);
465 kfree(mmc);
400 continue; 466 continue;
401 } 467 }
402 hsmmc_data[c->mmc - 1] = mmc; 468 hsmmc_data[c->mmc - 1] = mmc;
403 } 469 }
404 470
405 omap2_init_mmc(hsmmc_data, OMAP34XX_NR_MMC); 471 omap2_init_mmc(hsmmc_data, OMAP34XX_NR_MMC);
472
473 /* pass the device nodes back to board setup code */
474 for (c = controllers; c->mmc; c++) {
475 struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1];
476
477 if (!c->mmc || c->mmc > nr_hsmmc)
478 continue;
479 c->dev = mmc->dev;
480 }
406} 481}
407 482
408#endif 483#endif
diff --git a/arch/arm/mach-omap2/mmc-twl4030.h b/arch/arm/mach-omap2/mmc-twl4030.h
index e1c8076400ca..ea59e8624290 100644
--- a/arch/arm/mach-omap2/mmc-twl4030.h
+++ b/arch/arm/mach-omap2/mmc-twl4030.h
@@ -9,9 +9,13 @@
9struct twl4030_hsmmc_info { 9struct twl4030_hsmmc_info {
10 u8 mmc; /* controller 1/2/3 */ 10 u8 mmc; /* controller 1/2/3 */
11 u8 wires; /* 1/4/8 wires */ 11 u8 wires; /* 1/4/8 wires */
12 bool transceiver; /* MMC-2 option */
13 bool ext_clock; /* use external pin for input clock */
14 bool cover_only; /* No card detect - just cover switch */
12 int gpio_cd; /* or -EINVAL */ 15 int gpio_cd; /* or -EINVAL */
13 int gpio_wp; /* or -EINVAL */ 16 int gpio_wp; /* or -EINVAL */
14 int ext_clock:1; /* use external pin for input clock */ 17 char *name; /* or NULL for default */
18 struct device *dev; /* returned: pointer to mmc adapter */
15}; 19};
16 20
17#if defined(CONFIG_TWL4030_CORE) && \ 21#if defined(CONFIG_TWL4030_CORE) && \
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index dacb41f130c0..026c4fc883a7 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -453,10 +453,37 @@ MUX_CFG_34XX("AC1_3430_USB3FS_PHY_MM3_TXEN_N", 0x18a,
453 453
454 454
455/* 34XX GPIO - bidirectional, unless the name has an "_OUT" suffix. 455/* 34XX GPIO - bidirectional, unless the name has an "_OUT" suffix.
456 * (Always specify PIN_INPUT, except for names suffixed by "_OUT".)
456 * No internal pullup/pulldown without "_UP" or "_DOWN" suffix. 457 * No internal pullup/pulldown without "_UP" or "_DOWN" suffix.
457 */ 458 */
459MUX_CFG_34XX("AF26_34XX_GPIO0", 0x1e0,
460 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
461MUX_CFG_34XX("AF22_34XX_GPIO9", 0xa18,
462 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
458MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa, 463MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa,
459 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT) 464 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
465MUX_CFG_34XX("U8_34XX_GPIO54_OUT", 0x0b4,
466 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
467MUX_CFG_34XX("U8_34XX_GPIO54_DOWN", 0x0b4,
468 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLDOWN)
469MUX_CFG_34XX("L8_34XX_GPIO63", 0x0ce,
470 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
471MUX_CFG_34XX("G25_34XX_GPIO86_OUT", 0x0fc,
472 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
473MUX_CFG_34XX("AG4_34XX_GPIO134_OUT", 0x160,
474 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
475MUX_CFG_34XX("AE4_34XX_GPIO136_OUT", 0x164,
476 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
477MUX_CFG_34XX("AF6_34XX_GPIO140_UP", 0x16c,
478 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
479MUX_CFG_34XX("AE6_34XX_GPIO141", 0x16e,
480 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
481MUX_CFG_34XX("AF5_34XX_GPIO142", 0x170,
482 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
483MUX_CFG_34XX("AE5_34XX_GPIO143", 0x172,
484 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
485MUX_CFG_34XX("H19_34XX_GPIO164_OUT", 0x19c,
486 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
460MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6, 487MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6,
461 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT) 488 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
462}; 489};
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
new file mode 100644
index 000000000000..fc74e913c415
--- /dev/null
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -0,0 +1,187 @@
1/*
2 * linux/arch/arm/mach-omap2/usb-musb.c
3 *
4 * This file will contain the board specific details for the
5 * MENTOR USB OTG controller on OMAP3430
6 *
7 * Copyright (C) 2007-2008 Texas Instruments
8 * Copyright (C) 2008 Nokia Corporation
9 * Author: Vikram Pandita
10 *
11 * Generalization by:
12 * Felipe Balbi <felipe.balbi@nokia.com>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/types.h>
20#include <linux/errno.h>
21#include <linux/delay.h>
22#include <linux/platform_device.h>
23#include <linux/clk.h>
24#include <linux/dma-mapping.h>
25#include <linux/io.h>
26
27#include <linux/usb/musb.h>
28
29#include <mach/hardware.h>
30#include <mach/irqs.h>
31#include <mach/pm.h>
32#include <mach/mux.h>
33#include <mach/usb.h>
34
35static struct resource musb_resources[] = {
36 [0] = { /* start and end set dynamically */
37 .flags = IORESOURCE_MEM,
38 },
39 [1] = { /* general IRQ */
40 .start = INT_243X_HS_USB_MC,
41 .flags = IORESOURCE_IRQ,
42 },
43 [2] = { /* DMA IRQ */
44 .start = INT_243X_HS_USB_DMA,
45 .flags = IORESOURCE_IRQ,
46 },
47};
48
49static int clk_on;
50
51static int musb_set_clock(struct clk *clk, int state)
52{
53 if (state) {
54 if (clk_on > 0)
55 return -ENODEV;
56
57 clk_enable(clk);
58 clk_on = 1;
59 } else {
60 if (clk_on == 0)
61 return -ENODEV;
62
63 clk_disable(clk);
64 clk_on = 0;
65 }
66
67 return 0;
68}
69
70static struct musb_hdrc_eps_bits musb_eps[] = {
71 { "ep1_tx", 10, },
72 { "ep1_rx", 10, },
73 { "ep2_tx", 9, },
74 { "ep2_rx", 9, },
75 { "ep3_tx", 3, },
76 { "ep3_rx", 3, },
77 { "ep4_tx", 3, },
78 { "ep4_rx", 3, },
79 { "ep5_tx", 3, },
80 { "ep5_rx", 3, },
81 { "ep6_tx", 3, },
82 { "ep6_rx", 3, },
83 { "ep7_tx", 3, },
84 { "ep7_rx", 3, },
85 { "ep8_tx", 2, },
86 { "ep8_rx", 2, },
87 { "ep9_tx", 2, },
88 { "ep9_rx", 2, },
89 { "ep10_tx", 2, },
90 { "ep10_rx", 2, },
91 { "ep11_tx", 2, },
92 { "ep11_rx", 2, },
93 { "ep12_tx", 2, },
94 { "ep12_rx", 2, },
95 { "ep13_tx", 2, },
96 { "ep13_rx", 2, },
97 { "ep14_tx", 2, },
98 { "ep14_rx", 2, },
99 { "ep15_tx", 2, },
100 { "ep15_rx", 2, },
101};
102
103static struct musb_hdrc_config musb_config = {
104 .multipoint = 1,
105 .dyn_fifo = 1,
106 .soft_con = 1,
107 .dma = 1,
108 .num_eps = 16,
109 .dma_channels = 7,
110 .dma_req_chan = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3),
111 .ram_bits = 12,
112 .eps_bits = musb_eps,
113};
114
115static struct musb_hdrc_platform_data musb_plat = {
116#ifdef CONFIG_USB_MUSB_OTG
117 .mode = MUSB_OTG,
118#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
119 .mode = MUSB_HOST,
120#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
121 .mode = MUSB_PERIPHERAL,
122#endif
123 /* .clock is set dynamically */
124 .set_clock = musb_set_clock,
125 .config = &musb_config,
126
127 /* REVISIT charge pump on TWL4030 can supply up to
128 * 100 mA ... but this value is board-specific, like
129 * "mode", and should be passed to usb_musb_init().
130 */
131 .power = 50, /* up to 100 mA */
132};
133
134static u64 musb_dmamask = DMA_32BIT_MASK;
135
136static struct platform_device musb_device = {
137 .name = "musb_hdrc",
138 .id = -1,
139 .dev = {
140 .dma_mask = &musb_dmamask,
141 .coherent_dma_mask = DMA_32BIT_MASK,
142 .platform_data = &musb_plat,
143 },
144 .num_resources = ARRAY_SIZE(musb_resources),
145 .resource = musb_resources,
146};
147
148#ifdef CONFIG_NOP_USB_XCEIV
149static u64 nop_xceiv_dmamask = DMA_32BIT_MASK;
150
151static struct platform_device nop_xceiv_device = {
152 .name = "nop_usb_xceiv",
153 .id = -1,
154 .dev = {
155 .dma_mask = &nop_xceiv_dmamask,
156 .coherent_dma_mask = DMA_32BIT_MASK,
157 .platform_data = NULL,
158 },
159};
160#endif
161
162void __init usb_musb_init(void)
163{
164 if (cpu_is_omap243x())
165 musb_resources[0].start = OMAP243X_HS_BASE;
166 else
167 musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE;
168 musb_resources[0].end = musb_resources[0].start + SZ_8K - 1;
169
170 /*
171 * REVISIT: This line can be removed once all the platforms using
172 * musb_core.c have been converted to use use clkdev.
173 */
174 musb_plat.clock = "ick";
175
176#ifdef CONFIG_NOP_USB_XCEIV
177 if (platform_device_register(&nop_xceiv_device) < 0) {
178 printk(KERN_ERR "Unable to register NOP-XCEIV device\n");
179 return;
180 }
181#endif
182
183 if (platform_device_register(&musb_device) < 0) {
184 printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n");
185 return;
186 }
187}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-31 16:40:36 -0500