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authorDavid Brown <davidb@codeaurora.org>2011-03-17 01:13:16 -0400
committerDavid Brown <davidb@codeaurora.org>2011-03-17 01:13:16 -0400
commit92c260f755c42337c550d8ac1f8ccd1b32bffb20 (patch)
tree6d04fefc1adeecabfb2b00c201e0db78fa2b5529 /arch/arm/mach-omap2
parent8e76a80960bf06c245160a484d5a363ca6b520bb (diff)
parent05e34754518b6a90d5c392790c032575fab12d66 (diff)
Merge remote branch 'rmk/for-linus' into for-linus
* rmk/for-linus: (1557 commits) ARM: 6806/1: irq: introduce entry and exit functions for chained handlers ARM: 6781/1: Thumb-2: Work around buggy Thumb-2 short branch relocations in gas ARM: 6747/1: P2V: Thumb2 support ARM: 6798/1: aout-core: zero thread debug registers in a.out core dump ARM: 6796/1: Footbridge: Fix I/O mappings for NOMMU mode ARM: 6784/1: errata: no automatic Store Buffer drain on Cortex-A9 ARM: 6772/1: errata: possible fault MMU translations following an ASID switch ARM: 6776/1: mach-ux500: activate fix for errata 753970 ARM: 6794/1: SPEAr: Append UL to device address macros. ARM: 6793/1: SPEAr: Remove unused *_SIZE macros from spear*.h files ARM: 6792/1: SPEAr: Replace SIZE macro's with SZ_4K macros ARM: 6791/1: SPEAr3xx: Declare device structures after shirq code ARM: 6790/1: SPEAr: Clock Framework: Rename usbd clock and align apb_clk entry ARM: 6789/1: SPEAr3xx: Rename sdio to sdhci ARM: 6788/1: SPEAr: Include mach/hardware.h instead of mach/spear.h ARM: 6787/1: SPEAr: Reorder #includes in .h & .c files. ARM: 6681/1: SPEAr: add debugfs support to clk API ARM: 6703/1: SPEAr: update clk API support ARM: 6679/1: SPEAr: make clk API functions more generic ARM: 6737/1: SPEAr: formalized timer support ... Conflicts: arch/arm/mach-msm/board-msm7x27.c arch/arm/mach-msm/board-msm7x30.c arch/arm/mach-msm/board-qsd8x50.c arch/arm/mach-msm/board-sapphire.c arch/arm/mach-msm/include/mach/memory.h
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rw-r--r--arch/arm/mach-omap2/board-cm-t3517.c29
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c30
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c2
-rw-r--r--arch/arm/mach-omap2/board-rm680.c3
-rw-r--r--arch/arm/mach-omap2/clkt_dpll.c2
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c1
-rw-r--r--arch/arm/mach-omap2/clockdomain.c30
-rw-r--r--arch/arm/mach-omap2/clockdomains44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/dma.c2
-rw-r--r--arch/arm/mach-omap2/include/mach/debug-macro.S13
-rw-r--r--arch/arm/mach-omap2/include/mach/entry-macro.S14
-rw-r--r--arch/arm/mach-omap2/io.c6
-rw-r--r--arch/arm/mach-omap2/mailbox.c12
-rw-r--r--arch/arm/mach-omap2/mux.c5
-rw-r--r--arch/arm/mach-omap2/omap4-common.c7
-rw-r--r--arch/arm/mach-omap2/pm-debug.c8
-rw-r--r--arch/arm/mach-omap2/pm.h2
-rw-r--r--arch/arm/mach-omap2/pm24xx.c4
-rw-r--r--arch/arm/mach-omap2/pm34xx.c11
-rw-r--r--arch/arm/mach-omap2/powerdomain2xxx_3xxx.c1
-rw-r--r--arch/arm/mach-omap2/prcm_mpu44xx.h4
-rw-r--r--arch/arm/mach-omap2/serial.c4
-rw-r--r--arch/arm/mach-omap2/sleep24xx.S2
-rw-r--r--arch/arm/mach-omap2/sleep34xx.S2
-rw-r--r--arch/arm/mach-omap2/smartreflex.c48
-rw-r--r--arch/arm/mach-omap2/sram242x.S3
-rw-r--r--arch/arm/mach-omap2/sram243x.S3
-rw-r--r--arch/arm/mach-omap2/sram34xx.S1
-rw-r--r--arch/arm/mach-omap2/timer-gp.c23
-rw-r--r--arch/arm/mach-omap2/voltage.c1
31 files changed, 169 insertions, 107 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 1a2cf6226a55..b69fa0a0299e 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -45,6 +45,7 @@ config ARCH_OMAP4
45 select CPU_V7 45 select CPU_V7
46 select ARM_GIC 46 select ARM_GIC
47 select PL310_ERRATA_588369 47 select PL310_ERRATA_588369
48 select PL310_ERRATA_727915
48 select ARM_ERRATA_720789 49 select ARM_ERRATA_720789
49 select ARCH_HAS_OPP 50 select ARCH_HAS_OPP
50 select PM_OPP if PM 51 select PM_OPP if PM
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 5b0c77732dfc..8f9a64d650ee 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -124,8 +124,9 @@ static inline void cm_t3517_init_hecc(void) {}
124#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE) 124#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
125#define RTC_IO_GPIO (153) 125#define RTC_IO_GPIO (153)
126#define RTC_WR_GPIO (154) 126#define RTC_WR_GPIO (154)
127#define RTC_RD_GPIO (160) 127#define RTC_RD_GPIO (53)
128#define RTC_CS_GPIO (163) 128#define RTC_CS_GPIO (163)
129#define RTC_CS_EN_GPIO (160)
129 130
130struct v3020_platform_data cm_t3517_v3020_pdata = { 131struct v3020_platform_data cm_t3517_v3020_pdata = {
131 .use_gpio = 1, 132 .use_gpio = 1,
@@ -145,6 +146,16 @@ static struct platform_device cm_t3517_rtc_device = {
145 146
146static void __init cm_t3517_init_rtc(void) 147static void __init cm_t3517_init_rtc(void)
147{ 148{
149 int err;
150
151 err = gpio_request(RTC_CS_EN_GPIO, "rtc cs en");
152 if (err) {
153 pr_err("CM-T3517: rtc cs en gpio request failed: %d\n", err);
154 return;
155 }
156
157 gpio_direction_output(RTC_CS_EN_GPIO, 1);
158
148 platform_device_register(&cm_t3517_rtc_device); 159 platform_device_register(&cm_t3517_rtc_device);
149} 160}
150#else 161#else
@@ -214,12 +225,12 @@ static struct mtd_partition cm_t3517_nand_partitions[] = {
214 }, 225 },
215 { 226 {
216 .name = "linux", 227 .name = "linux",
217 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ 228 .offset = MTDPART_OFS_APPEND, /* Offset = 0x2A0000 */
218 .size = 32 * NAND_BLOCK_SIZE, 229 .size = 32 * NAND_BLOCK_SIZE,
219 }, 230 },
220 { 231 {
221 .name = "rootfs", 232 .name = "rootfs",
222 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ 233 .offset = MTDPART_OFS_APPEND, /* Offset = 0x6A0000 */
223 .size = MTDPART_SIZ_FULL, 234 .size = MTDPART_SIZ_FULL,
224 }, 235 },
225}; 236};
@@ -256,11 +267,19 @@ static void __init cm_t3517_init_irq(void)
256static struct omap_board_mux board_mux[] __initdata = { 267static struct omap_board_mux board_mux[] __initdata = {
257 /* GPIO186 - Green LED */ 268 /* GPIO186 - Green LED */
258 OMAP3_MUX(SYS_CLKOUT2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), 269 OMAP3_MUX(SYS_CLKOUT2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
259 /* RTC GPIOs: IO, WR#, RD#, CS# */ 270
271 /* RTC GPIOs: */
272 /* IO - GPIO153 */
260 OMAP3_MUX(MCBSP4_DR, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), 273 OMAP3_MUX(MCBSP4_DR, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
274 /* WR# - GPIO154 */
261 OMAP3_MUX(MCBSP4_DX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), 275 OMAP3_MUX(MCBSP4_DX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
262 OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), 276 /* RD# - GPIO53 */
277 OMAP3_MUX(GPMC_NCS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
278 /* CS# - GPIO163 */
263 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), 279 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
280 /* CS EN - GPIO160 */
281 OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
282
264 /* HSUSB1 RESET */ 283 /* HSUSB1 RESET */
265 OMAP3_MUX(UART2_TX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), 284 OMAP3_MUX(UART2_TX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
266 /* HSUSB2 RESET */ 285 /* HSUSB2 RESET */
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 00bb1fc5e017..9a2a31e011ce 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -115,9 +115,6 @@ static struct omap2_hsmmc_info mmc[] = {
115 115
116static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev) 116static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
117{ 117{
118 twl_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, REG_GPIODATADIR1);
119 twl_i2c_write_u8(TWL4030_MODULE_LED, 0x0, 0x0);
120
121 if (gpio_is_valid(dssdev->reset_gpio)) 118 if (gpio_is_valid(dssdev->reset_gpio))
122 gpio_set_value_cansleep(dssdev->reset_gpio, 1); 119 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
123 return 0; 120 return 0;
@@ -247,6 +244,8 @@ static struct gpio_led gpio_leds[];
247static int devkit8000_twl_gpio_setup(struct device *dev, 244static int devkit8000_twl_gpio_setup(struct device *dev,
248 unsigned gpio, unsigned ngpio) 245 unsigned gpio, unsigned ngpio)
249{ 246{
247 int ret;
248
250 omap_mux_init_gpio(29, OMAP_PIN_INPUT); 249 omap_mux_init_gpio(29, OMAP_PIN_INPUT);
251 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 250 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
252 mmc[0].gpio_cd = gpio + 0; 251 mmc[0].gpio_cd = gpio + 0;
@@ -255,17 +254,23 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
255 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ 254 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
256 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; 255 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
257 256
258 /* gpio + 1 is "LCD_PWREN" (out, active high) */ 257 /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
259 devkit8000_lcd_device.reset_gpio = gpio + 1; 258 devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0;
260 gpio_request(devkit8000_lcd_device.reset_gpio, "LCD_PWREN"); 259 ret = gpio_request_one(devkit8000_lcd_device.reset_gpio,
261 /* Disable until needed */ 260 GPIOF_DIR_OUT | GPIOF_INIT_LOW, "LCD_PWREN");
262 gpio_direction_output(devkit8000_lcd_device.reset_gpio, 0); 261 if (ret < 0) {
262 devkit8000_lcd_device.reset_gpio = -EINVAL;
263 printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
264 }
263 265
264 /* gpio + 7 is "DVI_PD" (out, active low) */ 266 /* gpio + 7 is "DVI_PD" (out, active low) */
265 devkit8000_dvi_device.reset_gpio = gpio + 7; 267 devkit8000_dvi_device.reset_gpio = gpio + 7;
266 gpio_request(devkit8000_dvi_device.reset_gpio, "DVI PowerDown"); 268 ret = gpio_request_one(devkit8000_dvi_device.reset_gpio,
267 /* Disable until needed */ 269 GPIOF_DIR_OUT | GPIOF_INIT_LOW, "DVI PowerDown");
268 gpio_direction_output(devkit8000_dvi_device.reset_gpio, 0); 270 if (ret < 0) {
271 devkit8000_dvi_device.reset_gpio = -EINVAL;
272 printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n");
273 }
269 274
270 return 0; 275 return 0;
271} 276}
@@ -275,8 +280,7 @@ static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
275 .irq_base = TWL4030_GPIO_IRQ_BASE, 280 .irq_base = TWL4030_GPIO_IRQ_BASE,
276 .irq_end = TWL4030_GPIO_IRQ_END, 281 .irq_end = TWL4030_GPIO_IRQ_END,
277 .use_leds = true, 282 .use_leds = true,
278 .pullups = BIT(1), 283 .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
279 .pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13)
280 | BIT(15) | BIT(16) | BIT(17), 284 | BIT(15) | BIT(16) | BIT(17),
281 .setup = devkit8000_twl_gpio_setup, 285 .setup = devkit8000_twl_gpio_setup,
282}; 286};
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index e001a048dc0c..e944025d5ef8 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -409,8 +409,6 @@ static void __init omap4_panda_init(void)
409 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices)); 409 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
410 omap_serial_init(); 410 omap_serial_init();
411 omap4_twl6030_hsmmc_init(mmc); 411 omap4_twl6030_hsmmc_init(mmc);
412 /* OMAP4 Panda uses internal transceiver so register nop transceiver */
413 usb_nop_xceiv_register();
414 omap4_ehci_init(); 412 omap4_ehci_init();
415 usb_musb_init(&musb_board_data); 413 usb_musb_init(&musb_board_data);
416} 414}
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index cb77be7ac44f..39a71bb8a308 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -40,9 +40,6 @@ static struct regulator_consumer_supply rm680_vemmc_consumers[] = {
40static struct regulator_init_data rm680_vemmc = { 40static struct regulator_init_data rm680_vemmc = {
41 .constraints = { 41 .constraints = {
42 .name = "rm680_vemmc", 42 .name = "rm680_vemmc",
43 .min_uV = 2900000,
44 .max_uV = 2900000,
45 .apply_uV = 1,
46 .valid_modes_mask = REGULATOR_MODE_NORMAL 43 .valid_modes_mask = REGULATOR_MODE_NORMAL
47 | REGULATOR_MODE_STANDBY, 44 | REGULATOR_MODE_STANDBY,
48 .valid_ops_mask = REGULATOR_CHANGE_STATUS 45 .valid_ops_mask = REGULATOR_CHANGE_STATUS
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 337392c3f549..acb7ae5b0a25 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -77,7 +77,7 @@ static int _dpll_test_fint(struct clk *clk, u8 n)
77 dd = clk->dpll_data; 77 dd = clk->dpll_data;
78 78
79 /* DPLL divider must result in a valid jitter correction val */ 79 /* DPLL divider must result in a valid jitter correction val */
80 fint = clk->parent->rate / (n + 1); 80 fint = clk->parent->rate / n;
81 if (fint < DPLL_FINT_BAND1_MIN) { 81 if (fint < DPLL_FINT_BAND1_MIN) {
82 82
83 pr_debug("rejecting n=%d due to Fint failure, " 83 pr_debug("rejecting n=%d due to Fint failure, "
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index e8cb32fd7f13..de9ec8ddd2ae 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -34,7 +34,6 @@
34#include "cm2_44xx.h" 34#include "cm2_44xx.h"
35#include "cm-regbits-44xx.h" 35#include "cm-regbits-44xx.h"
36#include "prm44xx.h" 36#include "prm44xx.h"
37#include "prm44xx.h"
38#include "prm-regbits-44xx.h" 37#include "prm-regbits-44xx.h"
39#include "control.h" 38#include "control.h"
40#include "scrm44xx.h" 39#include "scrm44xx.h"
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index e20b98636ab4..58e42f76603f 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -423,6 +423,12 @@ int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
423{ 423{
424 struct clkdm_dep *cd; 424 struct clkdm_dep *cd;
425 425
426 if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
427 pr_err("clockdomain: %s/%s: %s: not yet implemented\n",
428 clkdm1->name, clkdm2->name, __func__);
429 return -EINVAL;
430 }
431
426 if (!clkdm1 || !clkdm2) 432 if (!clkdm1 || !clkdm2)
427 return -EINVAL; 433 return -EINVAL;
428 434
@@ -458,6 +464,12 @@ int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
458{ 464{
459 struct clkdm_dep *cd; 465 struct clkdm_dep *cd;
460 466
467 if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
468 pr_err("clockdomain: %s/%s: %s: not yet implemented\n",
469 clkdm1->name, clkdm2->name, __func__);
470 return -EINVAL;
471 }
472
461 if (!clkdm1 || !clkdm2) 473 if (!clkdm1 || !clkdm2)
462 return -EINVAL; 474 return -EINVAL;
463 475
@@ -500,6 +512,12 @@ int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
500 if (!clkdm1 || !clkdm2) 512 if (!clkdm1 || !clkdm2)
501 return -EINVAL; 513 return -EINVAL;
502 514
515 if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
516 pr_err("clockdomain: %s/%s: %s: not yet implemented\n",
517 clkdm1->name, clkdm2->name, __func__);
518 return -EINVAL;
519 }
520
503 cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs); 521 cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs);
504 if (IS_ERR(cd)) { 522 if (IS_ERR(cd)) {
505 pr_debug("clockdomain: hardware cannot set/clear wake up of " 523 pr_debug("clockdomain: hardware cannot set/clear wake up of "
@@ -527,6 +545,12 @@ int clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
527 struct clkdm_dep *cd; 545 struct clkdm_dep *cd;
528 u32 mask = 0; 546 u32 mask = 0;
529 547
548 if (!cpu_is_omap24xx() && !cpu_is_omap34xx()) {
549 pr_err("clockdomain: %s: %s: not yet implemented\n",
550 clkdm->name, __func__);
551 return -EINVAL;
552 }
553
530 if (!clkdm) 554 if (!clkdm)
531 return -EINVAL; 555 return -EINVAL;
532 556
@@ -830,8 +854,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
830 * dependency code and data for OMAP4. 854 * dependency code and data for OMAP4.
831 */ 855 */
832 if (cpu_is_omap44xx()) { 856 if (cpu_is_omap44xx()) {
833 WARN_ONCE(1, "clockdomain: OMAP4 wakeup/sleep dependency " 857 pr_err("clockdomain: %s: OMAP4 wakeup/sleep dependency support: not yet implemented\n", clkdm->name);
834 "support is not yet implemented\n");
835 } else { 858 } else {
836 if (atomic_read(&clkdm->usecount) > 0) 859 if (atomic_read(&clkdm->usecount) > 0)
837 _clkdm_add_autodeps(clkdm); 860 _clkdm_add_autodeps(clkdm);
@@ -872,8 +895,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
872 * dependency code and data for OMAP4. 895 * dependency code and data for OMAP4.
873 */ 896 */
874 if (cpu_is_omap44xx()) { 897 if (cpu_is_omap44xx()) {
875 WARN_ONCE(1, "clockdomain: OMAP4 wakeup/sleep dependency " 898 pr_err("clockdomain: %s: OMAP4 wakeup/sleep dependency support: not yet implemented\n", clkdm->name);
876 "support is not yet implemented\n");
877 } else { 899 } else {
878 if (atomic_read(&clkdm->usecount) > 0) 900 if (atomic_read(&clkdm->usecount) > 0)
879 _clkdm_del_autodeps(clkdm); 901 _clkdm_del_autodeps(clkdm);
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index 51920fc7fc52..10622c914abc 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -30,8 +30,6 @@
30#include "cm1_44xx.h" 30#include "cm1_44xx.h"
31#include "cm2_44xx.h" 31#include "cm2_44xx.h"
32 32
33#include "cm1_44xx.h"
34#include "cm2_44xx.h"
35#include "cm-regbits-44xx.h" 33#include "cm-regbits-44xx.h"
36#include "prm44xx.h" 34#include "prm44xx.h"
37#include "prcm44xx.h" 35#include "prcm44xx.h"
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index d2f15f5cfd36..34922b2d2e3f 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -264,7 +264,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
264 if (IS_ERR(od)) { 264 if (IS_ERR(od)) {
265 pr_err("%s: Cant build omap_device for %s:%s.\n", 265 pr_err("%s: Cant build omap_device for %s:%s.\n",
266 __func__, name, oh->name); 266 __func__, name, oh->name);
267 return IS_ERR(od); 267 return PTR_ERR(od);
268 } 268 }
269 269
270 mem = platform_get_resource(&od->pdev, IORESOURCE_MEM, 0); 270 mem = platform_get_resource(&od->pdev, IORESOURCE_MEM, 0);
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S
index 6a4d4136002e..6049f465ec84 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -19,6 +19,9 @@
19 19
20#define UART_OFFSET(addr) ((addr) & 0x00ffffff) 20#define UART_OFFSET(addr) ((addr) & 0x00ffffff)
21 21
22#define omap_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET)
23#define omap_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET)
24
22 .pushsection .data 25 .pushsection .data
23omap_uart_phys: .word 0 26omap_uart_phys: .word 0
24omap_uart_virt: .word 0 27omap_uart_virt: .word 0
@@ -36,7 +39,7 @@ omap_uart_lsr: .word 0
36 /* Use omap_uart_phys/virt if already configured */ 39 /* Use omap_uart_phys/virt if already configured */
3710: mrc p15, 0, \rp, c1, c0 4010: mrc p15, 0, \rp, c1, c0
38 tst \rp, #1 @ MMU enabled? 41 tst \rp, #1 @ MMU enabled?
39 ldreq \rp, =__virt_to_phys(omap_uart_phys) @ MMU not enabled 42 ldreq \rp, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
40 ldrne \rp, =omap_uart_phys @ MMU enabled 43 ldrne \rp, =omap_uart_phys @ MMU enabled
41 add \rv, \rp, #4 @ omap_uart_virt 44 add \rv, \rp, #4 @ omap_uart_virt
42 ldr \rp, [\rp, #0] 45 ldr \rp, [\rp, #0]
@@ -49,7 +52,7 @@ omap_uart_lsr: .word 0
49 mrc p15, 0, \rp, c1, c0 52 mrc p15, 0, \rp, c1, c0
50 tst \rp, #1 @ MMU enabled? 53 tst \rp, #1 @ MMU enabled?
51 ldreq \rp, =OMAP_UART_INFO @ MMU not enabled 54 ldreq \rp, =OMAP_UART_INFO @ MMU not enabled
52 ldrne \rp, =__phys_to_virt(OMAP_UART_INFO) @ MMU enabled 55 ldrne \rp, =omap_uart_p2v(OMAP_UART_INFO) @ MMU enabled
53 ldr \rp, [\rp, #0] 56 ldr \rp, [\rp, #0]
54 57
55 /* Select the UART to use based on the UART1 scratchpad value */ 58 /* Select the UART to use based on the UART1 scratchpad value */
@@ -94,7 +97,7 @@ omap_uart_lsr: .word 0
9495: ldr \rp, =ZOOM_UART_BASE 9795: ldr \rp, =ZOOM_UART_BASE
95 mrc p15, 0, \rv, c1, c0 98 mrc p15, 0, \rv, c1, c0
96 tst \rv, #1 @ MMU enabled? 99 tst \rv, #1 @ MMU enabled?
97 ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled 100 ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
98 ldrne \rv, =omap_uart_phys @ MMU enabled 101 ldrne \rv, =omap_uart_phys @ MMU enabled
99 str \rp, [\rv, #0] 102 str \rp, [\rv, #0]
100 ldr \rp, =ZOOM_UART_VIRT 103 ldr \rp, =ZOOM_UART_VIRT
@@ -109,7 +112,7 @@ omap_uart_lsr: .word 0
10998: add \rp, \rp, #0x48000000 @ phys base 11298: add \rp, \rp, #0x48000000 @ phys base
110 mrc p15, 0, \rv, c1, c0 113 mrc p15, 0, \rv, c1, c0
111 tst \rv, #1 @ MMU enabled? 114 tst \rv, #1 @ MMU enabled?
112 ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled 115 ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
113 ldrne \rv, =omap_uart_phys @ MMU enabled 116 ldrne \rv, =omap_uart_phys @ MMU enabled
114 str \rp, [\rv, #0] 117 str \rp, [\rv, #0]
115 sub \rp, \rp, #0x48000000 @ phys base 118 sub \rp, \rp, #0x48000000 @ phys base
@@ -131,7 +134,7 @@ omap_uart_lsr: .word 0
131 .macro busyuart,rd,rx 134 .macro busyuart,rd,rx
1321001: mrc p15, 0, \rd, c1, c0 1351001: mrc p15, 0, \rd, c1, c0
133 tst \rd, #1 @ MMU enabled? 136 tst \rd, #1 @ MMU enabled?
134 ldreq \rd, =__virt_to_phys(omap_uart_lsr) @ MMU not enabled 137 ldreq \rd, =omap_uart_v2p(omap_uart_lsr) @ MMU disabled
135 ldrne \rd, =omap_uart_lsr @ MMU enabled 138 ldrne \rd, =omap_uart_lsr @ MMU enabled
136 ldr \rd, [\rd, #0] 139 ldr \rd, [\rd, #0]
137 ldrb \rd, [\rx, \rd] 140 ldrb \rd, [\rx, \rd]
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index befa321c4c13..81985a665cb3 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -38,20 +38,6 @@
38 */ 38 */
39 39
40#ifdef MULTI_OMAP2 40#ifdef MULTI_OMAP2
41
42/*
43 * We use __glue to avoid errors with multiple definitions of
44 * .globl omap_irq_base as it's included from entry-armv.S but not
45 * from entry-common.S.
46 */
47#ifdef __glue
48 .pushsection .data
49 .globl omap_irq_base
50omap_irq_base:
51 .word 0
52 .popsection
53#endif
54
55 /* 41 /*
56 * Configure the interrupt base on the first interrupt. 42 * Configure the interrupt base on the first interrupt.
57 * See also omap_irq_base_init for setting omap_irq_base. 43 * See also omap_irq_base_init for setting omap_irq_base.
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index e66687b0b9de..c2032041d26f 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -314,14 +314,13 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
314 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); 314 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
315} 315}
316 316
317void __iomem *omap_irq_base;
318
317/* 319/*
318 * Initialize asm_irq_base for entry-macro.S 320 * Initialize asm_irq_base for entry-macro.S
319 */ 321 */
320static inline void omap_irq_base_init(void) 322static inline void omap_irq_base_init(void)
321{ 323{
322 extern void __iomem *omap_irq_base;
323
324#ifdef MULTI_OMAP2
325 if (cpu_is_omap24xx()) 324 if (cpu_is_omap24xx())
326 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE); 325 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
327 else if (cpu_is_omap34xx()) 326 else if (cpu_is_omap34xx())
@@ -330,7 +329,6 @@ static inline void omap_irq_base_init(void)
330 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE); 329 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
331 else 330 else
332 pr_err("Could not initialize omap_irq_base\n"); 331 pr_err("Could not initialize omap_irq_base\n");
333#endif
334} 332}
335 333
336void __init omap2_init_common_infrastructure(void) 334void __init omap2_init_common_infrastructure(void)
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 394413dc7deb..24b88504df0f 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -193,10 +193,12 @@ static void omap2_mbox_disable_irq(struct omap_mbox *mbox,
193 omap_mbox_type_t irq) 193 omap_mbox_type_t irq)
194{ 194{
195 struct omap_mbox2_priv *p = mbox->priv; 195 struct omap_mbox2_priv *p = mbox->priv;
196 u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; 196 u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
197 l = mbox_read_reg(p->irqdisable); 197
198 l &= ~bit; 198 if (!cpu_is_omap44xx())
199 mbox_write_reg(l, p->irqdisable); 199 bit = mbox_read_reg(p->irqdisable) & ~bit;
200
201 mbox_write_reg(bit, p->irqdisable);
200} 202}
201 203
202static void omap2_mbox_ack_irq(struct omap_mbox *mbox, 204static void omap2_mbox_ack_irq(struct omap_mbox *mbox,
@@ -334,7 +336,7 @@ static struct omap_mbox mbox_iva_info = {
334 .priv = &omap2_mbox_iva_priv, 336 .priv = &omap2_mbox_iva_priv,
335}; 337};
336 338
337struct omap_mbox *omap2_mboxes[] = { &mbox_iva_info, &mbox_dsp_info, NULL }; 339struct omap_mbox *omap2_mboxes[] = { &mbox_dsp_info, &mbox_iva_info, NULL };
338#endif 340#endif
339 341
340#if defined(CONFIG_ARCH_OMAP4) 342#if defined(CONFIG_ARCH_OMAP4)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index df8d2f2872c6..6c84659cf846 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -160,7 +160,7 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
160 struct omap_mux *mux = NULL; 160 struct omap_mux *mux = NULL;
161 struct omap_mux_entry *e; 161 struct omap_mux_entry *e;
162 const char *mode_name; 162 const char *mode_name;
163 int found = 0, found_mode, mode0_len = 0; 163 int found = 0, found_mode = 0, mode0_len = 0;
164 struct list_head *muxmodes = &partition->muxmodes; 164 struct list_head *muxmodes = &partition->muxmodes;
165 165
166 mode_name = strchr(muxname, '.'); 166 mode_name = strchr(muxname, '.');
@@ -605,7 +605,7 @@ static void __init omap_mux_dbg_create_entry(
605 list_for_each_entry(e, &partition->muxmodes, node) { 605 list_for_each_entry(e, &partition->muxmodes, node) {
606 struct omap_mux *m = &e->mux; 606 struct omap_mux *m = &e->mux;
607 607
608 (void)debugfs_create_file(m->muxnames[0], S_IWUGO, mux_dbg_dir, 608 (void)debugfs_create_file(m->muxnames[0], S_IWUSR, mux_dbg_dir,
609 m, &omap_mux_dbg_signal_fops); 609 m, &omap_mux_dbg_signal_fops);
610 } 610 }
611} 611}
@@ -1000,6 +1000,7 @@ int __init omap_mux_init(const char *name, u32 flags,
1000 if (!partition->base) { 1000 if (!partition->base) {
1001 pr_err("%s: Could not ioremap mux partition at 0x%08x\n", 1001 pr_err("%s: Could not ioremap mux partition at 0x%08x\n",
1002 __func__, partition->phys); 1002 __func__, partition->phys);
1003 kfree(partition);
1003 return -ENODEV; 1004 return -ENODEV;
1004 } 1005 }
1005 1006
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 19268647ce36..9ef8c29dd817 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -52,6 +52,12 @@ static void omap4_l2x0_disable(void)
52 omap_smc1(0x102, 0x0); 52 omap_smc1(0x102, 0x0);
53} 53}
54 54
55static void omap4_l2x0_set_debug(unsigned long val)
56{
57 /* Program PL310 L2 Cache controller debug register */
58 omap_smc1(0x100, val);
59}
60
55static int __init omap_l2_cache_init(void) 61static int __init omap_l2_cache_init(void)
56{ 62{
57 u32 aux_ctrl = 0; 63 u32 aux_ctrl = 0;
@@ -99,6 +105,7 @@ static int __init omap_l2_cache_init(void)
99 * specific one 105 * specific one
100 */ 106 */
101 outer_cache.disable = omap4_l2x0_disable; 107 outer_cache.disable = omap4_l2x0_disable;
108 outer_cache.set_debug = omap4_l2x0_set_debug;
102 109
103 return 0; 110 return 0;
104} 111}
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 125f56591fb5..a5a83b358ddd 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -637,14 +637,14 @@ static int __init pm_dbg_init(void)
637 637
638 } 638 }
639 639
640 (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUGO, d, 640 (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUSR, d,
641 &enable_off_mode, &pm_dbg_option_fops); 641 &enable_off_mode, &pm_dbg_option_fops);
642 (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUGO, d, 642 (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d,
643 &sleep_while_idle, &pm_dbg_option_fops); 643 &sleep_while_idle, &pm_dbg_option_fops);
644 (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUGO, d, 644 (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUSR, d,
645 &wakeup_timer_seconds, &pm_dbg_option_fops); 645 &wakeup_timer_seconds, &pm_dbg_option_fops);
646 (void) debugfs_create_file("wakeup_timer_milliseconds", 646 (void) debugfs_create_file("wakeup_timer_milliseconds",
647 S_IRUGO | S_IWUGO, d, &wakeup_timer_milliseconds, 647 S_IRUGO | S_IWUSR, d, &wakeup_timer_milliseconds,
648 &pm_dbg_option_fops); 648 &pm_dbg_option_fops);
649 pm_dbg_init_done = 1; 649 pm_dbg_init_done = 1;
650 650
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 1c1b0ab5b978..39580e6060e8 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -92,7 +92,7 @@ extern void omap24xx_idle_loop_suspend(void);
92extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl, 92extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
93 void __iomem *sdrc_power); 93 void __iomem *sdrc_power);
94extern void omap34xx_cpu_suspend(u32 *addr, int save_state); 94extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
95extern void save_secure_ram_context(u32 *addr); 95extern int save_secure_ram_context(u32 *addr);
96extern void omap3_save_scratchpad_contents(void); 96extern void omap3_save_scratchpad_contents(void);
97 97
98extern unsigned int omap24xx_idle_loop_suspend_sz; 98extern unsigned int omap24xx_idle_loop_suspend_sz;
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 9e5dc8ed51e9..97feb3ab6a69 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -134,7 +134,7 @@ static void omap2_enter_full_retention(void)
134 134
135 /* Block console output in case it is on one of the OMAP UARTs */ 135 /* Block console output in case it is on one of the OMAP UARTs */
136 if (!is_suspending()) 136 if (!is_suspending())
137 if (try_acquire_console_sem()) 137 if (!console_trylock())
138 goto no_sleep; 138 goto no_sleep;
139 139
140 omap_uart_prepare_idle(0); 140 omap_uart_prepare_idle(0);
@@ -151,7 +151,7 @@ static void omap2_enter_full_retention(void)
151 omap_uart_resume_idle(0); 151 omap_uart_resume_idle(0);
152 152
153 if (!is_suspending()) 153 if (!is_suspending())
154 release_console_sem(); 154 console_unlock();
155 155
156no_sleep: 156no_sleep:
157 if (omap2_pm_debug) { 157 if (omap2_pm_debug) {
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 8cbbeade4b8a..2f864e4b085d 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -168,9 +168,10 @@ static void omap3_core_restore_context(void)
168 * once during boot sequence, but this works as we are not using secure 168 * once during boot sequence, but this works as we are not using secure
169 * services. 169 * services.
170 */ 170 */
171static void omap3_save_secure_ram_context(u32 target_mpu_state) 171static void omap3_save_secure_ram_context(void)
172{ 172{
173 u32 ret; 173 u32 ret;
174 int mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
174 175
175 if (omap_type() != OMAP2_DEVICE_TYPE_GP) { 176 if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
176 /* 177 /*
@@ -181,7 +182,7 @@ static void omap3_save_secure_ram_context(u32 target_mpu_state)
181 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); 182 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
182 ret = _omap_save_secure_sram((u32 *) 183 ret = _omap_save_secure_sram((u32 *)
183 __pa(omap3_secure_ram_storage)); 184 __pa(omap3_secure_ram_storage));
184 pwrdm_set_next_pwrst(mpu_pwrdm, target_mpu_state); 185 pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
185 /* Following is for error tracking, it should not happen */ 186 /* Following is for error tracking, it should not happen */
186 if (ret) { 187 if (ret) {
187 printk(KERN_ERR "save_secure_sram() returns %08x\n", 188 printk(KERN_ERR "save_secure_sram() returns %08x\n",
@@ -398,7 +399,7 @@ void omap_sram_idle(void)
398 if (!is_suspending()) 399 if (!is_suspending())
399 if (per_next_state < PWRDM_POWER_ON || 400 if (per_next_state < PWRDM_POWER_ON ||
400 core_next_state < PWRDM_POWER_ON) 401 core_next_state < PWRDM_POWER_ON)
401 if (try_acquire_console_sem()) 402 if (!console_trylock())
402 goto console_still_active; 403 goto console_still_active;
403 404
404 /* PER */ 405 /* PER */
@@ -481,7 +482,7 @@ void omap_sram_idle(void)
481 } 482 }
482 483
483 if (!is_suspending()) 484 if (!is_suspending())
484 release_console_sem(); 485 console_unlock();
485 486
486console_still_active: 487console_still_active:
487 /* Disable IO-PAD and IO-CHAIN wakeup */ 488 /* Disable IO-PAD and IO-CHAIN wakeup */
@@ -1094,7 +1095,7 @@ static int __init omap3_pm_init(void)
1094 local_fiq_disable(); 1095 local_fiq_disable();
1095 1096
1096 omap_dma_global_context_save(); 1097 omap_dma_global_context_save();
1097 omap3_save_secure_ram_context(PWRDM_POWER_ON); 1098 omap3_save_secure_ram_context();
1098 omap_dma_global_context_restore(); 1099 omap_dma_global_context_restore();
1099 1100
1100 local_irq_enable(); 1101 local_irq_enable();
diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
index d5233890370c..cf600e22bf8e 100644
--- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
@@ -19,7 +19,6 @@
19#include <plat/prcm.h> 19#include <plat/prcm.h>
20 20
21#include "powerdomain.h" 21#include "powerdomain.h"
22#include "prm-regbits-34xx.h"
23#include "prm.h" 22#include "prm.h"
24#include "prm-regbits-24xx.h" 23#include "prm-regbits-24xx.h"
25#include "prm-regbits-34xx.h" 24#include "prm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h
index 729a644ce852..3300ff6e3cfe 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.h
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.h
@@ -38,8 +38,8 @@
38#define OMAP4430_PRCM_MPU_CPU1_INST 0x0800 38#define OMAP4430_PRCM_MPU_CPU1_INST 0x0800
39 39
40/* PRCM_MPU clockdomain register offsets (from instance start) */ 40/* PRCM_MPU clockdomain register offsets (from instance start) */
41#define OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS 0x0000 41#define OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS 0x0018
42#define OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS 0x0000 42#define OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS 0x0018
43 43
44 44
45/* 45/*
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 302da7403a10..32e91a9c8b6b 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -812,7 +812,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
812 812
813 oh->dev_attr = uart; 813 oh->dev_attr = uart;
814 814
815 acquire_console_sem(); /* in case the earlycon is on the UART */ 815 console_lock(); /* in case the earlycon is on the UART */
816 816
817 /* 817 /*
818 * Because of early UART probing, UART did not get idled 818 * Because of early UART probing, UART did not get idled
@@ -838,7 +838,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
838 omap_uart_block_sleep(uart); 838 omap_uart_block_sleep(uart);
839 uart->timeout = DEFAULT_TIMEOUT; 839 uart->timeout = DEFAULT_TIMEOUT;
840 840
841 release_console_sem(); 841 console_unlock();
842 842
843 if ((cpu_is_omap34xx() && uart->padconf) || 843 if ((cpu_is_omap34xx() && uart->padconf) ||
844 (uart->wk_en && uart->wk_mask)) { 844 (uart->wk_en && uart->wk_mask)) {
diff --git a/arch/arm/mach-omap2/sleep24xx.S b/arch/arm/mach-omap2/sleep24xx.S
index c7780cc8d919..b5071a47ec39 100644
--- a/arch/arm/mach-omap2/sleep24xx.S
+++ b/arch/arm/mach-omap2/sleep24xx.S
@@ -47,6 +47,7 @@
47 * Note: This code get's copied to internal SRAM at boot. When the OMAP 47 * Note: This code get's copied to internal SRAM at boot. When the OMAP
48 * wakes up it continues execution at the point it went to sleep. 48 * wakes up it continues execution at the point it went to sleep.
49 */ 49 */
50 .align 3
50ENTRY(omap24xx_idle_loop_suspend) 51ENTRY(omap24xx_idle_loop_suspend)
51 stmfd sp!, {r0, lr} @ save registers on stack 52 stmfd sp!, {r0, lr} @ save registers on stack
52 mov r0, #0 @ clear for mcr setup 53 mov r0, #0 @ clear for mcr setup
@@ -82,6 +83,7 @@ ENTRY(omap24xx_idle_loop_suspend_sz)
82 * The DLL load value is not kept in RETENTION or OFF. It needs to be restored 83 * The DLL load value is not kept in RETENTION or OFF. It needs to be restored
83 * at wake 84 * at wake
84 */ 85 */
86 .align 3
85ENTRY(omap24xx_cpu_suspend) 87ENTRY(omap24xx_cpu_suspend)
86 stmfd sp!, {r0 - r12, lr} @ save registers on stack 88 stmfd sp!, {r0 - r12, lr} @ save registers on stack
87 mov r3, #0x0 @ clear for mcr call 89 mov r3, #0x0 @ clear for mcr call
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 98d8232808b8..951a0be66cf7 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -118,6 +118,7 @@ ENTRY(enable_omap3630_toggle_l2_on_restore)
118 118
119 .text 119 .text
120/* Function to call rom code to save secure ram context */ 120/* Function to call rom code to save secure ram context */
121 .align 3
121ENTRY(save_secure_ram_context) 122ENTRY(save_secure_ram_context)
122 stmfd sp!, {r1-r12, lr} @ save registers on stack 123 stmfd sp!, {r1-r12, lr} @ save registers on stack
123 adr r3, api_params @ r3 points to parameters 124 adr r3, api_params @ r3 points to parameters
@@ -169,6 +170,7 @@ ENTRY(save_secure_ram_context_sz)
169 * depending on the low power mode (non-OFF vs OFF modes), 170 * depending on the low power mode (non-OFF vs OFF modes),
170 * cf. 'Resume path for xxx mode' comments. 171 * cf. 'Resume path for xxx mode' comments.
171 */ 172 */
173 .align 3
172ENTRY(omap34xx_cpu_suspend) 174ENTRY(omap34xx_cpu_suspend)
173 stmfd sp!, {r0-r12, lr} @ save registers on stack 175 stmfd sp!, {r0-r12, lr} @ save registers on stack
174 176
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 77ecebf3fae2..1a777e34d0c2 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -282,6 +282,7 @@ error:
282 dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" 282 dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
283 "interrupt handler. Smartreflex will" 283 "interrupt handler. Smartreflex will"
284 "not function as desired\n", __func__); 284 "not function as desired\n", __func__);
285 kfree(name);
285 kfree(sr_info); 286 kfree(sr_info);
286 return ret; 287 return ret;
287} 288}
@@ -780,8 +781,7 @@ static int omap_sr_autocomp_show(void *data, u64 *val)
780 struct omap_sr *sr_info = (struct omap_sr *) data; 781 struct omap_sr *sr_info = (struct omap_sr *) data;
781 782
782 if (!sr_info) { 783 if (!sr_info) {
783 pr_warning("%s: omap_sr struct for sr_%s not found\n", 784 pr_warning("%s: omap_sr struct not found\n", __func__);
784 __func__, sr_info->voltdm->name);
785 return -EINVAL; 785 return -EINVAL;
786 } 786 }
787 787
@@ -795,8 +795,7 @@ static int omap_sr_autocomp_store(void *data, u64 val)
795 struct omap_sr *sr_info = (struct omap_sr *) data; 795 struct omap_sr *sr_info = (struct omap_sr *) data;
796 796
797 if (!sr_info) { 797 if (!sr_info) {
798 pr_warning("%s: omap_sr struct for sr_%s not found\n", 798 pr_warning("%s: omap_sr struct not found\n", __func__);
799 __func__, sr_info->voltdm->name);
800 return -EINVAL; 799 return -EINVAL;
801 } 800 }
802 801
@@ -834,7 +833,8 @@ static int __init omap_sr_probe(struct platform_device *pdev)
834 833
835 if (!pdata) { 834 if (!pdata) {
836 dev_err(&pdev->dev, "%s: platform data missing\n", __func__); 835 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
837 return -EINVAL; 836 ret = -EINVAL;
837 goto err_free_devinfo;
838 } 838 }
839 839
840 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 840 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -880,7 +880,7 @@ static int __init omap_sr_probe(struct platform_device *pdev)
880 ret = sr_late_init(sr_info); 880 ret = sr_late_init(sr_info);
881 if (ret) { 881 if (ret) {
882 pr_warning("%s: Error in SR late init\n", __func__); 882 pr_warning("%s: Error in SR late init\n", __func__);
883 return ret; 883 goto err_release_region;
884 } 884 }
885 } 885 }
886 886
@@ -891,17 +891,20 @@ static int __init omap_sr_probe(struct platform_device *pdev)
891 * not try to create rest of the debugfs entries. 891 * not try to create rest of the debugfs entries.
892 */ 892 */
893 vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); 893 vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm);
894 if (!vdd_dbg_dir) 894 if (!vdd_dbg_dir) {
895 return -EINVAL; 895 ret = -EINVAL;
896 goto err_release_region;
897 }
896 898
897 dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); 899 dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir);
898 if (IS_ERR(dbg_dir)) { 900 if (IS_ERR(dbg_dir)) {
899 dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", 901 dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
900 __func__); 902 __func__);
901 return PTR_ERR(dbg_dir); 903 ret = PTR_ERR(dbg_dir);
904 goto err_release_region;
902 } 905 }
903 906
904 (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUGO, dbg_dir, 907 (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, dbg_dir,
905 (void *)sr_info, &pm_sr_fops); 908 (void *)sr_info, &pm_sr_fops);
906 (void) debugfs_create_x32("errweight", S_IRUGO, dbg_dir, 909 (void) debugfs_create_x32("errweight", S_IRUGO, dbg_dir,
907 &sr_info->err_weight); 910 &sr_info->err_weight);
@@ -914,7 +917,8 @@ static int __init omap_sr_probe(struct platform_device *pdev)
914 if (IS_ERR(nvalue_dir)) { 917 if (IS_ERR(nvalue_dir)) {
915 dev_err(&pdev->dev, "%s: Unable to create debugfs directory" 918 dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
916 "for n-values\n", __func__); 919 "for n-values\n", __func__);
917 return PTR_ERR(nvalue_dir); 920 ret = PTR_ERR(nvalue_dir);
921 goto err_release_region;
918 } 922 }
919 923
920 omap_voltage_get_volttable(sr_info->voltdm, &volt_data); 924 omap_voltage_get_volttable(sr_info->voltdm, &volt_data);
@@ -923,24 +927,16 @@ static int __init omap_sr_probe(struct platform_device *pdev)
923 " corresponding vdd vdd_%s. Cannot create debugfs" 927 " corresponding vdd vdd_%s. Cannot create debugfs"
924 "entries for n-values\n", 928 "entries for n-values\n",
925 __func__, sr_info->voltdm->name); 929 __func__, sr_info->voltdm->name);
926 return -ENODATA; 930 ret = -ENODATA;
931 goto err_release_region;
927 } 932 }
928 933
929 for (i = 0; i < sr_info->nvalue_count; i++) { 934 for (i = 0; i < sr_info->nvalue_count; i++) {
930 char *name; 935 char name[NVALUE_NAME_LEN + 1];
931 char volt_name[32];
932
933 name = kzalloc(NVALUE_NAME_LEN + 1, GFP_KERNEL);
934 if (!name) {
935 dev_err(&pdev->dev, "%s: Unable to allocate memory"
936 " for n-value directory name\n", __func__);
937 return -ENOMEM;
938 }
939 936
940 strcpy(name, "volt_"); 937 snprintf(name, sizeof(name), "volt_%d",
941 sprintf(volt_name, "%d", volt_data[i].volt_nominal); 938 volt_data[i].volt_nominal);
942 strcat(name, volt_name); 939 (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
943 (void) debugfs_create_x32(name, S_IRUGO | S_IWUGO, nvalue_dir,
944 &(sr_info->nvalue_table[i].nvalue)); 940 &(sr_info->nvalue_table[i].nvalue));
945 } 941 }
946 942
@@ -966,7 +962,7 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)
966 } 962 }
967 963
968 sr_info = _sr_lookup(pdata->voltdm); 964 sr_info = _sr_lookup(pdata->voltdm);
969 if (!sr_info) { 965 if (IS_ERR(sr_info)) {
970 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", 966 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
971 __func__); 967 __func__);
972 return -EINVAL; 968 return -EINVAL;
diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S
index 055310cc77de..ff9b9dbcb30e 100644
--- a/arch/arm/mach-omap2/sram242x.S
+++ b/arch/arm/mach-omap2/sram242x.S
@@ -39,6 +39,7 @@
39 39
40 .text 40 .text
41 41
42 .align 3
42ENTRY(omap242x_sram_ddr_init) 43ENTRY(omap242x_sram_ddr_init)
43 stmfd sp!, {r0 - r12, lr} @ save registers on stack 44 stmfd sp!, {r0 - r12, lr} @ save registers on stack
44 45
@@ -143,6 +144,7 @@ ENTRY(omap242x_sram_ddr_init_sz)
143 * r0 = [PRCM_FULL | PRCM_HALF] r1 = SDRC_DLLA_CTRL value r2 = [DDR | SDR] 144 * r0 = [PRCM_FULL | PRCM_HALF] r1 = SDRC_DLLA_CTRL value r2 = [DDR | SDR]
144 * PRCM_FULL = 2, PRCM_HALF = 1, DDR = 1, SDR = 0 145 * PRCM_FULL = 2, PRCM_HALF = 1, DDR = 1, SDR = 0
145 */ 146 */
147 .align 3
146ENTRY(omap242x_sram_reprogram_sdrc) 148ENTRY(omap242x_sram_reprogram_sdrc)
147 stmfd sp!, {r0 - r10, lr} @ save registers on stack 149 stmfd sp!, {r0 - r10, lr} @ save registers on stack
148 mov r3, #0x0 @ clear for mrc call 150 mov r3, #0x0 @ clear for mrc call
@@ -238,6 +240,7 @@ ENTRY(omap242x_sram_reprogram_sdrc_sz)
238/* 240/*
239 * Set dividers and pll. Also recalculate DLL value for DDR and unlock mode. 241 * Set dividers and pll. Also recalculate DLL value for DDR and unlock mode.
240 */ 242 */
243 .align 3
241ENTRY(omap242x_sram_set_prcm) 244ENTRY(omap242x_sram_set_prcm)
242 stmfd sp!, {r0-r12, lr} @ regs to stack 245 stmfd sp!, {r0-r12, lr} @ regs to stack
243 adr r4, pbegin @ addr of preload start 246 adr r4, pbegin @ addr of preload start
diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S
index f9007580aea3..76730209fa0e 100644
--- a/arch/arm/mach-omap2/sram243x.S
+++ b/arch/arm/mach-omap2/sram243x.S
@@ -39,6 +39,7 @@
39 39
40 .text 40 .text
41 41
42 .align 3
42ENTRY(omap243x_sram_ddr_init) 43ENTRY(omap243x_sram_ddr_init)
43 stmfd sp!, {r0 - r12, lr} @ save registers on stack 44 stmfd sp!, {r0 - r12, lr} @ save registers on stack
44 45
@@ -143,6 +144,7 @@ ENTRY(omap243x_sram_ddr_init_sz)
143 * r0 = [PRCM_FULL | PRCM_HALF] r1 = SDRC_DLLA_CTRL value r2 = [DDR | SDR] 144 * r0 = [PRCM_FULL | PRCM_HALF] r1 = SDRC_DLLA_CTRL value r2 = [DDR | SDR]
144 * PRCM_FULL = 2, PRCM_HALF = 1, DDR = 1, SDR = 0 145 * PRCM_FULL = 2, PRCM_HALF = 1, DDR = 1, SDR = 0
145 */ 146 */
147 .align 3
146ENTRY(omap243x_sram_reprogram_sdrc) 148ENTRY(omap243x_sram_reprogram_sdrc)
147 stmfd sp!, {r0 - r10, lr} @ save registers on stack 149 stmfd sp!, {r0 - r10, lr} @ save registers on stack
148 mov r3, #0x0 @ clear for mrc call 150 mov r3, #0x0 @ clear for mrc call
@@ -238,6 +240,7 @@ ENTRY(omap243x_sram_reprogram_sdrc_sz)
238/* 240/*
239 * Set dividers and pll. Also recalculate DLL value for DDR and unlock mode. 241 * Set dividers and pll. Also recalculate DLL value for DDR and unlock mode.
240 */ 242 */
243 .align 3
241ENTRY(omap243x_sram_set_prcm) 244ENTRY(omap243x_sram_set_prcm)
242 stmfd sp!, {r0-r12, lr} @ regs to stack 245 stmfd sp!, {r0-r12, lr} @ regs to stack
243 adr r4, pbegin @ addr of preload start 246 adr r4, pbegin @ addr of preload start
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S
index 7f893a29d500..25011ca2145d 100644
--- a/arch/arm/mach-omap2/sram34xx.S
+++ b/arch/arm/mach-omap2/sram34xx.S
@@ -111,6 +111,7 @@
111 * since it will cause the ARM MMU to attempt to walk the page tables. 111 * since it will cause the ARM MMU to attempt to walk the page tables.
112 * These crashes may be intermittent. 112 * These crashes may be intermittent.
113 */ 113 */
114 .align 3
114ENTRY(omap3_sram_configure_core_dpll) 115ENTRY(omap3_sram_configure_core_dpll)
115 stmfd sp!, {r1-r12, lr} @ store regs to stack 116 stmfd sp!, {r1-r12, lr} @ store regs to stack
116 117
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 4e48e786bec7..0fc550e7e482 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -39,9 +39,12 @@
39#include <asm/mach/time.h> 39#include <asm/mach/time.h>
40#include <plat/dmtimer.h> 40#include <plat/dmtimer.h>
41#include <asm/localtimer.h> 41#include <asm/localtimer.h>
42#include <asm/sched_clock.h>
42 43
43#include "timer-gp.h" 44#include "timer-gp.h"
44 45
46#include <plat/common.h>
47
45/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ 48/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
46#define MAX_GPTIMER_ID 12 49#define MAX_GPTIMER_ID 12
47 50
@@ -176,14 +179,19 @@ static void __init omap2_gp_clockevent_init(void)
176/* 179/*
177 * When 32k-timer is enabled, don't use GPTimer for clocksource 180 * When 32k-timer is enabled, don't use GPTimer for clocksource
178 * instead, just leave default clocksource which uses the 32k 181 * instead, just leave default clocksource which uses the 32k
179 * sync counter. See clocksource setup in see plat-omap/common.c. 182 * sync counter. See clocksource setup in plat-omap/counter_32k.c
180 */ 183 */
181 184
182static inline void __init omap2_gp_clocksource_init(void) {} 185static void __init omap2_gp_clocksource_init(void)
186{
187 omap_init_clocksource_32k();
188}
189
183#else 190#else
184/* 191/*
185 * clocksource 192 * clocksource
186 */ 193 */
194static DEFINE_CLOCK_DATA(cd);
187static struct omap_dm_timer *gpt_clocksource; 195static struct omap_dm_timer *gpt_clocksource;
188static cycle_t clocksource_read_cycles(struct clocksource *cs) 196static cycle_t clocksource_read_cycles(struct clocksource *cs)
189{ 197{
@@ -198,6 +206,15 @@ static struct clocksource clocksource_gpt = {
198 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 206 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
199}; 207};
200 208
209static void notrace dmtimer_update_sched_clock(void)
210{
211 u32 cyc;
212
213 cyc = omap_dm_timer_read_counter(gpt_clocksource);
214
215 update_sched_clock(&cd, cyc, (u32)~0);
216}
217
201/* Setup free-running counter for clocksource */ 218/* Setup free-running counter for clocksource */
202static void __init omap2_gp_clocksource_init(void) 219static void __init omap2_gp_clocksource_init(void)
203{ 220{
@@ -218,6 +235,8 @@ static void __init omap2_gp_clocksource_init(void)
218 235
219 omap_dm_timer_set_load_start(gpt, 1, 0); 236 omap_dm_timer_set_load_start(gpt, 1, 0);
220 237
238 init_sched_clock(&cd, dmtimer_update_sched_clock, 32, tick_rate);
239
221 if (clocksource_register_hz(&clocksource_gpt, tick_rate)) 240 if (clocksource_register_hz(&clocksource_gpt, tick_rate))
222 printk(err2, clocksource_gpt.name); 241 printk(err2, clocksource_gpt.name);
223} 242}
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index ed6079c94c57..12be525b8df4 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -471,6 +471,7 @@ static void __init vdd_debugfs_init(struct omap_vdd_info *vdd)
471 strcat(name, vdd->voltdm.name); 471 strcat(name, vdd->voltdm.name);
472 472
473 vdd->debug_dir = debugfs_create_dir(name, voltage_dir); 473 vdd->debug_dir = debugfs_create_dir(name, voltage_dir);
474 kfree(name);
474 if (IS_ERR(vdd->debug_dir)) { 475 if (IS_ERR(vdd->debug_dir)) {
475 pr_warning("%s: Unable to create debugfs directory for" 476 pr_warning("%s: Unable to create debugfs directory for"
476 " vdd_%s\n", __func__, vdd->voltdm.name); 477 " vdd_%s\n", __func__, vdd->voltdm.name);