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authorKevin Hilman <khilman@ti.com>2011-03-30 19:36:30 -0400
committerKevin Hilman <khilman@ti.com>2011-09-15 15:08:58 -0400
commitf5395480f5088a86cc8594d29b5c2f07f6995c3d (patch)
tree85b13fd9a57214de3d59f6dbf4a3702f7873cc6e /arch/arm/mach-omap2
parentce8ebe0dfb1f8713337cebf82499d3dced288328 (diff)
OMAP3+: VC: make I2C config programmable with PMIC-specific settings
Remove hard-coded I2C configuration in favor of settings that can be configured from PMIC-specific values. Currently only high-speed mode and the master-code value are supported, since they were the only fields currently used, but extending this is now trivial. Thanks to Nishanth Menon <nm@ti.com> for reporting/fixing a sparse problem and making omap_vc_i2c_init() static, as well as finding and fixing a problem with the shift/mask of mcode. Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/omap_twl.c4
-rw-r--r--arch/arm/mach-omap2/vc.c51
-rw-r--r--arch/arm/mach-omap2/vc.h8
-rw-r--r--arch/arm/mach-omap2/vc3xxx_data.c3
-rw-r--r--arch/arm/mach-omap2/vc44xx_data.c3
-rw-r--r--arch/arm/mach-omap2/voltage.h4
6 files changed, 66 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index e467d4565a2d..6b247d183299 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -159,6 +159,7 @@ static struct omap_voltdm_pmic omap3_mpu_pmic = {
159 .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, 159 .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
160 .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, 160 .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
161 .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, 161 .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG,
162 .i2c_high_speed = true,
162 .vsel_to_uv = twl4030_vsel_to_uv, 163 .vsel_to_uv = twl4030_vsel_to_uv,
163 .uv_to_vsel = twl4030_uv_to_vsel, 164 .uv_to_vsel = twl4030_uv_to_vsel,
164}; 165};
@@ -179,6 +180,7 @@ static struct omap_voltdm_pmic omap3_core_pmic = {
179 .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, 180 .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
180 .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, 181 .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
181 .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, 182 .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG,
183 .i2c_high_speed = true,
182 .vsel_to_uv = twl4030_vsel_to_uv, 184 .vsel_to_uv = twl4030_vsel_to_uv,
183 .uv_to_vsel = twl4030_uv_to_vsel, 185 .uv_to_vsel = twl4030_uv_to_vsel,
184}; 186};
@@ -199,6 +201,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = {
199 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, 201 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
200 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, 202 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
201 .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, 203 .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG,
204 .i2c_high_speed = true,
202 .vsel_to_uv = twl6030_vsel_to_uv, 205 .vsel_to_uv = twl6030_vsel_to_uv,
203 .uv_to_vsel = twl6030_uv_to_vsel, 206 .uv_to_vsel = twl6030_uv_to_vsel,
204}; 207};
@@ -219,6 +222,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = {
219 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, 222 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
220 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, 223 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
221 .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, 224 .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG,
225 .i2c_high_speed = true,
222 .vsel_to_uv = twl6030_vsel_to_uv, 226 .vsel_to_uv = twl6030_vsel_to_uv,
223 .uv_to_vsel = twl6030_uv_to_vsel, 227 .uv_to_vsel = twl6030_uv_to_vsel,
224}; 228};
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 4ac761440d62..5d545632388d 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -208,13 +208,6 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
208 if (is_initialized) 208 if (is_initialized)
209 return; 209 return;
210 210
211 /*
212 * Generic VC parameters init
213 * XXX This data should be abstracted out
214 */
215 voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK,
216 OMAP3_PRM_VC_I2C_CFG_OFFSET);
217
218 omap3_vfsm_init(voltdm); 211 omap3_vfsm_init(voltdm);
219 212
220 is_initialized = true; 213 is_initialized = true;
@@ -237,6 +230,48 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
237 is_initialized = true; 230 is_initialized = true;
238} 231}
239 232
233/**
234 * omap_vc_i2c_init - initialize I2C interface to PMIC
235 * @voltdm: voltage domain containing VC data
236 *
237 * Use PMIC supplied seetings for I2C high-speed mode and
238 * master code (if set) and program the VC I2C configuration
239 * register.
240 *
241 * The VC I2C configuration is common to all VC channels,
242 * so this function only configures I2C for the first VC
243 * channel registers. All other VC channels will use the
244 * same configuration.
245 */
246static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
247{
248 struct omap_vc_channel *vc = voltdm->vc;
249 static bool initialized;
250 static bool i2c_high_speed;
251 u8 mcode;
252
253 if (initialized) {
254 if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
255 pr_warn("%s: I2C config for all channels must match.",
256 __func__);
257 return;
258 }
259
260 i2c_high_speed = voltdm->pmic->i2c_high_speed;
261 if (i2c_high_speed)
262 voltdm->rmw(vc->common->i2c_cfg_hsen_mask,
263 vc->common->i2c_cfg_hsen_mask,
264 vc->common->i2c_cfg_reg);
265
266 mcode = voltdm->pmic->i2c_mcode;
267 if (mcode)
268 voltdm->rmw(vc->common->i2c_mcode_mask,
269 mcode << __ffs(vc->common->i2c_mcode_mask),
270 vc->common->i2c_cfg_reg);
271
272 initialized = true;
273}
274
240void __init omap_vc_init_channel(struct voltagedomain *voltdm) 275void __init omap_vc_init_channel(struct voltagedomain *voltdm)
241{ 276{
242 struct omap_vc_channel *vc = voltdm->vc; 277 struct omap_vc_channel *vc = voltdm->vc;
@@ -305,6 +340,8 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
305 vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask), 340 vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask),
306 voltdm->vfsm->voltsetup_reg); 341 voltdm->vfsm->voltsetup_reg);
307 342
343 omap_vc_i2c_init(voltdm);
344
308 if (cpu_is_omap34xx()) 345 if (cpu_is_omap34xx())
309 omap3_vc_init_channel(voltdm); 346 omap3_vc_init_channel(voltdm);
310 else if (cpu_is_omap44xx()) 347 else if (cpu_is_omap44xx())
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index fd385285a3bf..c86301330b75 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -37,6 +37,9 @@ struct voltagedomain;
37 * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register 37 * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register
38 * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register 38 * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register
39 * @cfg_channel_reg: VC channel configuration register 39 * @cfg_channel_reg: VC channel configuration register
40 * @i2c_cfg_reg: I2C configuration register offset
41 * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register
42 * @i2c_mcode_mask: MCODE field mask for I2C config register
40 * 43 *
41 * XXX One of cmd_on_mask and cmd_on_shift are not needed 44 * XXX One of cmd_on_mask and cmd_on_shift are not needed
42 * XXX VALID should probably be a shift, not a mask 45 * XXX VALID should probably be a shift, not a mask
@@ -56,6 +59,9 @@ struct omap_vc_common {
56 u8 cmd_ret_shift; 59 u8 cmd_ret_shift;
57 u8 cmd_off_shift; 60 u8 cmd_off_shift;
58 u8 cfg_channel_reg; 61 u8 cfg_channel_reg;
62 u8 i2c_cfg_reg;
63 u8 i2c_cfg_hsen_mask;
64 u8 i2c_mcode_mask;
59}; 65};
60 66
61/* omap_vc_channel.flags values */ 67/* omap_vc_channel.flags values */
@@ -68,6 +74,7 @@ struct omap_vc_common {
68 * @cmd_reg_addr: command configuration register address 74 * @cmd_reg_addr: command configuration register address
69 * @setup_time: setup time (in sys_clk cycles) of regulator for this channel 75 * @setup_time: setup time (in sys_clk cycles) of regulator for this channel
70 * @cfg_channel: current value of VC channel configuration register 76 * @cfg_channel: current value of VC channel configuration register
77 * @i2c_high_speed: whether or not to use I2C high-speed mode
71 * 78 *
72 * @common: pointer to VC common data for this platform 79 * @common: pointer to VC common data for this platform
73 * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register 80 * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register
@@ -84,6 +91,7 @@ struct omap_vc_channel {
84 u16 cmd_reg_addr; 91 u16 cmd_reg_addr;
85 u16 setup_time; 92 u16 setup_time;
86 u8 cfg_channel; 93 u8 cfg_channel;
94 bool i2c_high_speed;
87 95
88 /* register access data */ 96 /* register access data */
89 const struct omap_vc_common *common; 97 const struct omap_vc_common *common;
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c
index f4449eb59841..95d7701300cb 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -44,6 +44,9 @@ static struct omap_vc_common omap3_vc_common = {
44 .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT, 44 .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT,
45 .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, 45 .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT,
46 .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET, 46 .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
47 .i2c_cfg_hsen_mask = OMAP3430_HSEN_MASK,
48 .i2c_cfg_reg = OMAP3_PRM_VC_I2C_CFG_OFFSET,
49 .i2c_mcode_mask = OMAP3430_MCODE_MASK,
47}; 50};
48 51
49struct omap_vc_channel omap3_vc_mpu = { 52struct omap_vc_channel omap3_vc_mpu = {
diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c
index 1610bdedee6b..148be18397f8 100644
--- a/arch/arm/mach-omap2/vc44xx_data.c
+++ b/arch/arm/mach-omap2/vc44xx_data.c
@@ -45,6 +45,9 @@ static const struct omap_vc_common omap4_vc_common = {
45 .cmd_ret_shift = OMAP4430_RET_SHIFT, 45 .cmd_ret_shift = OMAP4430_RET_SHIFT,
46 .cmd_off_shift = OMAP4430_OFF_SHIFT, 46 .cmd_off_shift = OMAP4430_OFF_SHIFT,
47 .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, 47 .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET,
48 .i2c_cfg_reg = OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET,
49 .i2c_cfg_hsen_mask = OMAP4430_HSMODEEN_MASK,
50 .i2c_mcode_mask = OMAP4430_HSMCODE_MASK,
48}; 51};
49 52
50/* VC instance data for each controllable voltage line */ 53/* VC instance data for each controllable voltage line */
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 43ee7bf57969..a36d2cfa5ca7 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -103,6 +103,8 @@ struct omap_volt_data {
103 * @i2c_slave_addr: I2C slave address of PMIC 103 * @i2c_slave_addr: I2C slave address of PMIC
104 * @volt_reg_addr: voltage configuration register address 104 * @volt_reg_addr: voltage configuration register address
105 * @cmd_reg_addr: command (on, on-LP, ret, off) configuration register address 105 * @cmd_reg_addr: command (on, on-LP, ret, off) configuration register address
106 * @i2c_high_speed: whether VC uses I2C high-speed mode to PMIC
107 * @i2c_mcode: master code value for I2C high-speed preamble transmission
106 * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV. 108 * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV.
107 * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value. 109 * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value.
108 */ 110 */
@@ -123,6 +125,8 @@ struct omap_voltdm_pmic {
123 u8 vp_vddmin; 125 u8 vp_vddmin;
124 u8 vp_vddmax; 126 u8 vp_vddmax;
125 u8 vp_timeout_us; 127 u8 vp_timeout_us;
128 bool i2c_high_speed;
129 u8 i2c_mcode;
126 unsigned long (*vsel_to_uv) (const u8 vsel); 130 unsigned long (*vsel_to_uv) (const u8 vsel);
127 u8 (*uv_to_vsel) (unsigned long uV); 131 u8 (*uv_to_vsel) (unsigned long uV);
128}; 132};