diff options
author | Tony Lindgren <tony@atomide.com> | 2011-03-02 20:07:14 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2011-03-02 20:07:14 -0500 |
commit | 12d7d4e0ed8fecf7f74c89483b55b300be6e5901 (patch) | |
tree | f573761ac752ff04ec445e23aef50adadda49790 /arch/arm/mach-omap2 | |
parent | aca6ad073ea820776bf5bdb87cf82eace35042c8 (diff) | |
parent | 790ab7e92bec24aee3939b300d36b99ab2e3f3ca (diff) |
Merge branch 'devel-cleanup' into omap-for-linus
Conflicts:
arch/arm/mach-omap2/timer-gp.c
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/clkt_dpll.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/mailbox.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/mux.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm-debug.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prcm_mpu44xx.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/smartreflex.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/timer-gp.c | 13 |
7 files changed, 24 insertions, 11 deletions
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c index 337392c3f549..acb7ae5b0a25 100644 --- a/arch/arm/mach-omap2/clkt_dpll.c +++ b/arch/arm/mach-omap2/clkt_dpll.c | |||
@@ -77,7 +77,7 @@ static int _dpll_test_fint(struct clk *clk, u8 n) | |||
77 | dd = clk->dpll_data; | 77 | dd = clk->dpll_data; |
78 | 78 | ||
79 | /* DPLL divider must result in a valid jitter correction val */ | 79 | /* DPLL divider must result in a valid jitter correction val */ |
80 | fint = clk->parent->rate / (n + 1); | 80 | fint = clk->parent->rate / n; |
81 | if (fint < DPLL_FINT_BAND1_MIN) { | 81 | if (fint < DPLL_FINT_BAND1_MIN) { |
82 | 82 | ||
83 | pr_debug("rejecting n=%d due to Fint failure, " | 83 | pr_debug("rejecting n=%d due to Fint failure, " |
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index 29b9dc3917af..537d3484b475 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c | |||
@@ -334,7 +334,7 @@ static struct omap_mbox mbox_iva_info = { | |||
334 | .priv = &omap2_mbox_iva_priv, | 334 | .priv = &omap2_mbox_iva_priv, |
335 | }; | 335 | }; |
336 | 336 | ||
337 | struct omap_mbox *omap2_mboxes[] = { &mbox_iva_info, &mbox_dsp_info, NULL }; | 337 | struct omap_mbox *omap2_mboxes[] = { &mbox_dsp_info, &mbox_iva_info, NULL }; |
338 | #endif | 338 | #endif |
339 | 339 | ||
340 | #if defined(CONFIG_ARCH_OMAP4) | 340 | #if defined(CONFIG_ARCH_OMAP4) |
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 98148b6c36e9..6c84659cf846 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c | |||
@@ -605,7 +605,7 @@ static void __init omap_mux_dbg_create_entry( | |||
605 | list_for_each_entry(e, &partition->muxmodes, node) { | 605 | list_for_each_entry(e, &partition->muxmodes, node) { |
606 | struct omap_mux *m = &e->mux; | 606 | struct omap_mux *m = &e->mux; |
607 | 607 | ||
608 | (void)debugfs_create_file(m->muxnames[0], S_IWUGO, mux_dbg_dir, | 608 | (void)debugfs_create_file(m->muxnames[0], S_IWUSR, mux_dbg_dir, |
609 | m, &omap_mux_dbg_signal_fops); | 609 | m, &omap_mux_dbg_signal_fops); |
610 | } | 610 | } |
611 | } | 611 | } |
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 125f56591fb5..a5a83b358ddd 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c | |||
@@ -637,14 +637,14 @@ static int __init pm_dbg_init(void) | |||
637 | 637 | ||
638 | } | 638 | } |
639 | 639 | ||
640 | (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUGO, d, | 640 | (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUSR, d, |
641 | &enable_off_mode, &pm_dbg_option_fops); | 641 | &enable_off_mode, &pm_dbg_option_fops); |
642 | (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUGO, d, | 642 | (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d, |
643 | &sleep_while_idle, &pm_dbg_option_fops); | 643 | &sleep_while_idle, &pm_dbg_option_fops); |
644 | (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUGO, d, | 644 | (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUSR, d, |
645 | &wakeup_timer_seconds, &pm_dbg_option_fops); | 645 | &wakeup_timer_seconds, &pm_dbg_option_fops); |
646 | (void) debugfs_create_file("wakeup_timer_milliseconds", | 646 | (void) debugfs_create_file("wakeup_timer_milliseconds", |
647 | S_IRUGO | S_IWUGO, d, &wakeup_timer_milliseconds, | 647 | S_IRUGO | S_IWUSR, d, &wakeup_timer_milliseconds, |
648 | &pm_dbg_option_fops); | 648 | &pm_dbg_option_fops); |
649 | pm_dbg_init_done = 1; | 649 | pm_dbg_init_done = 1; |
650 | 650 | ||
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h index 729a644ce852..3300ff6e3cfe 100644 --- a/arch/arm/mach-omap2/prcm_mpu44xx.h +++ b/arch/arm/mach-omap2/prcm_mpu44xx.h | |||
@@ -38,8 +38,8 @@ | |||
38 | #define OMAP4430_PRCM_MPU_CPU1_INST 0x0800 | 38 | #define OMAP4430_PRCM_MPU_CPU1_INST 0x0800 |
39 | 39 | ||
40 | /* PRCM_MPU clockdomain register offsets (from instance start) */ | 40 | /* PRCM_MPU clockdomain register offsets (from instance start) */ |
41 | #define OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS 0x0000 | 41 | #define OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS 0x0018 |
42 | #define OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS 0x0000 | 42 | #define OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS 0x0018 |
43 | 43 | ||
44 | 44 | ||
45 | /* | 45 | /* |
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index c37e823266d3..95ac336fe3f7 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c | |||
@@ -900,7 +900,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
900 | return PTR_ERR(dbg_dir); | 900 | return PTR_ERR(dbg_dir); |
901 | } | 901 | } |
902 | 902 | ||
903 | (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUGO, dbg_dir, | 903 | (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, dbg_dir, |
904 | (void *)sr_info, &pm_sr_fops); | 904 | (void *)sr_info, &pm_sr_fops); |
905 | (void) debugfs_create_x32("errweight", S_IRUGO, dbg_dir, | 905 | (void) debugfs_create_x32("errweight", S_IRUGO, dbg_dir, |
906 | &sr_info->err_weight); | 906 | &sr_info->err_weight); |
@@ -939,7 +939,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
939 | strcpy(name, "volt_"); | 939 | strcpy(name, "volt_"); |
940 | sprintf(volt_name, "%d", volt_data[i].volt_nominal); | 940 | sprintf(volt_name, "%d", volt_data[i].volt_nominal); |
941 | strcat(name, volt_name); | 941 | strcat(name, volt_name); |
942 | (void) debugfs_create_x32(name, S_IRUGO | S_IWUGO, nvalue_dir, | 942 | (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir, |
943 | &(sr_info->nvalue_table[i].nvalue)); | 943 | &(sr_info->nvalue_table[i].nvalue)); |
944 | } | 944 | } |
945 | 945 | ||
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index fb8d656e4d0a..3b9cf85f4bb9 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <asm/mach/time.h> | 39 | #include <asm/mach/time.h> |
40 | #include <plat/dmtimer.h> | 40 | #include <plat/dmtimer.h> |
41 | #include <asm/localtimer.h> | 41 | #include <asm/localtimer.h> |
42 | #include <asm/sched_clock.h> | ||
42 | #include <plat/common.h> | 43 | #include <plat/common.h> |
43 | #include <plat/omap_hwmod.h> | 44 | #include <plat/omap_hwmod.h> |
44 | 45 | ||
@@ -195,6 +196,7 @@ static void __init omap2_gp_clocksource_init(void) | |||
195 | /* | 196 | /* |
196 | * clocksource | 197 | * clocksource |
197 | */ | 198 | */ |
199 | static DEFINE_CLOCK_DATA(cd); | ||
198 | static struct omap_dm_timer *gpt_clocksource; | 200 | static struct omap_dm_timer *gpt_clocksource; |
199 | static cycle_t clocksource_read_cycles(struct clocksource *cs) | 201 | static cycle_t clocksource_read_cycles(struct clocksource *cs) |
200 | { | 202 | { |
@@ -209,6 +211,15 @@ static struct clocksource clocksource_gpt = { | |||
209 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 211 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
210 | }; | 212 | }; |
211 | 213 | ||
214 | static void notrace dmtimer_update_sched_clock(void) | ||
215 | { | ||
216 | u32 cyc; | ||
217 | |||
218 | cyc = omap_dm_timer_read_counter(gpt_clocksource); | ||
219 | |||
220 | update_sched_clock(&cd, cyc, (u32)~0); | ||
221 | } | ||
222 | |||
212 | /* Setup free-running counter for clocksource */ | 223 | /* Setup free-running counter for clocksource */ |
213 | static void __init omap2_gp_clocksource_init(void) | 224 | static void __init omap2_gp_clocksource_init(void) |
214 | { | 225 | { |
@@ -229,6 +240,8 @@ static void __init omap2_gp_clocksource_init(void) | |||
229 | 240 | ||
230 | omap_dm_timer_set_load_start(gpt, 1, 0); | 241 | omap_dm_timer_set_load_start(gpt, 1, 0); |
231 | 242 | ||
243 | init_sched_clock(&cd, dmtimer_update_sched_clock, 32, tick_rate); | ||
244 | |||
232 | if (clocksource_register_hz(&clocksource_gpt, tick_rate)) | 245 | if (clocksource_register_hz(&clocksource_gpt, tick_rate)) |
233 | printk(err2, clocksource_gpt.name); | 246 | printk(err2, clocksource_gpt.name); |
234 | } | 247 | } |