diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-01 12:15:15 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-01 12:15:15 -0500 |
commit | ac0f6f927db539e03e1f3f61bcd4ed57d5cde7a9 (patch) | |
tree | 816e5ac643b15c2050c64a7075f0f7e13d86ea09 /arch/arm/mach-omap2 | |
parent | b1bf9368407ae7e89d8a005bb40beb70a41df539 (diff) | |
parent | 9f33be2c3a80bdc2cc08342dd77fac87652e0548 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (100 commits)
ARM: Eliminate decompressor -Dstatic= PIC hack
ARM: 5958/1: ARM: U300: fix inverted clk round rate
ARM: 5956/1: misplaced parentheses
ARM: 5955/1: ep93xx: move timer defines into core.c and document
ARM: 5954/1: ep93xx: move gpio interrupt support to gpio.c
ARM: 5953/1: ep93xx: fix broken build of clock.c
ARM: 5952/1: ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig
ARM: 5949/1: NUC900 add gpio virtual memory map
ARM: 5948/1: Enable timer0 to time4 clock support for nuc910
ARM: 5940/2: ARM: MMCI: remove custom DBG macro and printk
ARM: make_coherent(): fix problems with highpte, part 2
MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself
ARM: 5945/1: ep93xx: include correct irq.h in core.c
ARM: 5933/1: amba-pl011: support hardware flow control
ARM: 5930/1: Add PKMAP area description to memory.txt.
ARM: 5929/1: Add checks to detect overlap of memory regions.
ARM: 5928/1: Change type of VMALLOC_END to unsigned long.
ARM: 5927/1: Make delimiters of DMA area globally visibly.
ARM: 5926/1: Add "Virtual kernel memory..." printout.
ARM: 5920/1: OMAP4: Enable L2 Cache
...
Fix up trivial conflict in arch/arm/mach-mx25/clock.c
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/board-4430sdp.c | 54 | ||||
-rw-r--r-- | arch/arm/mach-omap2/include/mach/debug-macro.S | 2 |
2 files changed, 55 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 0c6be6b4a7e2..8ba8fb5b2514 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <plat/control.h> | 28 | #include <plat/control.h> |
29 | #include <plat/timer-gp.h> | 29 | #include <plat/timer-gp.h> |
30 | #include <asm/hardware/gic.h> | 30 | #include <asm/hardware/gic.h> |
31 | #include <asm/hardware/cache-l2x0.h> | ||
31 | 32 | ||
32 | static struct platform_device sdp4430_lcd_device = { | 33 | static struct platform_device sdp4430_lcd_device = { |
33 | .name = "sdp4430_lcd", | 34 | .name = "sdp4430_lcd", |
@@ -50,6 +51,59 @@ static struct omap_board_config_kernel sdp4430_config[] __initdata = { | |||
50 | { OMAP_TAG_LCD, &sdp4430_lcd_config }, | 51 | { OMAP_TAG_LCD, &sdp4430_lcd_config }, |
51 | }; | 52 | }; |
52 | 53 | ||
54 | #ifdef CONFIG_CACHE_L2X0 | ||
55 | noinline void omap_smc1(u32 fn, u32 arg) | ||
56 | { | ||
57 | register u32 r12 asm("r12") = fn; | ||
58 | register u32 r0 asm("r0") = arg; | ||
59 | |||
60 | /* This is common routine cache secure monitor API used to | ||
61 | * modify the PL310 secure registers. | ||
62 | * r0 contains the value to be modified and "r12" contains | ||
63 | * the monitor API number. It uses few CPU registers | ||
64 | * internally and hence they need be backed up including | ||
65 | * link register "lr". | ||
66 | * Explicitly save r11 and r12 the compiler generated code | ||
67 | * won't save it. | ||
68 | */ | ||
69 | asm volatile( | ||
70 | "stmfd r13!, {r11,r12}\n" | ||
71 | "dsb\n" | ||
72 | "smc\n" | ||
73 | "ldmfd r13!, {r11,r12}\n" | ||
74 | : "+r" (r0), "+r" (r12) | ||
75 | : | ||
76 | : "r4", "r5", "r10", "lr", "cc"); | ||
77 | } | ||
78 | EXPORT_SYMBOL(omap_smc1); | ||
79 | |||
80 | static int __init omap_l2_cache_init(void) | ||
81 | { | ||
82 | void __iomem *l2cache_base; | ||
83 | |||
84 | /* To avoid code running on other OMAPs in | ||
85 | * multi-omap builds | ||
86 | */ | ||
87 | if (!cpu_is_omap44xx()) | ||
88 | return -ENODEV; | ||
89 | |||
90 | /* Static mapping, never released */ | ||
91 | l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K); | ||
92 | BUG_ON(!l2cache_base); | ||
93 | |||
94 | /* Enable PL310 L2 Cache controller */ | ||
95 | omap_smc1(0x102, 0x1); | ||
96 | |||
97 | /* 32KB way size, 16-way associativity, | ||
98 | * parity disabled | ||
99 | */ | ||
100 | l2x0_init(l2cache_base, 0x0e050000, 0xc0000fff); | ||
101 | |||
102 | return 0; | ||
103 | } | ||
104 | early_initcall(omap_l2_cache_init); | ||
105 | #endif | ||
106 | |||
53 | static void __init gic_init_irq(void) | 107 | static void __init gic_init_irq(void) |
54 | { | 108 | { |
55 | void __iomem *base; | 109 | void __iomem *base; |
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S index e9f255df9163..86979d7bd871 100644 --- a/arch/arm/mach-omap2/include/mach/debug-macro.S +++ b/arch/arm/mach-omap2/include/mach/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | 13 | ||
14 | .macro addruart,rx | 14 | .macro addruart, rx, tmp |
15 | mrc p15, 0, \rx, c1, c0 | 15 | mrc p15, 0, \rx, c1, c0 |
16 | tst \rx, #1 @ MMU enabled? | 16 | tst \rx, #1 @ MMU enabled? |
17 | #ifdef CONFIG_ARCH_OMAP2 | 17 | #ifdef CONFIG_ARCH_OMAP2 |