ARM: OMAP: TI81XX: Prepare for addition of TI814X support

This patch updates existing macros, functions used for TI816X, to enable
addition of other SoCs belonging to TI81XX family (e.g., TI814X).

The approach taken is to use TI81XX/ti81xx for code/data going to be common
across all TI81XX devices.

cpu_is_ti81xx() is introduced to handle code common across TI81XX devices.

In addition, ti8168_evm_map_io() is now replaced with ti81xx_map_io() and moved
in mach-omap2/common.c as same will be used for TI814X and is not board
specific.

Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

11 files changed, 56 insertions, 55 deletions

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index ccdd442ca124..f475954c3b98 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -76,8 +76,8 @@ config SOC_OMAP3430
         default y
         select ARCH_OMAP_OTG
 
-config SOC_OMAPTI816X
-        bool "TI816X support"
+config SOC_OMAPTI81XX
+        bool "TI81XX support"
         depends on ARCH_OMAP3
         default y
 
@@ -319,7 +319,7 @@ config MACH_OMAP_3630SDP
 
 config MACH_TI8168EVM
         bool "TI8168 Evaluation Module"
-        depends on SOC_OMAPTI816X
+        depends on SOC_OMAPTI81XX
         default y
 
 config MACH_OMAP_4430SDP
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index 8402b39b2840..b236fcc023ac 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -35,17 +35,12 @@ static void __init ti8168_evm_init(void)
         omap_board_config_size = ARRAY_SIZE(ti8168_evm_config);
 }
 
-static void __init ti8168_evm_map_io(void)
-{
-        omapti816x_map_common_io();
-}
-
 MACHINE_START(TI8168EVM, "ti8168evm")
         /* Maintainer: Texas Instruments */
         .atag_offset    = 0x100,
-        .map_io         = ti8168_evm_map_io,
-        .init_early     = ti816x_init_early,
-        .init_irq       = ti816x_init_irq,
+        .map_io         = ti81xx_map_io,
+        .init_early     = ti81xx_init_early,
+        .init_irq       = ti81xx_init_irq,
         .timer          = &omap3_timer,
         .init_machine   = ti8168_evm_init,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 3d56d8a2b86e..be0fa34e5506 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3602,7 +3602,7 @@ int __init omap3xxx_clk_init(void)
          * Lock DPLL5 -- here only until other device init code can
          * handle this
          */
-        if (!cpu_is_ti816x() && (omap_rev() >= OMAP3430_REV_ES2_0))
+        if (!cpu_is_ti81xx() && (omap_rev() >= OMAP3430_REV_ES2_0))
                 omap3_clk_lock_dpll5();
 
         /* Avoid sleeping during omap3_core_dpll_m2_set_rate() */
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index c900dcb6f1fd..aaf421178c91 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -110,27 +110,32 @@ void __init omap3_map_io(void)
 
 /*
  * Adjust TAP register base such that omap3_check_revision accesses the correct
- * TI816X register for checking device ID (it adds 0x204 to tap base while
- * TI816X DEVICE ID register is at offset 0x600 from control base).
+ * TI81XX register for checking device ID (it adds 0x204 to tap base while
+ * TI81XX DEVICE ID register is at offset 0x600 from control base).
  */
-#define TI816X_TAP_BASE         (TI816X_CTRL_BASE + \
-                                TI816X_CONTROL_DEVICE_ID - 0x204)
+#define TI81XX_TAP_BASE         (TI81XX_CTRL_BASE + \
+                                TI81XX_CONTROL_DEVICE_ID - 0x204)
 
-static struct omap_globals ti816x_globals = {
+static struct omap_globals ti81xx_globals = {
         .class  = OMAP343X_CLASS,
-        .tap    = OMAP2_L4_IO_ADDRESS(TI816X_TAP_BASE),
-        .ctrl   = OMAP2_L4_IO_ADDRESS(TI816X_CTRL_BASE),
-        .prm    = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE),
-        .cm     = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE),
+        .tap    = OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE),
+        .ctrl   = OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
+        .prm    = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
+        .cm     = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
 };
 
-void __init omap2_set_globals_ti816x(void)
+void __init omap2_set_globals_ti81xx(void)
 {
-        __omap2_set_globals(&ti816x_globals);
+        __omap2_set_globals(&ti81xx_globals);
+}
+
+void __init ti81xx_map_io(void)
+{
+        omapti81xx_map_common_io();
 }
 
 #define AM33XX_TAP_BASE         (AM33XX_CTRL_BASE + \
-                                TI816X_CONTROL_DEVICE_ID - 0x204)
+                                TI81XX_CONTROL_DEVICE_ID - 0x204)
 
 static struct omap_globals am33xx_globals = {
         .class  = AM335X_CLASS,
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 9b733e343bf5..4b2b416fafe1 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -52,10 +52,10 @@ static inline void omap34xx_map_common_io(void)
 }
 #endif
 
-#ifdef CONFIG_SOC_OMAPTI816X
-extern void omapti816x_map_common_io(void);
+#ifdef CONFIG_SOC_OMAPTI81XX
+extern void omapti81xx_map_common_io(void);
 #else
-static inline void omapti816x_map_common_io(void)
+static inline void omapti81xx_map_common_io(void)
 {
 }
 #endif
@@ -90,7 +90,7 @@ void omap35xx_init_early(void);
 void omap3630_init_early(void);
 void omap3_init_early(void);    /* Do not use this one */
 void am35xx_init_early(void);
-void ti816x_init_early(void);
+void ti81xx_init_early(void);
 void omap4430_init_early(void);
 
 /*
@@ -114,7 +114,7 @@ void omap2_set_globals_242x(void);
 void omap2_set_globals_243x(void);
 void omap2_set_globals_3xxx(void);
 void omap2_set_globals_443x(void);
-void omap2_set_globals_ti816x(void);
+void omap2_set_globals_ti81xx(void);
 void omap2_set_globals_am33xx(void);
 
 /* These get called from omap2_set_globals_xxxx(), do not call these */
@@ -128,6 +128,7 @@ void omap243x_map_io(void);
 void omap3_map_io(void);
 void am33xx_map_io(void);
 void omap4_map_io(void);
+void ti81xx_map_io(void);
 
 /**
  * omap_test_timeout - busy-loop, testing a condition
@@ -156,7 +157,7 @@ extern struct device *omap4_get_dsp_device(void);
 
 void omap2_init_irq(void);
 void omap3_init_irq(void);
-void ti816x_init_irq(void);
+void ti81xx_init_irq(void);
 extern int omap_irq_pending(void);
 void omap_intc_save_context(void);
 void omap_intc_restore_context(void);
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index d4ef75d5a382..0ba68d3764bc 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -52,8 +52,8 @@
 #define OMAP343X_CONTROL_PADCONFS_WKUP  0xa00
 #define OMAP343X_CONTROL_GENERAL_WKUP   0xa60
 
-/* TI816X spefic control submodules */
-#define TI816X_CONTROL_DEVCONF          0x600
+/* TI81XX spefic control submodules */
+#define TI81XX_CONTROL_DEVCONF          0x600
 
 /* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */
 
@@ -244,8 +244,8 @@
 #define OMAP3_PADCONF_SAD2D_MSTANDBY   0x250
 #define OMAP3_PADCONF_SAD2D_IDLEACK    0x254
 
-/* TI816X CONTROL_DEVCONF register offsets */
-#define TI816X_CONTROL_DEVICE_ID        (TI816X_CONTROL_DEVCONF + 0x000)
+/* TI81XX CONTROL_DEVCONF register offsets */
+#define TI81XX_CONTROL_DEVICE_ID        (TI81XX_CONTROL_DEVCONF + 0x000)
 
 /*
  * REVISIT: This list of registers is not comprehensive - there are more
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 439afe7acdca..1dc68e64d7e2 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -226,7 +226,7 @@ static void __init omap4_check_features(void)
         }
 }
 
-static void __init ti816x_check_features(void)
+static void __init ti81xx_check_features(void)
 {
         omap_features = OMAP3_HAS_NEON;
 }
@@ -489,11 +489,11 @@ void __init omap2_check_revision(void)
         } else if (cpu_is_omap34xx()) {
                 omap3_check_revision(&cpu_rev);
 
-                /* TI816X doesn't have feature register */
-                if (!cpu_is_ti816x())
+                /* TI81XX doesn't have feature register */
+                if (!cpu_is_ti81xx())
                         omap3_check_features();
                 else
-                        ti816x_check_features();
+                        ti81xx_check_features();
 
                 omap3_cpuinfo(cpu_rev);
                 return;
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S
index 13f98e59cfef..cdfc2a1f0e75 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -66,11 +66,11 @@ omap_uart_lsr:	.word	0
                 beq     34f                     @ configure OMAP3UART4
                 cmp     \rp, #OMAP4UART4        @ only on 44xx
                 beq     44f                     @ configure OMAP4UART4
-                cmp     \rp, #TI816XUART1       @ ti816x UART offsets different
+                cmp     \rp, #TI81XXUART1       @ ti81Xx UART offsets different
                 beq     81f                     @ configure UART1
-                cmp     \rp, #TI816XUART2       @ ti816x UART offsets different
+                cmp     \rp, #TI81XXUART2       @ ti81Xx UART offsets different
                 beq     82f                     @ configure UART2
-                cmp     \rp, #TI816XUART3       @ ti816x UART offsets different
+                cmp     \rp, #TI81XXUART3       @ ti81Xx UART offsets different
                 beq     83f                     @ configure UART3
                 cmp     \rp, #ZOOM_UART         @ only on zoom2/3
                 beq     95f                     @ configure ZOOM_UART
@@ -94,11 +94,11 @@ omap_uart_lsr:	.word	0
                 b       98f
 44:             mov     \rp, #UART_OFFSET(OMAP4_UART4_BASE)
                 b       98f
-81:             mov     \rp, #UART_OFFSET(TI816X_UART1_BASE)
+81:             mov     \rp, #UART_OFFSET(TI81XX_UART1_BASE)
                 b       98f
-82:             mov     \rp, #UART_OFFSET(TI816X_UART2_BASE)
+82:             mov     \rp, #UART_OFFSET(TI81XX_UART2_BASE)
                 b       98f
-83:             mov     \rp, #UART_OFFSET(TI816X_UART3_BASE)
+83:             mov     \rp, #UART_OFFSET(TI81XX_UART3_BASE)
                 b       98f
 
 95:             ldr     \rp, =ZOOM_UART_BASE
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 088d2ba60eff..73d617f0dc4a 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -176,8 +176,8 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
 };
 #endif
 
-#ifdef CONFIG_SOC_OMAPTI816X
-static struct map_desc omapti816x_io_desc[] __initdata = {
+#ifdef CONFIG_SOC_OMAPTI81XX
+static struct map_desc omapti81xx_io_desc[] __initdata = {
         {
                 .virtual        = L4_34XX_VIRT,
                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
@@ -280,10 +280,10 @@ void __init omap34xx_map_common_io(void)
 }
 #endif
 
-#ifdef CONFIG_SOC_OMAPTI816X
-void __init omapti816x_map_common_io(void)
+#ifdef CONFIG_SOC_OMAPTI81XX
+void __init omapti81xx_map_common_io(void)
 {
-        iotable_init(omapti816x_io_desc, ARRAY_SIZE(omapti816x_io_desc));
+        iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
 }
 #endif
 
@@ -442,9 +442,9 @@ void __init am35xx_init_early(void)
         omap3_init_early();
 }
 
-void __init ti816x_init_early(void)
+void __init ti81xx_init_early(void)
 {
-        omap2_set_globals_ti816x();
+        omap2_set_globals_ti81xx();
         omap_common_init_early();
         omap3xxx_voltagedomains_init();
         omap3xxx_powerdomains_init();
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 42b1d6591912..1fef061f7927 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -193,7 +193,7 @@ void __init omap3_init_irq(void)
         omap_init_irq(OMAP34XX_IC_BASE, 96);
 }
 
-void __init ti816x_init_irq(void)
+void __init ti81xx_init_irq(void)
 {
         omap_init_irq(OMAP34XX_IC_BASE, 128);
 }
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 9770c7624aa0..d0f009cbfb50 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -464,7 +464,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
                 mod_timer(&uart->timer, jiffies + uart->timeout);
         omap_uart_smart_idle_enable(uart, 0);
 
-        if (cpu_is_omap34xx() && !(cpu_is_ti816x() || cpu_is_am33xx())) {
+        if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx())) {
                 u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD;
                 u32 wk_mask = 0;
                 u32 padconf = 0;
@@ -746,7 +746,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
          */
         uart->regshift = p->regshift;
         uart->membase = p->membase;
-        if (cpu_is_omap44xx() || cpu_is_ti816x())
+        if (cpu_is_omap44xx() || cpu_is_ti81xx())
                 uart->errata |= UART_ERRATA_FIFO_FULL_ABORT;
         else if ((serial_read_reg(uart, UART_OMAP_MVER) & 0xFF)
                         >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV)
@@ -828,7 +828,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
         }
 
         /* Enable the MDR1 errata for OMAP3 */
-        if (cpu_is_omap34xx() && !(cpu_is_ti816x() || cpu_is_am33xx()))
+        if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx()))
                 uart->errata |= UART_ERRATA_i202_MDR1_ACCESS;
 }