diff options
author | Jouni Hogander <jouni.hogander@nokia.com> | 2008-10-06 08:49:15 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2008-10-06 08:49:15 -0400 |
commit | 6e81176dc8b7ec20da9f48b9be076e83f5d7d2ec (patch) | |
tree | 14eb07f64d6830e2299c38ff85c158c01cde9c59 /arch/arm/mach-omap2 | |
parent | 56f68556d7bbb51dd158c74deb09c783345bfbbd (diff) |
ARM: OMAP2 Provide function to enable/disable uart clocks
This patch adds common function to enable/disable omap2/3 uart
clocks. Enabled uarts are passed by bootloader in atags and clocks for
these enabled uarts are touched.
Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/serial.c | 100 |
1 files changed, 40 insertions, 60 deletions
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 69651cf08305..78ab2be70241 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * OMAP2 serial support. | 4 | * OMAP2 serial support. |
5 | * | 5 | * |
6 | * Copyright (C) 2005 Nokia Corporation | 6 | * Copyright (C) 2005-2008 Nokia Corporation |
7 | * Author: Paul Mundt <paul.mundt@nokia.com> | 7 | * Author: Paul Mundt <paul.mundt@nokia.com> |
8 | * | 8 | * |
9 | * Based off of arch/arm/mach-omap/omap1/serial.c | 9 | * Based off of arch/arm/mach-omap/omap1/serial.c |
@@ -23,12 +23,8 @@ | |||
23 | #include <mach/common.h> | 23 | #include <mach/common.h> |
24 | #include <mach/board.h> | 24 | #include <mach/board.h> |
25 | 25 | ||
26 | static struct clk * uart1_ick = NULL; | 26 | static struct clk *uart_ick[OMAP_MAX_NR_PORTS]; |
27 | static struct clk * uart1_fck = NULL; | 27 | static struct clk *uart_fck[OMAP_MAX_NR_PORTS]; |
28 | static struct clk * uart2_ick = NULL; | ||
29 | static struct clk * uart2_fck = NULL; | ||
30 | static struct clk * uart3_ick = NULL; | ||
31 | static struct clk * uart3_fck = NULL; | ||
32 | 28 | ||
33 | static struct plat_serial8250_port serial_platform_data[] = { | 29 | static struct plat_serial8250_port serial_platform_data[] = { |
34 | { | 30 | { |
@@ -38,7 +34,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
38 | .flags = UPF_BOOT_AUTOCONF, | 34 | .flags = UPF_BOOT_AUTOCONF, |
39 | .iotype = UPIO_MEM, | 35 | .iotype = UPIO_MEM, |
40 | .regshift = 2, | 36 | .regshift = 2, |
41 | .uartclk = OMAP16XX_BASE_BAUD * 16, | 37 | .uartclk = OMAP24XX_BASE_BAUD * 16, |
42 | }, { | 38 | }, { |
43 | .membase = IO_ADDRESS(OMAP_UART2_BASE), | 39 | .membase = IO_ADDRESS(OMAP_UART2_BASE), |
44 | .mapbase = OMAP_UART2_BASE, | 40 | .mapbase = OMAP_UART2_BASE, |
@@ -46,7 +42,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
46 | .flags = UPF_BOOT_AUTOCONF, | 42 | .flags = UPF_BOOT_AUTOCONF, |
47 | .iotype = UPIO_MEM, | 43 | .iotype = UPIO_MEM, |
48 | .regshift = 2, | 44 | .regshift = 2, |
49 | .uartclk = OMAP16XX_BASE_BAUD * 16, | 45 | .uartclk = OMAP24XX_BASE_BAUD * 16, |
50 | }, { | 46 | }, { |
51 | .membase = IO_ADDRESS(OMAP_UART3_BASE), | 47 | .membase = IO_ADDRESS(OMAP_UART3_BASE), |
52 | .mapbase = OMAP_UART3_BASE, | 48 | .mapbase = OMAP_UART3_BASE, |
@@ -54,7 +50,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
54 | .flags = UPF_BOOT_AUTOCONF, | 50 | .flags = UPF_BOOT_AUTOCONF, |
55 | .iotype = UPIO_MEM, | 51 | .iotype = UPIO_MEM, |
56 | .regshift = 2, | 52 | .regshift = 2, |
57 | .uartclk = OMAP16XX_BASE_BAUD * 16, | 53 | .uartclk = OMAP24XX_BASE_BAUD * 16, |
58 | }, { | 54 | }, { |
59 | .flags = 0 | 55 | .flags = 0 |
60 | } | 56 | } |
@@ -87,10 +83,27 @@ static inline void __init omap_serial_reset(struct plat_serial8250_port *p) | |||
87 | serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) | (1 << 2) | (1 << 0)); | 83 | serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) | (1 << 2) | (1 << 0)); |
88 | } | 84 | } |
89 | 85 | ||
90 | void __init omap_serial_init() | 86 | void omap_serial_enable_clocks(int enable) |
87 | { | ||
88 | int i; | ||
89 | for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { | ||
90 | if (uart_ick[i] && uart_fck[i]) { | ||
91 | if (enable) { | ||
92 | clk_enable(uart_ick[i]); | ||
93 | clk_enable(uart_fck[i]); | ||
94 | } else { | ||
95 | clk_disable(uart_ick[i]); | ||
96 | clk_disable(uart_fck[i]); | ||
97 | } | ||
98 | } | ||
99 | } | ||
100 | } | ||
101 | |||
102 | void __init omap_serial_init(void) | ||
91 | { | 103 | { |
92 | int i; | 104 | int i; |
93 | const struct omap_uart_config *info; | 105 | const struct omap_uart_config *info; |
106 | char name[16]; | ||
94 | 107 | ||
95 | /* | 108 | /* |
96 | * Make sure the serial ports are muxed on at this point. | 109 | * Make sure the serial ports are muxed on at this point. |
@@ -98,8 +111,7 @@ void __init omap_serial_init() | |||
98 | * if not needed. | 111 | * if not needed. |
99 | */ | 112 | */ |
100 | 113 | ||
101 | info = omap_get_config(OMAP_TAG_UART, | 114 | info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config); |
102 | struct omap_uart_config); | ||
103 | 115 | ||
104 | if (info == NULL) | 116 | if (info == NULL) |
105 | return; | 117 | return; |
@@ -113,53 +125,21 @@ void __init omap_serial_init() | |||
113 | continue; | 125 | continue; |
114 | } | 126 | } |
115 | 127 | ||
116 | switch (i) { | 128 | sprintf(name, "uart%d_ick", i+1); |
117 | case 0: | 129 | uart_ick[i] = clk_get(NULL, name); |
118 | uart1_ick = clk_get(NULL, "uart1_ick"); | 130 | if (IS_ERR(uart_ick[i])) { |
119 | if (IS_ERR(uart1_ick)) | 131 | printk(KERN_ERR "Could not get uart%d_ick\n", i+1); |
120 | printk("Could not get uart1_ick\n"); | 132 | uart_ick[i] = NULL; |
121 | else { | 133 | } else |
122 | clk_enable(uart1_ick); | 134 | clk_enable(uart_ick[i]); |
123 | } | 135 | |
124 | 136 | sprintf(name, "uart%d_fck", i+1); | |
125 | uart1_fck = clk_get(NULL, "uart1_fck"); | 137 | uart_fck[i] = clk_get(NULL, name); |
126 | if (IS_ERR(uart1_fck)) | 138 | if (IS_ERR(uart_fck[i])) { |
127 | printk("Could not get uart1_fck\n"); | 139 | printk(KERN_ERR "Could not get uart%d_fck\n", i+1); |
128 | else { | 140 | uart_fck[i] = NULL; |
129 | clk_enable(uart1_fck); | 141 | } else |
130 | } | 142 | clk_enable(uart_fck[i]); |
131 | break; | ||
132 | case 1: | ||
133 | uart2_ick = clk_get(NULL, "uart2_ick"); | ||
134 | if (IS_ERR(uart2_ick)) | ||
135 | printk("Could not get uart2_ick\n"); | ||
136 | else { | ||
137 | clk_enable(uart2_ick); | ||
138 | } | ||
139 | |||
140 | uart2_fck = clk_get(NULL, "uart2_fck"); | ||
141 | if (IS_ERR(uart2_fck)) | ||
142 | printk("Could not get uart2_fck\n"); | ||
143 | else { | ||
144 | clk_enable(uart2_fck); | ||
145 | } | ||
146 | break; | ||
147 | case 2: | ||
148 | uart3_ick = clk_get(NULL, "uart3_ick"); | ||
149 | if (IS_ERR(uart3_ick)) | ||
150 | printk("Could not get uart3_ick\n"); | ||
151 | else { | ||
152 | clk_enable(uart3_ick); | ||
153 | } | ||
154 | |||
155 | uart3_fck = clk_get(NULL, "uart3_fck"); | ||
156 | if (IS_ERR(uart3_fck)) | ||
157 | printk("Could not get uart3_fck\n"); | ||
158 | else { | ||
159 | clk_enable(uart3_fck); | ||
160 | } | ||
161 | break; | ||
162 | } | ||
163 | 143 | ||
164 | omap_serial_reset(p); | 144 | omap_serial_reset(p); |
165 | } | 145 | } |