diff options
author | Tony Lindgren <tony@atomide.com> | 2008-10-06 08:49:36 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2008-10-06 08:49:36 -0400 |
commit | 646e3ed1a349fbccce651fed2d3987f0e7b0f0f4 (patch) | |
tree | b9c4d52027da1468e52294f3f8db3afb0720c86d /arch/arm/mach-omap2 | |
parent | fd1dc87ded0f29c1ba1e8da62f03ab0d591d9bdd (diff) |
ARM: OMAP2: Misc updates from linux-omap tree
Misc updates from linux-omap tree, mostly to update common
device initialization and add missing defines from linux-omap
tree. Also some changes to make room for adding 34xx in
following patches.
Note that the I2C resources are now set up in
arch/arm/plat-omap/i2c.c helper, and can be removed
from devices.c.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/clock.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/devices.c | 225 | ||||
-rw-r--r-- | arch/arm/mach-omap2/gpmc.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/io.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-omap2/irq.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-omap2/memory.h | 7 |
6 files changed, 199 insertions, 67 deletions
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index ea55f286f47d..1fb330e0847d 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h | |||
@@ -21,6 +21,7 @@ | |||
21 | /* The maximum error between a target DPLL rate and the rounded rate in Hz */ | 21 | /* The maximum error between a target DPLL rate and the rounded rate in Hz */ |
22 | #define DEFAULT_DPLL_RATE_TOLERANCE 50000 | 22 | #define DEFAULT_DPLL_RATE_TOLERANCE 50000 |
23 | 23 | ||
24 | int omap2_clk_init(void); | ||
24 | int omap2_clk_enable(struct clk *clk); | 25 | int omap2_clk_enable(struct clk *clk); |
25 | void omap2_clk_disable(struct clk *clk); | 26 | void omap2_clk_disable(struct clk *clk); |
26 | long omap2_clk_round_rate(struct clk *clk, unsigned long rate); | 27 | long omap2_clk_round_rate(struct clk *clk, unsigned long rate); |
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 7a7f02559075..7cca33e23fd1 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -23,50 +23,7 @@ | |||
23 | #include <mach/board.h> | 23 | #include <mach/board.h> |
24 | #include <mach/mux.h> | 24 | #include <mach/mux.h> |
25 | #include <mach/gpio.h> | 25 | #include <mach/gpio.h> |
26 | 26 | #include <mach/eac.h> | |
27 | #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) | ||
28 | |||
29 | #define OMAP2_I2C_BASE2 0x48072000 | ||
30 | #define OMAP2_I2C_INT2 57 | ||
31 | |||
32 | static struct resource i2c_resources2[] = { | ||
33 | { | ||
34 | .start = OMAP2_I2C_BASE2, | ||
35 | .end = OMAP2_I2C_BASE2 + 0x3f, | ||
36 | .flags = IORESOURCE_MEM, | ||
37 | }, | ||
38 | { | ||
39 | .start = OMAP2_I2C_INT2, | ||
40 | .flags = IORESOURCE_IRQ, | ||
41 | }, | ||
42 | }; | ||
43 | |||
44 | static struct platform_device omap_i2c_device2 = { | ||
45 | .name = "i2c_omap", | ||
46 | .id = 2, | ||
47 | .num_resources = ARRAY_SIZE(i2c_resources2), | ||
48 | .resource = i2c_resources2, | ||
49 | }; | ||
50 | |||
51 | /* See also arch/arm/plat-omap/devices.c for first I2C on 24xx */ | ||
52 | static void omap_init_i2c(void) | ||
53 | { | ||
54 | /* REVISIT: Second I2C not in use on H4? */ | ||
55 | if (machine_is_omap_h4()) | ||
56 | return; | ||
57 | |||
58 | if (!cpu_is_omap2430()) { | ||
59 | omap_cfg_reg(J15_24XX_I2C2_SCL); | ||
60 | omap_cfg_reg(H19_24XX_I2C2_SDA); | ||
61 | } | ||
62 | (void) platform_device_register(&omap_i2c_device2); | ||
63 | } | ||
64 | |||
65 | #else | ||
66 | |||
67 | static void omap_init_i2c(void) {} | ||
68 | |||
69 | #endif | ||
70 | 27 | ||
71 | #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) | 28 | #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) |
72 | #define OMAP2_MBOX_BASE IO_ADDRESS(OMAP24XX_MAILBOX_BASE) | 29 | #define OMAP2_MBOX_BASE IO_ADDRESS(OMAP24XX_MAILBOX_BASE) |
@@ -104,7 +61,9 @@ static inline void omap_init_mbox(void) { } | |||
104 | 61 | ||
105 | #if defined(CONFIG_OMAP_STI) | 62 | #if defined(CONFIG_OMAP_STI) |
106 | 63 | ||
107 | #define OMAP2_STI_BASE IO_ADDRESS(0x48068000) | 64 | #if defined(CONFIG_ARCH_OMAP2) |
65 | |||
66 | #define OMAP2_STI_BASE 0x48068000 | ||
108 | #define OMAP2_STI_CHANNEL_BASE 0x54000000 | 67 | #define OMAP2_STI_CHANNEL_BASE 0x54000000 |
109 | #define OMAP2_STI_IRQ 4 | 68 | #define OMAP2_STI_IRQ 4 |
110 | 69 | ||
@@ -124,6 +83,25 @@ static struct resource sti_resources[] = { | |||
124 | .flags = IORESOURCE_IRQ, | 83 | .flags = IORESOURCE_IRQ, |
125 | } | 84 | } |
126 | }; | 85 | }; |
86 | #elif defined(CONFIG_ARCH_OMAP3) | ||
87 | |||
88 | #define OMAP3_SDTI_BASE 0x54500000 | ||
89 | #define OMAP3_SDTI_CHANNEL_BASE 0x54600000 | ||
90 | |||
91 | static struct resource sti_resources[] = { | ||
92 | { | ||
93 | .start = OMAP3_SDTI_BASE, | ||
94 | .end = OMAP3_SDTI_BASE + 0xFFF, | ||
95 | .flags = IORESOURCE_MEM, | ||
96 | }, | ||
97 | { | ||
98 | .start = OMAP3_SDTI_CHANNEL_BASE, | ||
99 | .end = OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1, | ||
100 | .flags = IORESOURCE_MEM, | ||
101 | } | ||
102 | }; | ||
103 | |||
104 | #endif | ||
127 | 105 | ||
128 | static struct platform_device sti_device = { | 106 | static struct platform_device sti_device = { |
129 | .name = "sti", | 107 | .name = "sti", |
@@ -140,12 +118,14 @@ static inline void omap_init_sti(void) | |||
140 | static inline void omap_init_sti(void) {} | 118 | static inline void omap_init_sti(void) {} |
141 | #endif | 119 | #endif |
142 | 120 | ||
143 | #if defined(CONFIG_SPI_OMAP24XX) | 121 | #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) |
144 | 122 | ||
145 | #include <mach/mcspi.h> | 123 | #include <mach/mcspi.h> |
146 | 124 | ||
147 | #define OMAP2_MCSPI1_BASE 0x48098000 | 125 | #define OMAP2_MCSPI1_BASE 0x48098000 |
148 | #define OMAP2_MCSPI2_BASE 0x4809a000 | 126 | #define OMAP2_MCSPI2_BASE 0x4809a000 |
127 | #define OMAP2_MCSPI3_BASE 0x480b8000 | ||
128 | #define OMAP2_MCSPI4_BASE 0x480ba000 | ||
149 | 129 | ||
150 | static struct omap2_mcspi_platform_config omap2_mcspi1_config = { | 130 | static struct omap2_mcspi_platform_config omap2_mcspi1_config = { |
151 | .num_cs = 4, | 131 | .num_cs = 4, |
@@ -159,7 +139,7 @@ static struct resource omap2_mcspi1_resources[] = { | |||
159 | }, | 139 | }, |
160 | }; | 140 | }; |
161 | 141 | ||
162 | struct platform_device omap2_mcspi1 = { | 142 | static struct platform_device omap2_mcspi1 = { |
163 | .name = "omap2_mcspi", | 143 | .name = "omap2_mcspi", |
164 | .id = 1, | 144 | .id = 1, |
165 | .num_resources = ARRAY_SIZE(omap2_mcspi1_resources), | 145 | .num_resources = ARRAY_SIZE(omap2_mcspi1_resources), |
@@ -181,7 +161,7 @@ static struct resource omap2_mcspi2_resources[] = { | |||
181 | }, | 161 | }, |
182 | }; | 162 | }; |
183 | 163 | ||
184 | struct platform_device omap2_mcspi2 = { | 164 | static struct platform_device omap2_mcspi2 = { |
185 | .name = "omap2_mcspi", | 165 | .name = "omap2_mcspi", |
186 | .id = 2, | 166 | .id = 2, |
187 | .num_resources = ARRAY_SIZE(omap2_mcspi2_resources), | 167 | .num_resources = ARRAY_SIZE(omap2_mcspi2_resources), |
@@ -191,16 +171,162 @@ struct platform_device omap2_mcspi2 = { | |||
191 | }, | 171 | }, |
192 | }; | 172 | }; |
193 | 173 | ||
174 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) | ||
175 | static struct omap2_mcspi_platform_config omap2_mcspi3_config = { | ||
176 | .num_cs = 2, | ||
177 | }; | ||
178 | |||
179 | static struct resource omap2_mcspi3_resources[] = { | ||
180 | { | ||
181 | .start = OMAP2_MCSPI3_BASE, | ||
182 | .end = OMAP2_MCSPI3_BASE + 0xff, | ||
183 | .flags = IORESOURCE_MEM, | ||
184 | }, | ||
185 | }; | ||
186 | |||
187 | static struct platform_device omap2_mcspi3 = { | ||
188 | .name = "omap2_mcspi", | ||
189 | .id = 3, | ||
190 | .num_resources = ARRAY_SIZE(omap2_mcspi3_resources), | ||
191 | .resource = omap2_mcspi3_resources, | ||
192 | .dev = { | ||
193 | .platform_data = &omap2_mcspi3_config, | ||
194 | }, | ||
195 | }; | ||
196 | #endif | ||
197 | |||
198 | #ifdef CONFIG_ARCH_OMAP3 | ||
199 | static struct omap2_mcspi_platform_config omap2_mcspi4_config = { | ||
200 | .num_cs = 1, | ||
201 | }; | ||
202 | |||
203 | static struct resource omap2_mcspi4_resources[] = { | ||
204 | { | ||
205 | .start = OMAP2_MCSPI4_BASE, | ||
206 | .end = OMAP2_MCSPI4_BASE + 0xff, | ||
207 | .flags = IORESOURCE_MEM, | ||
208 | }, | ||
209 | }; | ||
210 | |||
211 | static struct platform_device omap2_mcspi4 = { | ||
212 | .name = "omap2_mcspi", | ||
213 | .id = 4, | ||
214 | .num_resources = ARRAY_SIZE(omap2_mcspi4_resources), | ||
215 | .resource = omap2_mcspi4_resources, | ||
216 | .dev = { | ||
217 | .platform_data = &omap2_mcspi4_config, | ||
218 | }, | ||
219 | }; | ||
220 | #endif | ||
221 | |||
194 | static void omap_init_mcspi(void) | 222 | static void omap_init_mcspi(void) |
195 | { | 223 | { |
196 | platform_device_register(&omap2_mcspi1); | 224 | platform_device_register(&omap2_mcspi1); |
197 | platform_device_register(&omap2_mcspi2); | 225 | platform_device_register(&omap2_mcspi2); |
226 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) | ||
227 | platform_device_register(&omap2_mcspi3); | ||
228 | #endif | ||
229 | #ifdef CONFIG_ARCH_OMAP3 | ||
230 | platform_device_register(&omap2_mcspi4); | ||
231 | #endif | ||
198 | } | 232 | } |
199 | 233 | ||
200 | #else | 234 | #else |
201 | static inline void omap_init_mcspi(void) {} | 235 | static inline void omap_init_mcspi(void) {} |
202 | #endif | 236 | #endif |
203 | 237 | ||
238 | #ifdef CONFIG_SND_OMAP24XX_EAC | ||
239 | |||
240 | #define OMAP2_EAC_BASE 0x48090000 | ||
241 | |||
242 | static struct resource omap2_eac_resources[] = { | ||
243 | { | ||
244 | .start = OMAP2_EAC_BASE, | ||
245 | .end = OMAP2_EAC_BASE + 0x109, | ||
246 | .flags = IORESOURCE_MEM, | ||
247 | }, | ||
248 | }; | ||
249 | |||
250 | static struct platform_device omap2_eac_device = { | ||
251 | .name = "omap24xx-eac", | ||
252 | .id = -1, | ||
253 | .num_resources = ARRAY_SIZE(omap2_eac_resources), | ||
254 | .resource = omap2_eac_resources, | ||
255 | .dev = { | ||
256 | .platform_data = NULL, | ||
257 | }, | ||
258 | }; | ||
259 | |||
260 | void omap_init_eac(struct eac_platform_data *pdata) | ||
261 | { | ||
262 | omap2_eac_device.dev.platform_data = pdata; | ||
263 | platform_device_register(&omap2_eac_device); | ||
264 | } | ||
265 | |||
266 | #else | ||
267 | void omap_init_eac(struct eac_platform_data *pdata) {} | ||
268 | #endif | ||
269 | |||
270 | #ifdef CONFIG_OMAP_SHA1_MD5 | ||
271 | static struct resource sha1_md5_resources[] = { | ||
272 | { | ||
273 | .start = OMAP24XX_SEC_SHA1MD5_BASE, | ||
274 | .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64, | ||
275 | .flags = IORESOURCE_MEM, | ||
276 | }, | ||
277 | { | ||
278 | .start = INT_24XX_SHA1MD5, | ||
279 | .flags = IORESOURCE_IRQ, | ||
280 | } | ||
281 | }; | ||
282 | |||
283 | static struct platform_device sha1_md5_device = { | ||
284 | .name = "OMAP SHA1/MD5", | ||
285 | .id = -1, | ||
286 | .num_resources = ARRAY_SIZE(sha1_md5_resources), | ||
287 | .resource = sha1_md5_resources, | ||
288 | }; | ||
289 | |||
290 | static void omap_init_sha1_md5(void) | ||
291 | { | ||
292 | platform_device_register(&sha1_md5_device); | ||
293 | } | ||
294 | #else | ||
295 | static inline void omap_init_sha1_md5(void) { } | ||
296 | #endif | ||
297 | |||
298 | #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE) | ||
299 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430) | ||
300 | #define OMAP_HDQ_BASE 0x480B2000 | ||
301 | #endif | ||
302 | static struct resource omap_hdq_resources[] = { | ||
303 | { | ||
304 | .start = OMAP_HDQ_BASE, | ||
305 | .end = OMAP_HDQ_BASE + 0x1C, | ||
306 | .flags = IORESOURCE_MEM, | ||
307 | }, | ||
308 | { | ||
309 | .start = INT_24XX_HDQ_IRQ, | ||
310 | .flags = IORESOURCE_IRQ, | ||
311 | }, | ||
312 | }; | ||
313 | static struct platform_device omap_hdq_dev = { | ||
314 | .name = "omap_hdq", | ||
315 | .id = 0, | ||
316 | .dev = { | ||
317 | .platform_data = NULL, | ||
318 | }, | ||
319 | .num_resources = ARRAY_SIZE(omap_hdq_resources), | ||
320 | .resource = omap_hdq_resources, | ||
321 | }; | ||
322 | static inline void omap_hdq_init(void) | ||
323 | { | ||
324 | (void) platform_device_register(&omap_hdq_dev); | ||
325 | } | ||
326 | #else | ||
327 | static inline void omap_hdq_init(void) {} | ||
328 | #endif | ||
329 | |||
204 | /*-------------------------------------------------------------------------*/ | 330 | /*-------------------------------------------------------------------------*/ |
205 | 331 | ||
206 | static int __init omap2_init_devices(void) | 332 | static int __init omap2_init_devices(void) |
@@ -208,10 +334,11 @@ static int __init omap2_init_devices(void) | |||
208 | /* please keep these calls, and their implementations above, | 334 | /* please keep these calls, and their implementations above, |
209 | * in alphabetical order so they're easier to sort through. | 335 | * in alphabetical order so they're easier to sort through. |
210 | */ | 336 | */ |
211 | omap_init_i2c(); | ||
212 | omap_init_mbox(); | 337 | omap_init_mbox(); |
213 | omap_init_mcspi(); | 338 | omap_init_mcspi(); |
339 | omap_hdq_init(); | ||
214 | omap_init_sti(); | 340 | omap_init_sti(); |
341 | omap_init_sha1_md5(); | ||
215 | 342 | ||
216 | return 0; | 343 | return 0; |
217 | } | 344 | } |
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index be6a75306f10..149bfba43cfe 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include <asm/mach-types.h> | 23 | #include <asm/mach-types.h> |
24 | #include <mach/gpmc.h> | 24 | #include <mach/gpmc.h> |
25 | 25 | ||
26 | #include "memory.h" | 26 | #include <mach/sdrc.h> |
27 | 27 | ||
28 | /* GPMC register offsets */ | 28 | /* GPMC register offsets */ |
29 | #define GPMC_REVISION 0x00 | 29 | #define GPMC_REVISION 0x00 |
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 371e5409fef0..03c6ab1a3b1f 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -4,8 +4,11 @@ | |||
4 | * OMAP2 I/O mapping code | 4 | * OMAP2 I/O mapping code |
5 | * | 5 | * |
6 | * Copyright (C) 2005 Nokia Corporation | 6 | * Copyright (C) 2005 Nokia Corporation |
7 | * Author: Juha Yrjölä <juha.yrjola@nokia.com> | 7 | * Copyright (C) 2007 Texas Instruments |
8 | * Updated map desc to add 2430 support : <x0khasim@ti.com> | 8 | * |
9 | * Author: | ||
10 | * Juha Yrjola <juha.yrjola@nokia.com> | ||
11 | * Syed Khasim <x0khasim@ti.com> | ||
9 | * | 12 | * |
10 | * This program is free software; you can redistribute it and/or modify | 13 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License version 2 as | 14 | * it under the terms of the GNU General Public License version 2 as |
@@ -23,6 +26,11 @@ | |||
23 | 26 | ||
24 | #include <mach/mux.h> | 27 | #include <mach/mux.h> |
25 | #include <mach/omapfb.h> | 28 | #include <mach/omapfb.h> |
29 | #include <mach/sram.h> | ||
30 | |||
31 | #include "memory.h" | ||
32 | |||
33 | #include "clock.h" | ||
26 | 34 | ||
27 | #include <mach/powerdomain.h> | 35 | #include <mach/powerdomain.h> |
28 | 36 | ||
@@ -31,13 +39,6 @@ | |||
31 | #include <mach/clockdomain.h> | 39 | #include <mach/clockdomain.h> |
32 | #include "clockdomains.h" | 40 | #include "clockdomains.h" |
33 | 41 | ||
34 | extern void omap_sram_init(void); | ||
35 | extern int omap2_clk_init(void); | ||
36 | extern void omap2_check_revision(void); | ||
37 | extern void omap2_init_memory(void); | ||
38 | extern void gpmc_init(void); | ||
39 | extern void omapfb_reserve_sdram(void); | ||
40 | |||
41 | /* | 42 | /* |
42 | * The machine specific code may provide the extra mapping besides the | 43 | * The machine specific code may provide the extra mapping besides the |
43 | * default mapping provided here. | 44 | * default mapping provided here. |
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 742bd0070e63..a5c748a4a56d 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c | |||
@@ -37,11 +37,9 @@ static struct omap_irq_bank { | |||
37 | } __attribute__ ((aligned(4))) irq_banks[] = { | 37 | } __attribute__ ((aligned(4))) irq_banks[] = { |
38 | { | 38 | { |
39 | /* MPU INTC */ | 39 | /* MPU INTC */ |
40 | .base_reg = IO_ADDRESS(OMAP24XX_IC_BASE), | 40 | .base_reg = 0, |
41 | .nr_irqs = 96, | 41 | .nr_irqs = 96, |
42 | }, { | 42 | }, |
43 | /* XXX: DSP INTC */ | ||
44 | } | ||
45 | }; | 43 | }; |
46 | 44 | ||
47 | /* XXX: FIQ and additional INTC support (only MPU at the moment) */ | 45 | /* XXX: FIQ and additional INTC support (only MPU at the moment) */ |
@@ -118,10 +116,8 @@ void __init omap_init_irq(void) | |||
118 | for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { | 116 | for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { |
119 | struct omap_irq_bank *bank = irq_banks + i; | 117 | struct omap_irq_bank *bank = irq_banks + i; |
120 | 118 | ||
121 | /* XXX */ | 119 | if (cpu_is_omap24xx()) |
122 | if (!bank->base_reg) | 120 | bank->base_reg = IO_ADDRESS(OMAP24XX_IC_BASE); |
123 | continue; | ||
124 | |||
125 | omap_irq_bank_init_one(bank); | 121 | omap_irq_bank_init_one(bank); |
126 | 122 | ||
127 | nr_irqs += bank->nr_irqs; | 123 | nr_irqs += bank->nr_irqs; |
diff --git a/arch/arm/mach-omap2/memory.h b/arch/arm/mach-omap2/memory.h index 9a280b50a893..bb3db80a7c46 100644 --- a/arch/arm/mach-omap2/memory.h +++ b/arch/arm/mach-omap2/memory.h | |||
@@ -14,6 +14,9 @@ | |||
14 | * published by the Free Software Foundation. | 14 | * published by the Free Software Foundation. |
15 | */ | 15 | */ |
16 | 16 | ||
17 | #ifndef ARCH_ARM_MACH_OMAP2_MEMORY_H | ||
18 | #define ARCH_ARM_MACH_OMAP2_MEMORY_H | ||
19 | |||
17 | /* Memory timings */ | 20 | /* Memory timings */ |
18 | #define M_DDR 1 | 21 | #define M_DDR 1 |
19 | #define M_LOCK_CTRL (1 << 2) | 22 | #define M_LOCK_CTRL (1 << 2) |
@@ -34,3 +37,7 @@ extern u32 omap2_memory_get_fast_dll_ctrl(void); | |||
34 | extern u32 omap2_memory_get_type(void); | 37 | extern u32 omap2_memory_get_type(void); |
35 | u32 omap2_dll_force_needed(void); | 38 | u32 omap2_dll_force_needed(void); |
36 | u32 omap2_reprogram_sdrc(u32 level, u32 force); | 39 | u32 omap2_reprogram_sdrc(u32 level, u32 force); |
40 | void __init omap2_init_memory(void); | ||
41 | void __init gpmc_init(void); | ||
42 | |||
43 | #endif | ||