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authorTony Lindgren <tony@atomide.com>2010-07-05 09:31:36 -0400
committerTony Lindgren <tony@atomide.com>2010-07-05 09:31:36 -0400
commit89ba1092296bc455bfd59db608ae1954861f5911 (patch)
tree591835b7b589125c04f238a8c8b0ba593165eece /arch/arm/mach-omap2
parentfc44046167f08f3887e9685efc95f817a5ff45a1 (diff)
omap: mux: Add data for 2430
Add data for 2430. Big thanks to Paul Walmsley <paul@pwsan.com> for generating usable mux data out of TRMs. Cc: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/Makefile1
-rw-r--r--arch/arm/mach-omap2/mux.h8
-rw-r--r--arch/arm/mach-omap2/mux2430.c791
-rw-r--r--arch/arm/mach-omap2/mux2430.h370
4 files changed, 1170 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 911781c81063..490fdf8d1875 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -37,6 +37,7 @@ AFLAGS_sram34xx.o :=-Wa,-march=armv7-a
37 37
38# Pin multiplexing 38# Pin multiplexing
39obj-$(CONFIG_ARCH_OMAP2420) += mux2420.o 39obj-$(CONFIG_ARCH_OMAP2420) += mux2420.o
40obj-$(CONFIG_ARCH_OMAP2430) += mux2430.o
40obj-$(CONFIG_ARCH_OMAP3) += mux34xx.o 41obj-$(CONFIG_ARCH_OMAP3) += mux34xx.o
41 42
42# SMS/SDRC 43# SMS/SDRC
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index e14cd4dc9a4d..a8e040c2c7e9 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -8,6 +8,7 @@
8 */ 8 */
9 9
10#include "mux2420.h" 10#include "mux2420.h"
11#include "mux2430.h"
11#include "mux34xx.h" 12#include "mux34xx.h"
12 13
13#define OMAP_MUX_TERMINATOR 0xffff 14#define OMAP_MUX_TERMINATOR 0xffff
@@ -181,6 +182,13 @@ void omap_mux_write_array(struct omap_board_mux *board_mux);
181int omap2420_mux_init(struct omap_board_mux *board_mux, int flags); 182int omap2420_mux_init(struct omap_board_mux *board_mux, int flags);
182 183
183/** 184/**
185 * omap2430_mux_init() - initialize mux system with board specific set
186 * @board_mux: Board specific mux table
187 * @flags: OMAP package type used for the board
188 */
189int omap2430_mux_init(struct omap_board_mux *board_mux, int flags);
190
191/**
184 * omap3_mux_init() - initialize mux system with board specific set 192 * omap3_mux_init() - initialize mux system with board specific set
185 * @board_mux: Board specific mux table 193 * @board_mux: Board specific mux table
186 * @flags: OMAP package type used for the board 194 * @flags: OMAP package type used for the board
diff --git a/arch/arm/mach-omap2/mux2430.c b/arch/arm/mach-omap2/mux2430.c
new file mode 100644
index 000000000000..7dcaaa8af32a
--- /dev/null
+++ b/arch/arm/mach-omap2/mux2430.c
@@ -0,0 +1,791 @@
1/*
2 * Copyright (C) 2010 Nokia
3 * Copyright (C) 2010 Texas Instruments
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#include <linux/module.h>
11#include <linux/init.h>
12
13#include "mux.h"
14
15#ifdef CONFIG_OMAP_MUX
16
17#define _OMAP2430_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \
18{ \
19 .reg_offset = (OMAP2430_CONTROL_PADCONF_##M0##_OFFSET), \
20 .gpio = (g), \
21 .muxnames = { m0, m1, m2, m3, m4, m5, m6, m7 }, \
22}
23
24#else
25
26#define _OMAP2430_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \
27{ \
28 .reg_offset = (OMAP2430_CONTROL_PADCONF_##M0##_OFFSET), \
29 .gpio = (g), \
30}
31
32#endif
33
34#define _OMAP2430_BALLENTRY(M0, bb, bt) \
35{ \
36 .reg_offset = (OMAP2430_CONTROL_PADCONF_##M0##_OFFSET), \
37 .balls = { bb, bt }, \
38}
39
40/*
41 * Superset of all mux modes for omap2430
42 */
43static struct omap_mux __initdata omap2430_muxmodes[] = {
44 _OMAP2430_MUXENTRY(CAM_D0, 133,
45 "cam_d0", "hw_dbg0", "sti_dout", "gpio_133",
46 NULL, NULL, "etk_d2", "safe_mode"),
47 _OMAP2430_MUXENTRY(CAM_D10, 146,
48 "cam_d10", NULL, NULL, "gpio_146",
49 NULL, NULL, "etk_d12", "safe_mode"),
50 _OMAP2430_MUXENTRY(CAM_D11, 145,
51 "cam_d11", NULL, NULL, "gpio_145",
52 NULL, NULL, "etk_d13", "safe_mode"),
53 _OMAP2430_MUXENTRY(CAM_D1, 132,
54 "cam_d1", "hw_dbg1", "sti_din", "gpio_132",
55 NULL, NULL, "etk_d3", "safe_mode"),
56 _OMAP2430_MUXENTRY(CAM_D2, 129,
57 "cam_d2", "hw_dbg2", "mcbsp1_clkx", "gpio_129",
58 NULL, NULL, "etk_d4", "safe_mode"),
59 _OMAP2430_MUXENTRY(CAM_D3, 128,
60 "cam_d3", "hw_dbg3", "mcbsp1_dr", "gpio_128",
61 NULL, NULL, "etk_d5", "safe_mode"),
62 _OMAP2430_MUXENTRY(CAM_D4, 143,
63 "cam_d4", "hw_dbg4", "mcbsp1_fsr", "gpio_143",
64 NULL, NULL, "etk_d6", "safe_mode"),
65 _OMAP2430_MUXENTRY(CAM_D5, 112,
66 "cam_d5", "hw_dbg5", "mcbsp1_clkr", "gpio_112",
67 NULL, NULL, "etk_d7", "safe_mode"),
68 _OMAP2430_MUXENTRY(CAM_D6, 137,
69 "cam_d6", "hw_dbg6", NULL, "gpio_137",
70 NULL, NULL, "etk_d8", "safe_mode"),
71 _OMAP2430_MUXENTRY(CAM_D7, 136,
72 "cam_d7", "hw_dbg7", NULL, "gpio_136",
73 NULL, NULL, "etk_d9", "safe_mode"),
74 _OMAP2430_MUXENTRY(CAM_D8, 135,
75 "cam_d8", "hw_dbg8", NULL, "gpio_135",
76 NULL, NULL, "etk_d10", "safe_mode"),
77 _OMAP2430_MUXENTRY(CAM_D9, 134,
78 "cam_d9", "hw_dbg9", NULL, "gpio_134",
79 NULL, NULL, "etk_d11", "safe_mode"),
80 _OMAP2430_MUXENTRY(CAM_HS, 11,
81 "cam_hs", "hw_dbg10", "mcbsp1_dx", "gpio_11",
82 NULL, NULL, "etk_d1", "safe_mode"),
83 _OMAP2430_MUXENTRY(CAM_LCLK, 0,
84 "cam_lclk", NULL, "mcbsp_clks", NULL,
85 NULL, NULL, "etk_c1", "safe_mode"),
86 _OMAP2430_MUXENTRY(CAM_VS, 12,
87 "cam_vs", "hw_dbg11", "mcbsp1_fsx", "gpio_12",
88 NULL, NULL, "etk_d0", "safe_mode"),
89 _OMAP2430_MUXENTRY(CAM_XCLK, 0,
90 "cam_xclk", NULL, "sti_clk", NULL,
91 NULL, NULL, "etk_c2", NULL),
92 _OMAP2430_MUXENTRY(DSS_ACBIAS, 48,
93 "dss_acbias", NULL, "mcbsp2_fsx", "gpio_48",
94 NULL, NULL, NULL, "safe_mode"),
95 _OMAP2430_MUXENTRY(DSS_DATA0, 40,
96 "dss_data0", "uart1_cts", NULL, "gpio_40",
97 NULL, NULL, NULL, "safe_mode"),
98 _OMAP2430_MUXENTRY(DSS_DATA10, 128,
99 "dss_data10", "sdi_data1n", NULL, "gpio_128",
100 NULL, NULL, NULL, "safe_mode"),
101 _OMAP2430_MUXENTRY(DSS_DATA11, 129,
102 "dss_data11", "sdi_data1p", NULL, "gpio_129",
103 NULL, NULL, NULL, "safe_mode"),
104 _OMAP2430_MUXENTRY(DSS_DATA12, 130,
105 "dss_data12", "sdi_data2n", NULL, "gpio_130",
106 NULL, NULL, NULL, "safe_mode"),
107 _OMAP2430_MUXENTRY(DSS_DATA13, 131,
108 "dss_data13", "sdi_data2p", NULL, "gpio_131",
109 NULL, NULL, NULL, "safe_mode"),
110 _OMAP2430_MUXENTRY(DSS_DATA14, 132,
111 "dss_data14", "sdi_data3n", NULL, "gpio_132",
112 NULL, NULL, NULL, "safe_mode"),
113 _OMAP2430_MUXENTRY(DSS_DATA15, 133,
114 "dss_data15", "sdi_data3p", NULL, "gpio_133",
115 NULL, NULL, NULL, "safe_mode"),
116 _OMAP2430_MUXENTRY(DSS_DATA16, 46,
117 "dss_data16", NULL, NULL, "gpio_46",
118 NULL, NULL, NULL, "safe_mode"),
119 _OMAP2430_MUXENTRY(DSS_DATA17, 47,
120 "dss_data17", NULL, NULL, "gpio_47",
121 NULL, NULL, NULL, "safe_mode"),
122 _OMAP2430_MUXENTRY(DSS_DATA1, 41,
123 "dss_data1", "uart1_rts", NULL, "gpio_41",
124 NULL, NULL, NULL, "safe_mode"),
125 _OMAP2430_MUXENTRY(DSS_DATA2, 42,
126 "dss_data2", "uart1_tx", NULL, "gpio_42",
127 NULL, NULL, NULL, "safe_mode"),
128 _OMAP2430_MUXENTRY(DSS_DATA3, 43,
129 "dss_data3", "uart1_rx", NULL, "gpio_43",
130 NULL, NULL, NULL, "safe_mode"),
131 _OMAP2430_MUXENTRY(DSS_DATA4, 44,
132 "dss_data4", "uart3_rx_irrx", NULL, "gpio_44",
133 NULL, NULL, NULL, "safe_mode"),
134 _OMAP2430_MUXENTRY(DSS_DATA5, 45,
135 "dss_data5", "uart3_tx_irtx", NULL, "gpio_45",
136 NULL, NULL, NULL, "safe_mode"),
137 _OMAP2430_MUXENTRY(DSS_DATA6, 144,
138 "dss_data6", NULL, NULL, "gpio_144",
139 NULL, NULL, NULL, "safe_mode"),
140 _OMAP2430_MUXENTRY(DSS_DATA7, 147,
141 "dss_data7", NULL, NULL, "gpio_147",
142 NULL, NULL, NULL, "safe_mode"),
143 _OMAP2430_MUXENTRY(DSS_DATA8, 38,
144 "dss_data8", NULL, NULL, "gpio_38",
145 NULL, NULL, NULL, "safe_mode"),
146 _OMAP2430_MUXENTRY(DSS_DATA9, 39,
147 "dss_data9", NULL, NULL, "gpio_39",
148 NULL, NULL, NULL, "safe_mode"),
149 _OMAP2430_MUXENTRY(DSS_HSYNC, 110,
150 "dss_hsync", NULL, NULL, "gpio_110",
151 NULL, NULL, NULL, "safe_mode"),
152 _OMAP2430_MUXENTRY(GPIO_113, 113,
153 "gpio_113", "mcbsp2_clkx", NULL, "gpio_113",
154 NULL, NULL, NULL, "safe_mode"),
155 _OMAP2430_MUXENTRY(GPIO_114, 114,
156 "gpio_114", "mcbsp2_fsx", NULL, "gpio_114",
157 NULL, NULL, NULL, "safe_mode"),
158 _OMAP2430_MUXENTRY(GPIO_115, 115,
159 "gpio_115", "mcbsp2_dr", NULL, "gpio_115",
160 NULL, NULL, NULL, "safe_mode"),
161 _OMAP2430_MUXENTRY(GPIO_116, 116,
162 "gpio_116", "mcbsp2_dx", NULL, "gpio_116",
163 NULL, NULL, NULL, "safe_mode"),
164 _OMAP2430_MUXENTRY(GPIO_128, 128,
165 "gpio_128", NULL, "sti_din", "gpio_128",
166 NULL, "sys_boot0", NULL, "safe_mode"),
167 _OMAP2430_MUXENTRY(GPIO_129, 129,
168 "gpio_129", NULL, "sti_dout", "gpio_129",
169 NULL, "sys_boot1", NULL, "safe_mode"),
170 _OMAP2430_MUXENTRY(GPIO_130, 130,
171 "gpio_130", NULL, NULL, "gpio_130",
172 "jtag_emu2", "sys_boot2", NULL, "safe_mode"),
173 _OMAP2430_MUXENTRY(GPIO_131, 131,
174 "gpio_131", NULL, NULL, "gpio_131",
175 "jtag_emu3", "sys_boot3", NULL, "safe_mode"),
176 _OMAP2430_MUXENTRY(GPIO_132, 132,
177 "gpio_132", NULL, NULL, "gpio_132",
178 NULL, "sys_boot4", NULL, "safe_mode"),
179 _OMAP2430_MUXENTRY(GPIO_133, 133,
180 "gpio_133", NULL, NULL, "gpio_133",
181 NULL, "sys_boot5", NULL, "safe_mode"),
182 _OMAP2430_MUXENTRY(GPIO_134, 134,
183 "gpio_134", "ccp_datn", NULL, "gpio_134",
184 NULL, NULL, NULL, "safe_mode"),
185 _OMAP2430_MUXENTRY(GPIO_135, 135,
186 "gpio_135", "ccp_datp", NULL, "gpio_135",
187 NULL, NULL, NULL, "safe_mode"),
188 _OMAP2430_MUXENTRY(GPIO_136, 136,
189 "gpio_136", "ccp_clkn", NULL, "gpio_136",
190 NULL, NULL, NULL, "safe_mode"),
191 _OMAP2430_MUXENTRY(GPIO_137, 137,
192 "gpio_137", "ccp_clkp", NULL, "gpio_137",
193 NULL, NULL, NULL, "safe_mode"),
194 _OMAP2430_MUXENTRY(GPIO_138, 138,
195 "gpio_138", "spi3_clk", NULL, "gpio_138",
196 NULL, NULL, NULL, "safe_mode"),
197 _OMAP2430_MUXENTRY(GPIO_139, 139,
198 "gpio_139", "spi3_cs0", "sys_ndmareq3", "gpio_139",
199 NULL, NULL, NULL, "safe_mode"),
200 _OMAP2430_MUXENTRY(GPIO_140, 140,
201 "gpio_140", "spi3_simo", "sys_ndmareq4", "gpio_140",
202 NULL, NULL, "etk_d14", "safe_mode"),
203 _OMAP2430_MUXENTRY(GPIO_141, 141,
204 "gpio_141", "spi3_somi", NULL, "gpio_141",
205 NULL, NULL, NULL, "safe_mode"),
206 _OMAP2430_MUXENTRY(GPIO_142, 142,
207 "gpio_142", "spi3_cs1", "sys_ndmareq2", "gpio_142",
208 NULL, NULL, "etk_d15", "safe_mode"),
209 _OMAP2430_MUXENTRY(GPIO_148, 148,
210 "gpio_148", "mcbsp5_fsx", NULL, "gpio_148",
211 NULL, NULL, NULL, "safe_mode"),
212 _OMAP2430_MUXENTRY(GPIO_149, 149,
213 "gpio_149", "mcbsp5_dx", NULL, "gpio_149",
214 NULL, NULL, NULL, "safe_mode"),
215 _OMAP2430_MUXENTRY(GPIO_150, 150,
216 "gpio_150", "mcbsp5_dr", NULL, "gpio_150",
217 NULL, NULL, NULL, "safe_mode"),
218 _OMAP2430_MUXENTRY(GPIO_151, 151,
219 "gpio_151", "sys_pwrok", NULL, "gpio_151",
220 NULL, NULL, NULL, "safe_mode"),
221 _OMAP2430_MUXENTRY(GPIO_152, 152,
222 "gpio_152", "uart1_cts", "sys_ndmareq1", "gpio_152",
223 NULL, NULL, NULL, "safe_mode"),
224 _OMAP2430_MUXENTRY(GPIO_153, 153,
225 "gpio_153", "uart1_rx", "sys_ndmareq0", "gpio_153",
226 NULL, NULL, NULL, "safe_mode"),
227 _OMAP2430_MUXENTRY(GPIO_154, 154,
228 "gpio_154", "mcbsp5_clkx", NULL, "gpio_154",
229 NULL, NULL, NULL, "safe_mode"),
230 _OMAP2430_MUXENTRY(GPIO_63, 63,
231 "gpio_63", "mcbsp4_clkx", NULL, "gpio_63",
232 NULL, NULL, NULL, "safe_mode"),
233 _OMAP2430_MUXENTRY(GPIO_78, 78,
234 "gpio_78", NULL, "uart2_rts", "gpio_78",
235 "uart3_rts_sd", NULL, NULL, "safe_mode"),
236 _OMAP2430_MUXENTRY(GPIO_79, 79,
237 "gpio_79", "secure_indicator", "uart2_tx", "gpio_79",
238 "uart3_tx_irtx", NULL, NULL, "safe_mode"),
239 _OMAP2430_MUXENTRY(GPIO_7, 7,
240 "gpio_7", NULL, "uart2_cts", "gpio_7",
241 "uart3_cts_rctx", NULL, NULL, "safe_mode"),
242 _OMAP2430_MUXENTRY(GPIO_80, 80,
243 "gpio_80", NULL, "uart2_rx", "gpio_80",
244 "uart3_rx_irrx", NULL, NULL, "safe_mode"),
245 _OMAP2430_MUXENTRY(GPMC_A10, 3,
246 "gpmc_a10", NULL, "sys_ndmareq0", "gpio_3",
247 NULL, NULL, NULL, "safe_mode"),
248 _OMAP2430_MUXENTRY(GPMC_A1, 31,
249 "gpmc_a1", NULL, NULL, "gpio_31",
250 NULL, NULL, NULL, "safe_mode"),
251 _OMAP2430_MUXENTRY(GPMC_A2, 30,
252 "gpmc_a2", NULL, NULL, "gpio_30",
253 NULL, NULL, NULL, "safe_mode"),
254 _OMAP2430_MUXENTRY(GPMC_A3, 29,
255 "gpmc_a3", NULL, NULL, "gpio_29",
256 NULL, NULL, NULL, "safe_mode"),
257 _OMAP2430_MUXENTRY(GPMC_A4, 49,
258 "gpmc_a4", NULL, NULL, "gpio_49",
259 NULL, NULL, NULL, "safe_mode"),
260 _OMAP2430_MUXENTRY(GPMC_A5, 53,
261 "gpmc_a5", NULL, NULL, "gpio_53",
262 NULL, NULL, NULL, "safe_mode"),
263 _OMAP2430_MUXENTRY(GPMC_A6, 52,
264 "gpmc_a6", NULL, NULL, "gpio_52",
265 NULL, NULL, NULL, "safe_mode"),
266 _OMAP2430_MUXENTRY(GPMC_A7, 6,
267 "gpmc_a7", NULL, NULL, "gpio_6",
268 NULL, NULL, NULL, "safe_mode"),
269 _OMAP2430_MUXENTRY(GPMC_A8, 5,
270 "gpmc_a8", NULL, NULL, "gpio_5",
271 NULL, NULL, NULL, "safe_mode"),
272 _OMAP2430_MUXENTRY(GPMC_A9, 4,
273 "gpmc_a9", NULL, "sys_ndmareq1", "gpio_4",
274 NULL, NULL, NULL, "safe_mode"),
275 _OMAP2430_MUXENTRY(GPMC_CLK, 21,
276 "gpmc_clk", NULL, NULL, "gpio_21",
277 NULL, NULL, NULL, "safe_mode"),
278 _OMAP2430_MUXENTRY(GPMC_D10, 18,
279 "gpmc_d10", NULL, NULL, "gpio_18",
280 NULL, NULL, NULL, "safe_mode"),
281 _OMAP2430_MUXENTRY(GPMC_D11, 57,
282 "gpmc_d11", NULL, NULL, "gpio_57",
283 NULL, NULL, NULL, "safe_mode"),
284 _OMAP2430_MUXENTRY(GPMC_D12, 77,
285 "gpmc_d12", NULL, NULL, "gpio_77",
286 NULL, NULL, NULL, "safe_mode"),
287 _OMAP2430_MUXENTRY(GPMC_D13, 76,
288 "gpmc_d13", NULL, NULL, "gpio_76",
289 NULL, NULL, NULL, "safe_mode"),
290 _OMAP2430_MUXENTRY(GPMC_D14, 55,
291 "gpmc_d14", NULL, NULL, "gpio_55",
292 NULL, NULL, NULL, "safe_mode"),
293 _OMAP2430_MUXENTRY(GPMC_D15, 54,
294 "gpmc_d15", NULL, NULL, "gpio_54",
295 NULL, NULL, NULL, "safe_mode"),
296 _OMAP2430_MUXENTRY(GPMC_D8, 20,
297 "gpmc_d8", NULL, NULL, "gpio_20",
298 NULL, NULL, NULL, "safe_mode"),
299 _OMAP2430_MUXENTRY(GPMC_D9, 19,
300 "gpmc_d9", NULL, NULL, "gpio_19",
301 NULL, NULL, NULL, "safe_mode"),
302 _OMAP2430_MUXENTRY(GPMC_NCS1, 22,
303 "gpmc_ncs1", NULL, NULL, "gpio_22",
304 NULL, NULL, NULL, "safe_mode"),
305 _OMAP2430_MUXENTRY(GPMC_NCS2, 23,
306 "gpmc_ncs2", NULL, NULL, "gpio_23",
307 NULL, NULL, NULL, "safe_mode"),
308 _OMAP2430_MUXENTRY(GPMC_NCS3, 24,
309 "gpmc_ncs3", "gpmc_io_dir", NULL, "gpio_24",
310 NULL, NULL, NULL, "safe_mode"),
311 _OMAP2430_MUXENTRY(GPMC_NCS4, 25,
312 "gpmc_ncs4", NULL, NULL, "gpio_25",
313 NULL, NULL, NULL, "safe_mode"),
314 _OMAP2430_MUXENTRY(GPMC_NCS5, 26,
315 "gpmc_ncs5", NULL, NULL, "gpio_26",
316 NULL, NULL, NULL, "safe_mode"),
317 _OMAP2430_MUXENTRY(GPMC_NCS6, 27,
318 "gpmc_ncs6", NULL, NULL, "gpio_27",
319 NULL, NULL, NULL, "safe_mode"),
320 _OMAP2430_MUXENTRY(GPMC_NCS7, 28,
321 "gpmc_ncs7", "gpmc_io_dir", NULL, "gpio_28",
322 NULL, NULL, NULL, "safe_mode"),
323 _OMAP2430_MUXENTRY(GPMC_WAIT1, 33,
324 "gpmc_wait1", NULL, NULL, "gpio_33",
325 NULL, NULL, NULL, "safe_mode"),
326 _OMAP2430_MUXENTRY(GPMC_WAIT2, 34,
327 "gpmc_wait2", NULL, NULL, "gpio_34",
328 NULL, NULL, NULL, "safe_mode"),
329 _OMAP2430_MUXENTRY(GPMC_WAIT3, 35,
330 "gpmc_wait3", NULL, NULL, "gpio_35",
331 NULL, NULL, NULL, "safe_mode"),
332 _OMAP2430_MUXENTRY(HDQ_SIO, 101,
333 "hdq_sio", "usb2_tllse0", "sys_altclk", "gpio_101",
334 "uart3_rx_irrx", NULL, NULL, "safe_mode"),
335 _OMAP2430_MUXENTRY(I2C1_SCL, 50,
336 "i2c1_scl", NULL, NULL, "gpio_50",
337 NULL, NULL, NULL, "safe_mode"),
338 _OMAP2430_MUXENTRY(I2C1_SDA, 51,
339 "i2c1_sda", NULL, NULL, "gpio_51",
340 NULL, NULL, NULL, "safe_mode"),
341 _OMAP2430_MUXENTRY(I2C2_SCL, 99,
342 "i2c2_scl", NULL, NULL, "gpio_99",
343 NULL, NULL, NULL, "safe_mode"),
344 _OMAP2430_MUXENTRY(I2C2_SDA, 100,
345 "i2c2_sda", NULL, NULL, "gpio_100",
346 NULL, NULL, NULL, "safe_mode"),
347 _OMAP2430_MUXENTRY(JTAG_EMU0, 127,
348 "jtag_emu0", "secure_indicator", NULL, "gpio_127",
349 NULL, NULL, NULL, "safe_mode"),
350 _OMAP2430_MUXENTRY(JTAG_EMU1, 126,
351 "jtag_emu1", NULL, NULL, "gpio_126",
352 NULL, NULL, NULL, "safe_mode"),
353 _OMAP2430_MUXENTRY(MCBSP1_CLKR, 92,
354 "mcbsp1_clkr", "ssi2_dat_tx", NULL, "gpio_92",
355 NULL, NULL, NULL, "safe_mode"),
356 _OMAP2430_MUXENTRY(MCBSP1_CLKX, 98,
357 "mcbsp1_clkx", "ssi2_wake", NULL, "gpio_98",
358 NULL, NULL, NULL, "safe_mode"),
359 _OMAP2430_MUXENTRY(MCBSP1_DR, 95,
360 "mcbsp1_dr", "ssi2_dat_rx", NULL, "gpio_95",
361 NULL, NULL, NULL, "safe_mode"),
362 _OMAP2430_MUXENTRY(MCBSP1_DX, 94,
363 "mcbsp1_dx", "ssi2_rdy_tx", NULL, "gpio_94",
364 NULL, NULL, NULL, "safe_mode"),
365 _OMAP2430_MUXENTRY(MCBSP1_FSR, 93,
366 "mcbsp1_fsr", "ssi2_flag_tx", NULL, "gpio_93",
367 "spi2_cs1", NULL, NULL, "safe_mode"),
368 _OMAP2430_MUXENTRY(MCBSP1_FSX, 97,
369 "mcbsp1_fsx", "ssi2_rdy_rx", NULL, "gpio_97",
370 NULL, NULL, NULL, "safe_mode"),
371 _OMAP2430_MUXENTRY(MCBSP2_CLKX, 147,
372 "mcbsp2_clkx", "sdi_clkp", "dss_data23", "gpio_147",
373 NULL, NULL, NULL, "safe_mode"),
374 _OMAP2430_MUXENTRY(MCBSP2_DR, 144,
375 "mcbsp2_dr", "sdi_clkn", "dss_data22", "gpio_144",
376 NULL, NULL, NULL, "safe_mode"),
377 _OMAP2430_MUXENTRY(MCBSP3_CLKX, 71,
378 "mcbsp3_clkx", NULL, NULL, "gpio_71",
379 NULL, NULL, NULL, "safe_mode"),
380 _OMAP2430_MUXENTRY(MCBSP3_DR, 73,
381 "mcbsp3_dr", NULL, NULL, "gpio_73",
382 NULL, NULL, NULL, "safe_mode"),
383 _OMAP2430_MUXENTRY(MCBSP3_DX, 74,
384 "mcbsp3_dx", NULL, "sti_clk", "gpio_74",
385 NULL, NULL, NULL, "safe_mode"),
386 _OMAP2430_MUXENTRY(MCBSP3_FSX, 72,
387 "mcbsp3_fsx", NULL, NULL, "gpio_72",
388 NULL, NULL, NULL, "safe_mode"),
389 _OMAP2430_MUXENTRY(MCBSP_CLKS, 96,
390 "mcbsp_clks", "ssi2_flag_rx", NULL, "gpio_96",
391 NULL, NULL, NULL, "safe_mode"),
392 _OMAP2430_MUXENTRY(SDMMC1_CLKO, 0,
393 "sdmmc1_clko", "ms_clko", NULL, NULL,
394 NULL, "hw_dbg9", "hw_dbg3", "safe_mode"),
395 _OMAP2430_MUXENTRY(SDMMC1_CMD, 0,
396 "sdmmc1_cmd", "ms_bs", NULL, NULL,
397 NULL, "hw_dbg8", "hw_dbg2", "safe_mode"),
398 _OMAP2430_MUXENTRY(SDMMC1_DAT0, 0,
399 "sdmmc1_dat0", "ms_dat0", NULL, NULL,
400 NULL, "hw_dbg7", "hw_dbg1", "safe_mode"),
401 _OMAP2430_MUXENTRY(SDMMC1_DAT1, 75,
402 "sdmmc1_dat1", "ms_dat1", NULL, "gpio_75",
403 NULL, "hw_dbg6", "hw_dbg0", "safe_mode"),
404 _OMAP2430_MUXENTRY(SDMMC1_DAT2, 0,
405 "sdmmc1_dat2", "ms_dat2", NULL, NULL,
406 NULL, "hw_dbg5", "hw_dbg10", "safe_mode"),
407 _OMAP2430_MUXENTRY(SDMMC1_DAT3, 0,
408 "sdmmc1_dat3", "ms_dat3", NULL, NULL,
409 NULL, "hw_dbg4", "hw_dbg11", "safe_mode"),
410 _OMAP2430_MUXENTRY(SDMMC2_CLKO, 13,
411 "sdmmc2_clko", NULL, NULL, "gpio_13",
412 NULL, "spi3_clk", NULL, "safe_mode"),
413 _OMAP2430_MUXENTRY(SDMMC2_CMD, 15,
414 "sdmmc2_cmd", "usb2_rcv", NULL, "gpio_15",
415 NULL, "spi3_simo", NULL, "safe_mode"),
416 _OMAP2430_MUXENTRY(SDMMC2_DAT0, 16,
417 "sdmmc2_dat0", "usb2_tllse0", NULL, "gpio_16",
418 NULL, "spi3_somi", NULL, "safe_mode"),
419 _OMAP2430_MUXENTRY(SDMMC2_DAT1, 58,
420 "sdmmc2_dat1", "usb2_txen", NULL, "gpio_58",
421 NULL, NULL, NULL, "safe_mode"),
422 _OMAP2430_MUXENTRY(SDMMC2_DAT2, 17,
423 "sdmmc2_dat2", "usb2_dat", NULL, "gpio_17",
424 NULL, "spi3_cs1", NULL, "safe_mode"),
425 _OMAP2430_MUXENTRY(SDMMC2_DAT3, 14,
426 "sdmmc2_dat3", "usb2_se0", NULL, "gpio_14",
427 NULL, "spi3_cs0", NULL, "safe_mode"),
428 _OMAP2430_MUXENTRY(SDRC_A12, 2,
429 "sdrc_a12", NULL, NULL, "gpio_2",
430 NULL, NULL, NULL, "safe_mode"),
431 _OMAP2430_MUXENTRY(SDRC_A13, 1,
432 "sdrc_a13", NULL, NULL, "gpio_1",
433 NULL, NULL, NULL, "safe_mode"),
434 _OMAP2430_MUXENTRY(SDRC_A14, 0,
435 "sdrc_a14", NULL, NULL, "gpio_0",
436 NULL, NULL, NULL, "safe_mode"),
437 _OMAP2430_MUXENTRY(SDRC_CKE1, 36,
438 "sdrc_cke1", NULL, NULL, "gpio_36",
439 NULL, NULL, NULL, "safe_mode"),
440 _OMAP2430_MUXENTRY(SDRC_NCS1, 37,
441 "sdrc_ncs1", NULL, NULL, "gpio_37",
442 NULL, NULL, NULL, "safe_mode"),
443 _OMAP2430_MUXENTRY(SPI1_CLK, 81,
444 "spi1_clk", NULL, NULL, "gpio_81",
445 NULL, NULL, NULL, "safe_mode"),
446 _OMAP2430_MUXENTRY(SPI1_CS0, 84,
447 "spi1_cs0", NULL, NULL, "gpio_84",
448 NULL, NULL, NULL, "safe_mode"),
449 _OMAP2430_MUXENTRY(SPI1_CS1, 85,
450 "spi1_cs1", NULL, NULL, "gpio_85",
451 NULL, NULL, NULL, "safe_mode"),
452 _OMAP2430_MUXENTRY(SPI1_CS2, 86,
453 "spi1_cs2", NULL, NULL, "gpio_86",
454 NULL, NULL, NULL, "safe_mode"),
455 _OMAP2430_MUXENTRY(SPI1_CS3, 87,
456 "spi1_cs3", "spi2_cs1", NULL, "gpio_87",
457 NULL, NULL, NULL, "safe_mode"),
458 _OMAP2430_MUXENTRY(SPI1_SIMO, 82,
459 "spi1_simo", NULL, NULL, "gpio_82",
460 NULL, NULL, NULL, "safe_mode"),
461 _OMAP2430_MUXENTRY(SPI1_SOMI, 83,
462 "spi1_somi", NULL, NULL, "gpio_83",
463 NULL, NULL, NULL, "safe_mode"),
464 _OMAP2430_MUXENTRY(SPI2_CLK, 88,
465 "spi2_clk", "gpt9_pwm_evt", NULL, "gpio_88",
466 NULL, NULL, NULL, "safe_mode"),
467 _OMAP2430_MUXENTRY(SPI2_CS0, 91,
468 "spi2_cs0", "gpt12_pwm_evt", NULL, "gpio_91",
469 NULL, NULL, NULL, "safe_mode"),
470 _OMAP2430_MUXENTRY(SPI2_SIMO, 89,
471 "spi2_simo", "gpt10_pwm_evt", NULL, "gpio_89",
472 NULL, NULL, NULL, "safe_mode"),
473 _OMAP2430_MUXENTRY(SPI2_SOMI, 90,
474 "spi2_somi", "gpt11_pwm_evt", NULL, "gpio_90",
475 NULL, NULL, NULL, "safe_mode"),
476 _OMAP2430_MUXENTRY(SSI1_DAT_RX, 62,
477 "ssi1_dat_rx", "uart1_rx", "usb1_dat", "gpio_62",
478 NULL, NULL, NULL, "safe_mode"),
479 _OMAP2430_MUXENTRY(SSI1_DAT_TX, 59,
480 "ssi1_dat_tx", "uart1_tx", "usb1_se0", "gpio_59",
481 NULL, NULL, NULL, "safe_mode"),
482 _OMAP2430_MUXENTRY(SSI1_FLAG_RX, 64,
483 "ssi1_flag_rx", "mcbsp4_dr", NULL, "gpio_64",
484 NULL, NULL, NULL, "safe_mode"),
485 _OMAP2430_MUXENTRY(SSI1_FLAG_TX, 60,
486 "ssi1_flag_tx", "uart1_rts", "usb1_rcv", "gpio_60",
487 NULL, NULL, NULL, "safe_mode"),
488 _OMAP2430_MUXENTRY(SSI1_RDY_RX, 65,
489 "ssi1_rdy_rx", "mcbsp4_dx", NULL, "gpio_65",
490 NULL, NULL, NULL, "safe_mode"),
491 _OMAP2430_MUXENTRY(SSI1_RDY_TX, 61,
492 "ssi1_rdy_tx", "uart1_cts", "usb1_txen", "gpio_61",
493 NULL, NULL, NULL, "safe_mode"),
494 _OMAP2430_MUXENTRY(SSI1_WAKE, 66,
495 "ssi1_wake", "mcbsp4_fsx", NULL, "gpio_66",
496 NULL, NULL, NULL, "safe_mode"),
497 _OMAP2430_MUXENTRY(SYS_CLKOUT, 111,
498 "sys_clkout", NULL, NULL, "gpio_111",
499 NULL, NULL, NULL, "safe_mode"),
500 _OMAP2430_MUXENTRY(SYS_DRM_MSECURE, 118,
501 "sys_drm_msecure", NULL, "sys_ndmareq6", "gpio_118",
502 NULL, NULL, NULL, "safe_mode"),
503 _OMAP2430_MUXENTRY(SYS_NIRQ0, 56,
504 "sys_nirq0", NULL, NULL, "gpio_56",
505 NULL, NULL, NULL, "safe_mode"),
506 _OMAP2430_MUXENTRY(SYS_NIRQ1, 125,
507 "sys_nirq1", NULL, "sys_ndmareq5", "gpio_125",
508 NULL, NULL, NULL, "safe_mode"),
509 _OMAP2430_MUXENTRY(UART1_CTS, 32,
510 "uart1_cts", "sdi_vsync", "dss_data18", "gpio_32",
511 "mcbsp5_clkx", NULL, NULL, "safe_mode"),
512 _OMAP2430_MUXENTRY(UART1_RTS, 8,
513 "uart1_rts", "sdi_hsync", "dss_data19", "gpio_8",
514 "mcbsp5_fsx", NULL, NULL, "safe_mode"),
515 _OMAP2430_MUXENTRY(UART1_RX, 10,
516 "uart1_rx", "sdi_stp", "dss_data21", "gpio_10",
517 "mcbsp5_dr", NULL, NULL, "safe_mode"),
518 _OMAP2430_MUXENTRY(UART1_TX, 9,
519 "uart1_tx", "sdi_den", "dss_data20", "gpio_9",
520 "mcbsp5_dx", NULL, NULL, "safe_mode"),
521 _OMAP2430_MUXENTRY(UART2_CTS, 67,
522 "uart2_cts", "usb1_rcv", "gpt9_pwm_evt", "gpio_67",
523 NULL, NULL, NULL, "safe_mode"),
524 _OMAP2430_MUXENTRY(UART2_RTS, 68,
525 "uart2_rts", "usb1_txen", "gpt10_pwm_evt", "gpio_68",
526 NULL, NULL, NULL, "safe_mode"),
527 _OMAP2430_MUXENTRY(UART2_RX, 70,
528 "uart2_rx", "usb1_dat", "gpt12_pwm_evt", "gpio_70",
529 NULL, NULL, NULL, "safe_mode"),
530 _OMAP2430_MUXENTRY(UART2_TX, 69,
531 "uart2_tx", "usb1_se0", "gpt11_pwm_evt", "gpio_69",
532 NULL, NULL, NULL, "safe_mode"),
533 _OMAP2430_MUXENTRY(UART3_CTS_RCTX, 102,
534 "uart3_cts_rctx", "uart3_rx_irrx", NULL, "gpio_102",
535 NULL, NULL, NULL, "safe_mode"),
536 _OMAP2430_MUXENTRY(UART3_RTS_SD, 103,
537 "uart3_rts_sd", "uart3_tx_irtx", NULL, "gpio_103",
538 NULL, NULL, NULL, "safe_mode"),
539 _OMAP2430_MUXENTRY(UART3_RX_IRRX, 105,
540 "uart3_rx_irrx", NULL, NULL, "gpio_105",
541 NULL, NULL, NULL, "safe_mode"),
542 _OMAP2430_MUXENTRY(UART3_TX_IRTX, 104,
543 "uart3_tx_irtx", "uart3_cts_rctx", NULL, "gpio_104",
544 NULL, NULL, NULL, "safe_mode"),
545 _OMAP2430_MUXENTRY(USB0HS_CLK, 120,
546 "usb0hs_clk", NULL, NULL, "gpio_120",
547 NULL, NULL, NULL, "safe_mode"),
548 _OMAP2430_MUXENTRY(USB0HS_DATA0, 0,
549 "usb0hs_data0", "uart3_tx_irtx", NULL, NULL,
550 "usb0_txen", NULL, NULL, "safe_mode"),
551 _OMAP2430_MUXENTRY(USB0HS_DATA1, 0,
552 "usb0hs_data1", "uart3_rx_irrx", NULL, NULL,
553 "usb0_dat", NULL, NULL, "safe_mode"),
554 _OMAP2430_MUXENTRY(USB0HS_DATA2, 0,
555 "usb0hs_data2", "uart3_rts_sd", NULL, NULL,
556 "usb0_se0", NULL, NULL, "safe_mode"),
557 _OMAP2430_MUXENTRY(USB0HS_DATA3, 106,
558 "usb0hs_data3", NULL, "uart3_cts_rctx", "gpio_106",
559 "usb0_puen", NULL, NULL, "safe_mode"),
560 _OMAP2430_MUXENTRY(USB0HS_DATA4, 107,
561 "usb0hs_data4", "mcbsp2_dr", NULL, "gpio_107",
562 "usb0_vp", NULL, NULL, "safe_mode"),
563 _OMAP2430_MUXENTRY(USB0HS_DATA5, 108,
564 "usb0hs_data5", "mcbsp2_dx", NULL, "gpio_108",
565 "usb0_vm", NULL, NULL, "safe_mode"),
566 _OMAP2430_MUXENTRY(USB0HS_DATA6, 109,
567 "usb0hs_data6", "mcbsp2_fsx", NULL, "gpio_109",
568 "usb0_rcv", NULL, NULL, "safe_mode"),
569 _OMAP2430_MUXENTRY(USB0HS_DATA7, 124,
570 "usb0hs_data7", "mcbsp2_clkx", NULL, "gpio_124",
571 NULL, NULL, NULL, "safe_mode"),
572 _OMAP2430_MUXENTRY(USB0HS_DIR, 121,
573 "usb0hs_dir", NULL, NULL, "gpio_121",
574 NULL, NULL, NULL, "safe_mode"),
575 _OMAP2430_MUXENTRY(USB0HS_NXT, 123,
576 "usb0hs_nxt", NULL, NULL, "gpio_123",
577 NULL, NULL, NULL, "safe_mode"),
578 _OMAP2430_MUXENTRY(USB0HS_STP, 122,
579 "usb0hs_stp", NULL, NULL, "gpio_122",
580 NULL, NULL, NULL, "safe_mode"),
581 { .reg_offset = OMAP_MUX_TERMINATOR },
582};
583
584/*
585 * Balls for POP package
586 * 447-pin s-PBGA Package, 0.00mm Ball Pitch (Bottom)
587 */
588#ifdef CONFIG_DEBUG_FS
589struct omap_ball __initdata omap2430_pop_ball[] = {
590 _OMAP2430_BALLENTRY(CAM_D0, "t8", NULL),
591 _OMAP2430_BALLENTRY(CAM_D1, "t4", NULL),
592 _OMAP2430_BALLENTRY(CAM_D10, "r4", NULL),
593 _OMAP2430_BALLENTRY(CAM_D11, "w3", NULL),
594 _OMAP2430_BALLENTRY(CAM_D2, "r2", NULL),
595 _OMAP2430_BALLENTRY(CAM_D3, "u3", NULL),
596 _OMAP2430_BALLENTRY(CAM_D4, "u2", NULL),
597 _OMAP2430_BALLENTRY(CAM_D5, "v1", NULL),
598 _OMAP2430_BALLENTRY(CAM_D6, "t3", NULL),
599 _OMAP2430_BALLENTRY(CAM_D7, "r3", NULL),
600 _OMAP2430_BALLENTRY(CAM_D8, "u7", NULL),
601 _OMAP2430_BALLENTRY(CAM_D9, "t7", NULL),
602 _OMAP2430_BALLENTRY(CAM_HS, "p2", NULL),
603 _OMAP2430_BALLENTRY(CAM_LCLK, "r7", NULL),
604 _OMAP2430_BALLENTRY(CAM_VS, "n2", NULL),
605 _OMAP2430_BALLENTRY(CAM_XCLK, "p3", NULL),
606 _OMAP2430_BALLENTRY(DSS_ACBIAS, "y3", NULL),
607 _OMAP2430_BALLENTRY(DSS_DATA0, "v8", NULL),
608 _OMAP2430_BALLENTRY(DSS_DATA1, "w1", NULL),
609 _OMAP2430_BALLENTRY(DSS_DATA10, "k25", NULL),
610 _OMAP2430_BALLENTRY(DSS_DATA11, "j25", NULL),
611 _OMAP2430_BALLENTRY(DSS_DATA12, "k24", NULL),
612 _OMAP2430_BALLENTRY(DSS_DATA13, "j24", NULL),
613 _OMAP2430_BALLENTRY(DSS_DATA14, "h25", NULL),
614 _OMAP2430_BALLENTRY(DSS_DATA15, "g25", NULL),
615 _OMAP2430_BALLENTRY(DSS_DATA16, "ac3", NULL),
616 _OMAP2430_BALLENTRY(DSS_DATA17, "y7", NULL),
617 _OMAP2430_BALLENTRY(DSS_DATA2, "u8", NULL),
618 _OMAP2430_BALLENTRY(DSS_DATA3, "u4", NULL),
619 _OMAP2430_BALLENTRY(DSS_DATA4, "v3", NULL),
620 _OMAP2430_BALLENTRY(DSS_DATA5, "aa4", NULL),
621 _OMAP2430_BALLENTRY(DSS_DATA6, "w8", NULL),
622 _OMAP2430_BALLENTRY(DSS_DATA7, "y1", NULL),
623 _OMAP2430_BALLENTRY(DSS_DATA8, "aa2", NULL),
624 _OMAP2430_BALLENTRY(DSS_DATA9, "ab4", NULL),
625 _OMAP2430_BALLENTRY(DSS_HSYNC, "v2", NULL),
626 _OMAP2430_BALLENTRY(GPIO_113, "ad16", NULL),
627 _OMAP2430_BALLENTRY(GPIO_114, "ac10", NULL),
628 _OMAP2430_BALLENTRY(GPIO_115, "ad13", NULL),
629 _OMAP2430_BALLENTRY(GPIO_116, "ae15", NULL),
630 _OMAP2430_BALLENTRY(GPIO_128, "p1", NULL),
631 _OMAP2430_BALLENTRY(GPIO_129, "r1", NULL),
632 _OMAP2430_BALLENTRY(GPIO_130, "p7", NULL),
633 _OMAP2430_BALLENTRY(GPIO_131, "l8", NULL),
634 _OMAP2430_BALLENTRY(GPIO_132, "w24", NULL),
635 _OMAP2430_BALLENTRY(GPIO_133, "aa24", NULL),
636 _OMAP2430_BALLENTRY(GPIO_134, "ae12", NULL),
637 _OMAP2430_BALLENTRY(GPIO_135, "ae11", NULL),
638 _OMAP2430_BALLENTRY(GPIO_136, "ad12", NULL),
639 _OMAP2430_BALLENTRY(GPIO_137, "ad11", NULL),
640 _OMAP2430_BALLENTRY(GPIO_138, "y12", NULL),
641 _OMAP2430_BALLENTRY(GPIO_139, "ad17", NULL),
642 _OMAP2430_BALLENTRY(GPIO_140, "l7", NULL),
643 _OMAP2430_BALLENTRY(GPIO_141, "ac24", NULL),
644 _OMAP2430_BALLENTRY(GPIO_142, "m3", NULL),
645 _OMAP2430_BALLENTRY(GPIO_148, "af12", NULL),
646 _OMAP2430_BALLENTRY(GPIO_149, "k7", NULL),
647 _OMAP2430_BALLENTRY(GPIO_150, "m1", NULL),
648 _OMAP2430_BALLENTRY(GPIO_151, "ad14", NULL),
649 _OMAP2430_BALLENTRY(GPIO_152, "ad18", NULL),
650 _OMAP2430_BALLENTRY(GPIO_153, "u24", NULL),
651 _OMAP2430_BALLENTRY(GPIO_154, "ae16", NULL),
652 _OMAP2430_BALLENTRY(GPIO_63, "n3", NULL),
653 _OMAP2430_BALLENTRY(GPIO_7, "ac23", NULL),
654 _OMAP2430_BALLENTRY(GPIO_78, "ad10", NULL),
655 _OMAP2430_BALLENTRY(GPIO_79, "ae10", NULL),
656 _OMAP2430_BALLENTRY(GPIO_80, "ae13", NULL),
657 _OMAP2430_BALLENTRY(GPMC_A1, "a9", NULL),
658 _OMAP2430_BALLENTRY(GPMC_A10, "g12", NULL),
659 _OMAP2430_BALLENTRY(GPMC_A2, "b8", NULL),
660 _OMAP2430_BALLENTRY(GPMC_A3, "g10", NULL),
661 _OMAP2430_BALLENTRY(GPMC_A4, "g11", NULL),
662 _OMAP2430_BALLENTRY(GPMC_A5, "a10", NULL),
663 _OMAP2430_BALLENTRY(GPMC_A6, "g13", NULL),
664 _OMAP2430_BALLENTRY(GPMC_A7, "a6", NULL),
665 _OMAP2430_BALLENTRY(GPMC_A8, "h1", NULL),
666 _OMAP2430_BALLENTRY(GPMC_A9, "c8", NULL),
667 _OMAP2430_BALLENTRY(GPMC_CLK, "n1", "l1"),
668 _OMAP2430_BALLENTRY(GPMC_D10, "d1", "n1"),
669 _OMAP2430_BALLENTRY(GPMC_D11, "d2", "p2"),
670 _OMAP2430_BALLENTRY(GPMC_D12, "e1", "p1"),
671 _OMAP2430_BALLENTRY(GPMC_D13, "e3", "m1"),
672 _OMAP2430_BALLENTRY(GPMC_D14, "c7", "j2"),
673 _OMAP2430_BALLENTRY(GPMC_D15, "f3", "k2"),
674 _OMAP2430_BALLENTRY(GPMC_D8, "e2", "r1"),
675 _OMAP2430_BALLENTRY(GPMC_D9, "ab1", "t1"),
676 _OMAP2430_BALLENTRY(GPMC_NCS1, "ac1", "w1"),
677 _OMAP2430_BALLENTRY(GPMC_NCS2, "c6", NULL),
678 _OMAP2430_BALLENTRY(GPMC_NCS3, "b9", NULL),
679 _OMAP2430_BALLENTRY(GPMC_NCS4, "b4", NULL),
680 _OMAP2430_BALLENTRY(GPMC_NCS5, "a4", NULL),
681 _OMAP2430_BALLENTRY(GPMC_NCS6, "f1", NULL),
682 _OMAP2430_BALLENTRY(GPMC_NCS7, "a7", NULL),
683 _OMAP2430_BALLENTRY(GPMC_WAIT1, "j1", "y8"),
684 _OMAP2430_BALLENTRY(GPMC_WAIT2, "b7", NULL),
685 _OMAP2430_BALLENTRY(GPMC_WAIT3, "g14", NULL),
686 _OMAP2430_BALLENTRY(HDQ_SIO, "h20", NULL),
687 _OMAP2430_BALLENTRY(I2C1_SCL, "y17", NULL),
688 _OMAP2430_BALLENTRY(I2C1_SDA, "ac19", NULL),
689 _OMAP2430_BALLENTRY(I2C2_SCL, "n7", NULL),
690 _OMAP2430_BALLENTRY(I2C2_SDA, "m4", NULL),
691 _OMAP2430_BALLENTRY(JTAG_EMU0, "e25", NULL),
692 _OMAP2430_BALLENTRY(JTAG_EMU1, "e24", NULL),
693 _OMAP2430_BALLENTRY(MCBSP1_CLKR, "ab2", NULL),
694 _OMAP2430_BALLENTRY(MCBSP1_CLKX, "y9", NULL),
695 _OMAP2430_BALLENTRY(MCBSP1_DR, "af3", NULL),
696 _OMAP2430_BALLENTRY(MCBSP1_DX, "aa1", NULL),
697 _OMAP2430_BALLENTRY(MCBSP1_FSR, "ad5", NULL),
698 _OMAP2430_BALLENTRY(MCBSP1_FSX, "ab3", NULL),
699 _OMAP2430_BALLENTRY(MCBSP2_CLKX, "j26", NULL),
700 _OMAP2430_BALLENTRY(MCBSP2_DR, "k26", NULL),
701 _OMAP2430_BALLENTRY(MCBSP3_CLKX, "ac9", NULL),
702 _OMAP2430_BALLENTRY(MCBSP3_DR, "ae2", NULL),
703 _OMAP2430_BALLENTRY(MCBSP3_DX, "af4", NULL),
704 _OMAP2430_BALLENTRY(MCBSP3_FSX, "ae4", NULL),
705 _OMAP2430_BALLENTRY(MCBSP_CLKS, "ad6", NULL),
706 _OMAP2430_BALLENTRY(SDMMC1_CLKO, "n23", NULL),
707 _OMAP2430_BALLENTRY(SDMMC1_CMD, "l23", NULL),
708 _OMAP2430_BALLENTRY(SDMMC1_DAT0, "m24", NULL),
709 _OMAP2430_BALLENTRY(SDMMC1_DAT1, "p23", NULL),
710 _OMAP2430_BALLENTRY(SDMMC1_DAT2, "t20", NULL),
711 _OMAP2430_BALLENTRY(SDMMC1_DAT3, "r20", NULL),
712 _OMAP2430_BALLENTRY(SDMMC2_CLKO, "v26", NULL),
713 _OMAP2430_BALLENTRY(SDMMC2_CMD, "w20", NULL),
714 _OMAP2430_BALLENTRY(SDMMC2_DAT0, "v23", NULL),
715 _OMAP2430_BALLENTRY(SDMMC2_DAT1, "y24", NULL),
716 _OMAP2430_BALLENTRY(SDMMC2_DAT2, "v25", NULL),
717 _OMAP2430_BALLENTRY(SDMMC2_DAT3, "v24", NULL),
718 _OMAP2430_BALLENTRY(SDRC_A12, "w26", "r21"),
719 _OMAP2430_BALLENTRY(SDRC_A13, "af20", "aa15"),
720 _OMAP2430_BALLENTRY(SDRC_A14, "af16", "y12"),
721 _OMAP2430_BALLENTRY(SDRC_CKE1, "af15", "y13"),
722 _OMAP2430_BALLENTRY(SDRC_NCS1, "aa25", "t20"),
723 _OMAP2430_BALLENTRY(SPI1_CLK, "y18", NULL),
724 _OMAP2430_BALLENTRY(SPI1_CS0, "u1", NULL),
725 _OMAP2430_BALLENTRY(SPI1_CS1, "af19", NULL),
726 _OMAP2430_BALLENTRY(SPI1_CS2, "ae19", NULL),
727 _OMAP2430_BALLENTRY(SPI1_CS3, "h24", NULL),
728 _OMAP2430_BALLENTRY(SPI1_SIMO, "ad15", NULL),
729 _OMAP2430_BALLENTRY(SPI1_SOMI, "ae17", NULL),
730 _OMAP2430_BALLENTRY(SPI2_CLK, "y20", NULL),
731 _OMAP2430_BALLENTRY(SPI2_CS0, "y19", NULL),
732 _OMAP2430_BALLENTRY(SPI2_SIMO, "ac20", NULL),
733 _OMAP2430_BALLENTRY(SPI2_SOMI, "ad19", NULL),
734 _OMAP2430_BALLENTRY(SSI1_DAT_RX, "aa26", NULL),
735 _OMAP2430_BALLENTRY(SSI1_DAT_TX, "ad24", NULL),
736 _OMAP2430_BALLENTRY(SSI1_FLAG_RX, "ad23", NULL),
737 _OMAP2430_BALLENTRY(SSI1_FLAG_TX, "ab24", NULL),
738 _OMAP2430_BALLENTRY(SSI1_RDY_RX, "ab25", NULL),
739 _OMAP2430_BALLENTRY(SSI1_RDY_TX, "y25", NULL),
740 _OMAP2430_BALLENTRY(SSI1_WAKE, "ac25", NULL),
741 _OMAP2430_BALLENTRY(SYS_CLKOUT, "r25", NULL),
742 _OMAP2430_BALLENTRY(SYS_DRM_MSECURE, "ae3", NULL),
743 _OMAP2430_BALLENTRY(SYS_NIRQ0, "w25", NULL),
744 _OMAP2430_BALLENTRY(SYS_NIRQ1, "ad21", NULL),
745 _OMAP2430_BALLENTRY(UART1_CTS, "p24", NULL),
746 _OMAP2430_BALLENTRY(UART1_RTS, "p25", NULL),
747 _OMAP2430_BALLENTRY(UART1_RX, "n24", NULL),
748 _OMAP2430_BALLENTRY(UART1_TX, "r24", NULL),
749 _OMAP2430_BALLENTRY(UART2_CTS, "u25", NULL),
750 _OMAP2430_BALLENTRY(UART2_RTS, "t23", NULL),
751 _OMAP2430_BALLENTRY(UART2_RX, "t24", NULL),
752 _OMAP2430_BALLENTRY(UART2_TX, "u20", NULL),
753 _OMAP2430_BALLENTRY(UART3_CTS_RCTX, "m2", NULL),
754 _OMAP2430_BALLENTRY(UART3_RTS_SD, "k2", NULL),
755 _OMAP2430_BALLENTRY(UART3_RX_IRRX, "l3", NULL),
756 _OMAP2430_BALLENTRY(UART3_TX_IRTX, "l2", NULL),
757 _OMAP2430_BALLENTRY(USB0HS_CLK, "ae8", NULL),
758 _OMAP2430_BALLENTRY(USB0HS_DATA0, "ad4", NULL),
759 _OMAP2430_BALLENTRY(USB0HS_DATA1, "ae6", NULL),
760 _OMAP2430_BALLENTRY(USB0HS_DATA2, "af9", NULL),
761 _OMAP2430_BALLENTRY(USB0HS_DATA3, "ad9", NULL),
762 _OMAP2430_BALLENTRY(USB0HS_DATA4, "y11", NULL),
763 _OMAP2430_BALLENTRY(USB0HS_DATA5, "ad7", NULL),
764 _OMAP2430_BALLENTRY(USB0HS_DATA6, "ae7", NULL),
765 _OMAP2430_BALLENTRY(USB0HS_DATA7, "ac7", NULL),
766 _OMAP2430_BALLENTRY(USB0HS_DIR, "ad8", NULL),
767 _OMAP2430_BALLENTRY(USB0HS_NXT, "ae9", NULL),
768 _OMAP2430_BALLENTRY(USB0HS_STP, "ae5", NULL),
769 { .reg_offset = OMAP_MUX_TERMINATOR },
770};
771#else
772#define omap2430_pop_ball NULL
773#endif
774
775int __init omap2430_mux_init(struct omap_board_mux *board_subset, int flags)
776{
777 struct omap_ball *package_balls = NULL;
778
779 switch (flags & OMAP_PACKAGE_MASK) {
780 case OMAP_PACKAGE_ZAC:
781 package_balls = omap2430_pop_ball;
782 break;
783 default:
784 pr_warning("mux: No ball data available for omap2420 package\n");
785 }
786
787 return omap_mux_init(OMAP2430_CONTROL_PADCONF_MUX_PBASE,
788 OMAP2430_CONTROL_PADCONF_MUX_SIZE,
789 omap2430_muxmodes, NULL, board_subset,
790 package_balls);
791}
diff --git a/arch/arm/mach-omap2/mux2430.h b/arch/arm/mach-omap2/mux2430.h
new file mode 100644
index 000000000000..adbea0d03e08
--- /dev/null
+++ b/arch/arm/mach-omap2/mux2430.h
@@ -0,0 +1,370 @@
1/*
2 * Copyright (C) 2009 Nokia
3 * Copyright (C) 2009 Texas Instruments
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#define OMAP2430_CONTROL_PADCONF_MUX_PBASE 0x49002030LU
11
12#define OMAP2430_MUX(mode0, mux_value) \
13{ \
14 .reg_offset = (OMAP2430_CONTROL_PADCONF_##mode0##_OFFSET), \
15 .value = (mux_value), \
16}
17
18/*
19 * OMAP2430 CONTROL_PADCONF* register offsets for pin-muxing
20 *
21 * Extracted from the TRM. Add 0x49002030 to these values to get the
22 * absolute addresses. The name in the macro is the mode-0 name of
23 * the pin. NOTE: These registers are 8-bits wide.
24 *
25 * Note that these defines use SDMMC instead of MMC for compability
26 * with signal names used in 3630.
27 */
28#define OMAP2430_CONTROL_PADCONF_GPMC_CLK_OFFSET 0x000
29#define OMAP2430_CONTROL_PADCONF_GPMC_NCS0_OFFSET 0x001
30#define OMAP2430_CONTROL_PADCONF_GPMC_NCS1_OFFSET 0x002
31#define OMAP2430_CONTROL_PADCONF_GPMC_NCS2_OFFSET 0x003
32#define OMAP2430_CONTROL_PADCONF_GPMC_NCS3_OFFSET 0x004
33#define OMAP2430_CONTROL_PADCONF_GPMC_NCS4_OFFSET 0x005
34#define OMAP2430_CONTROL_PADCONF_GPMC_NCS5_OFFSET 0x006
35#define OMAP2430_CONTROL_PADCONF_GPMC_NCS6_OFFSET 0x007
36#define OMAP2430_CONTROL_PADCONF_GPMC_NCS7_OFFSET 0x008
37#define OMAP2430_CONTROL_PADCONF_GPMC_NADV_ALE_OFFSET 0x009
38#define OMAP2430_CONTROL_PADCONF_GPMC_NOE_NRE_OFFSET 0x00a
39#define OMAP2430_CONTROL_PADCONF_GPMC_NWE_OFFSET 0x00b
40#define OMAP2430_CONTROL_PADCONF_GPMC_NBE0_CLE_OFFSET 0x00c
41#define OMAP2430_CONTROL_PADCONF_GPMC_NBE1_OFFSET 0x00d
42#define OMAP2430_CONTROL_PADCONF_GPMC_NWP_OFFSET 0x00e
43#define OMAP2430_CONTROL_PADCONF_GPMC_WAIT0_OFFSET 0x00f
44#define OMAP2430_CONTROL_PADCONF_GPMC_WAIT1_OFFSET 0x010
45#define OMAP2430_CONTROL_PADCONF_GPMC_WAIT2_OFFSET 0x011
46#define OMAP2430_CONTROL_PADCONF_GPMC_WAIT3_OFFSET 0x012
47#define OMAP2430_CONTROL_PADCONF_SDRC_CLK_OFFSET 0x013
48#define OMAP2430_CONTROL_PADCONF_SDRC_NCLK_OFFSET 0x014
49#define OMAP2430_CONTROL_PADCONF_SDRC_NCS0_OFFSET 0x015
50#define OMAP2430_CONTROL_PADCONF_SDRC_NCS1_OFFSET 0x016
51#define OMAP2430_CONTROL_PADCONF_SDRC_CKE0_OFFSET 0x017
52#define OMAP2430_CONTROL_PADCONF_SDRC_CKE1_OFFSET 0x018
53#define OMAP2430_CONTROL_PADCONF_SDRC_NRAS_OFFSET 0x019
54#define OMAP2430_CONTROL_PADCONF_SDRC_NCAS_OFFSET 0x01a
55#define OMAP2430_CONTROL_PADCONF_SDRC_NWE_OFFSET 0x01b
56#define OMAP2430_CONTROL_PADCONF_SDRC_DM0_OFFSET 0x01c
57#define OMAP2430_CONTROL_PADCONF_SDRC_DM1_OFFSET 0x01d
58#define OMAP2430_CONTROL_PADCONF_SDRC_DM2_OFFSET 0x01e
59#define OMAP2430_CONTROL_PADCONF_SDRC_DM3_OFFSET 0x01f
60#define OMAP2430_CONTROL_PADCONF_SDRC_DQS0_OFFSET 0x020
61#define OMAP2430_CONTROL_PADCONF_SDRC_DQS1_OFFSET 0x021
62#define OMAP2430_CONTROL_PADCONF_SDRC_DQS2_OFFSET 0x022
63#define OMAP2430_CONTROL_PADCONF_SDRC_DQS3_OFFSET 0x023
64#define OMAP2430_CONTROL_PADCONF_SDRC_A14_OFFSET 0x024
65#define OMAP2430_CONTROL_PADCONF_SDRC_A13_OFFSET 0x025
66#define OMAP2430_CONTROL_PADCONF_SDRC_A12_OFFSET 0x026
67#define OMAP2430_CONTROL_PADCONF_SDRC_BA1_OFFSET 0x027
68#define OMAP2430_CONTROL_PADCONF_SDRC_BA0_OFFSET 0x028
69#define OMAP2430_CONTROL_PADCONF_SDRC_A11_OFFSET 0x029
70#define OMAP2430_CONTROL_PADCONF_SDRC_A10_OFFSET 0x02a
71#define OMAP2430_CONTROL_PADCONF_SDRC_A9_OFFSET 0x02b
72#define OMAP2430_CONTROL_PADCONF_SDRC_A8_OFFSET 0x02c
73#define OMAP2430_CONTROL_PADCONF_SDRC_A7_OFFSET 0x02d
74#define OMAP2430_CONTROL_PADCONF_SDRC_A6_OFFSET 0x02e
75#define OMAP2430_CONTROL_PADCONF_SDRC_A5_OFFSET 0x02f
76#define OMAP2430_CONTROL_PADCONF_SDRC_A4_OFFSET 0x030
77#define OMAP2430_CONTROL_PADCONF_SDRC_A3_OFFSET 0x031
78#define OMAP2430_CONTROL_PADCONF_SDRC_A2_OFFSET 0x032
79#define OMAP2430_CONTROL_PADCONF_SDRC_A1_OFFSET 0x033
80#define OMAP2430_CONTROL_PADCONF_SDRC_A0_OFFSET 0x034
81#define OMAP2430_CONTROL_PADCONF_SDRC_D31_OFFSET 0x035
82#define OMAP2430_CONTROL_PADCONF_SDRC_D30_OFFSET 0x036
83#define OMAP2430_CONTROL_PADCONF_SDRC_D29_OFFSET 0x037
84#define OMAP2430_CONTROL_PADCONF_SDRC_D28_OFFSET 0x038
85#define OMAP2430_CONTROL_PADCONF_SDRC_D27_OFFSET 0x039
86#define OMAP2430_CONTROL_PADCONF_SDRC_D26_OFFSET 0x03a
87#define OMAP2430_CONTROL_PADCONF_SDRC_D25_OFFSET 0x03b
88#define OMAP2430_CONTROL_PADCONF_SDRC_D24_OFFSET 0x03c
89#define OMAP2430_CONTROL_PADCONF_SDRC_D23_OFFSET 0x03d
90#define OMAP2430_CONTROL_PADCONF_SDRC_D22_OFFSET 0x03e
91#define OMAP2430_CONTROL_PADCONF_SDRC_D21_OFFSET 0x03f
92#define OMAP2430_CONTROL_PADCONF_SDRC_D20_OFFSET 0x040
93#define OMAP2430_CONTROL_PADCONF_SDRC_D19_OFFSET 0x041
94#define OMAP2430_CONTROL_PADCONF_SDRC_D18_OFFSET 0x042
95#define OMAP2430_CONTROL_PADCONF_SDRC_D17_OFFSET 0x043
96#define OMAP2430_CONTROL_PADCONF_SDRC_D16_OFFSET 0x044
97#define OMAP2430_CONTROL_PADCONF_SDRC_D15_OFFSET 0x045
98#define OMAP2430_CONTROL_PADCONF_SDRC_D14_OFFSET 0x046
99#define OMAP2430_CONTROL_PADCONF_SDRC_D13_OFFSET 0x047
100#define OMAP2430_CONTROL_PADCONF_SDRC_D12_OFFSET 0x048
101#define OMAP2430_CONTROL_PADCONF_SDRC_D11_OFFSET 0x049
102#define OMAP2430_CONTROL_PADCONF_SDRC_D10_OFFSET 0x04a
103#define OMAP2430_CONTROL_PADCONF_SDRC_D9_OFFSET 0x04b
104#define OMAP2430_CONTROL_PADCONF_SDRC_D8_OFFSET 0x04c
105#define OMAP2430_CONTROL_PADCONF_SDRC_D7_OFFSET 0x04d
106#define OMAP2430_CONTROL_PADCONF_SDRC_D6_OFFSET 0x04e
107#define OMAP2430_CONTROL_PADCONF_SDRC_D5_OFFSET 0x04f
108#define OMAP2430_CONTROL_PADCONF_SDRC_D4_OFFSET 0x050
109#define OMAP2430_CONTROL_PADCONF_SDRC_D3_OFFSET 0x051
110#define OMAP2430_CONTROL_PADCONF_SDRC_D2_OFFSET 0x052
111#define OMAP2430_CONTROL_PADCONF_SDRC_D1_OFFSET 0x053
112#define OMAP2430_CONTROL_PADCONF_SDRC_D0_OFFSET 0x054
113#define OMAP2430_CONTROL_PADCONF_GPMC_A10_OFFSET 0x055
114#define OMAP2430_CONTROL_PADCONF_GPMC_A9_OFFSET 0x056
115#define OMAP2430_CONTROL_PADCONF_GPMC_A8_OFFSET 0x057
116#define OMAP2430_CONTROL_PADCONF_GPMC_A7_OFFSET 0x058
117#define OMAP2430_CONTROL_PADCONF_GPMC_A6_OFFSET 0x059
118#define OMAP2430_CONTROL_PADCONF_GPMC_A5_OFFSET 0x05a
119#define OMAP2430_CONTROL_PADCONF_GPMC_A4_OFFSET 0x05b
120#define OMAP2430_CONTROL_PADCONF_GPMC_A3_OFFSET 0x05c
121#define OMAP2430_CONTROL_PADCONF_GPMC_A2_OFFSET 0x05d
122#define OMAP2430_CONTROL_PADCONF_GPMC_A1_OFFSET 0x05e
123#define OMAP2430_CONTROL_PADCONF_GPMC_D15_OFFSET 0x05f
124#define OMAP2430_CONTROL_PADCONF_GPMC_D14_OFFSET 0x060
125#define OMAP2430_CONTROL_PADCONF_GPMC_D13_OFFSET 0x061
126#define OMAP2430_CONTROL_PADCONF_GPMC_D12_OFFSET 0x062
127#define OMAP2430_CONTROL_PADCONF_GPMC_D11_OFFSET 0x063
128#define OMAP2430_CONTROL_PADCONF_GPMC_D10_OFFSET 0x064
129#define OMAP2430_CONTROL_PADCONF_GPMC_D9_OFFSET 0x065
130#define OMAP2430_CONTROL_PADCONF_GPMC_D8_OFFSET 0x066
131#define OMAP2430_CONTROL_PADCONF_GPMC_D7_OFFSET 0x067
132#define OMAP2430_CONTROL_PADCONF_GPMC_D6_OFFSET 0x068
133#define OMAP2430_CONTROL_PADCONF_GPMC_D5_OFFSET 0x069
134#define OMAP2430_CONTROL_PADCONF_GPMC_D4_OFFSET 0x06a
135#define OMAP2430_CONTROL_PADCONF_GPMC_D3_OFFSET 0x06b
136#define OMAP2430_CONTROL_PADCONF_GPMC_D2_OFFSET 0x06c
137#define OMAP2430_CONTROL_PADCONF_GPMC_D1_OFFSET 0x06d
138#define OMAP2430_CONTROL_PADCONF_GPMC_D0_OFFSET 0x06e
139#define OMAP2430_CONTROL_PADCONF_DSS_DATA0_OFFSET 0x06f
140#define OMAP2430_CONTROL_PADCONF_DSS_DATA1_OFFSET 0x070
141#define OMAP2430_CONTROL_PADCONF_DSS_DATA2_OFFSET 0x071
142#define OMAP2430_CONTROL_PADCONF_DSS_DATA3_OFFSET 0x072
143#define OMAP2430_CONTROL_PADCONF_DSS_DATA4_OFFSET 0x073
144#define OMAP2430_CONTROL_PADCONF_DSS_DATA5_OFFSET 0x074
145#define OMAP2430_CONTROL_PADCONF_DSS_DATA6_OFFSET 0x075
146#define OMAP2430_CONTROL_PADCONF_DSS_DATA7_OFFSET 0x076
147#define OMAP2430_CONTROL_PADCONF_DSS_DATA8_OFFSET 0x077
148#define OMAP2430_CONTROL_PADCONF_DSS_DATA9_OFFSET 0x078
149#define OMAP2430_CONTROL_PADCONF_DSS_DATA10_OFFSET 0x079
150#define OMAP2430_CONTROL_PADCONF_DSS_DATA11_OFFSET 0x07a
151#define OMAP2430_CONTROL_PADCONF_DSS_DATA12_OFFSET 0x07b
152#define OMAP2430_CONTROL_PADCONF_DSS_DATA13_OFFSET 0x07c
153#define OMAP2430_CONTROL_PADCONF_DSS_DATA14_OFFSET 0x07d
154#define OMAP2430_CONTROL_PADCONF_DSS_DATA15_OFFSET 0x07e
155#define OMAP2430_CONTROL_PADCONF_DSS_DATA16_OFFSET 0x07f
156#define OMAP2430_CONTROL_PADCONF_DSS_DATA17_OFFSET 0x080
157#define OMAP2430_CONTROL_PADCONF_UART1_CTS_OFFSET 0x081
158#define OMAP2430_CONTROL_PADCONF_UART1_RTS_OFFSET 0x082
159#define OMAP2430_CONTROL_PADCONF_UART1_TX_OFFSET 0x083
160#define OMAP2430_CONTROL_PADCONF_UART1_RX_OFFSET 0x084
161#define OMAP2430_CONTROL_PADCONF_MCBSP2_DR_OFFSET 0x085
162#define OMAP2430_CONTROL_PADCONF_MCBSP2_CLKX_OFFSET 0x086
163#define OMAP2430_CONTROL_PADCONF_DSS_PCLK_OFFSET 0x087
164#define OMAP2430_CONTROL_PADCONF_DSS_VSYNC_OFFSET 0x088
165#define OMAP2430_CONTROL_PADCONF_DSS_HSYNC_OFFSET 0x089
166#define OMAP2430_CONTROL_PADCONF_DSS_ACBIAS_OFFSET 0x08a
167#define OMAP2430_CONTROL_PADCONF_SYS_NRESPWRON_OFFSET 0x08b
168#define OMAP2430_CONTROL_PADCONF_SYS_NRESWARM_OFFSET 0x08c
169#define OMAP2430_CONTROL_PADCONF_SYS_NIRQ0_OFFSET 0x08d
170#define OMAP2430_CONTROL_PADCONF_SYS_NIRQ1_OFFSET 0x08e
171#define OMAP2430_CONTROL_PADCONF_SYS_VMODE_OFFSET 0x08f
172#define OMAP2430_CONTROL_PADCONF_GPIO_128_OFFSET 0x090
173#define OMAP2430_CONTROL_PADCONF_GPIO_129_OFFSET 0x091
174#define OMAP2430_CONTROL_PADCONF_GPIO_130_OFFSET 0x092
175#define OMAP2430_CONTROL_PADCONF_GPIO_131_OFFSET 0x093
176#define OMAP2430_CONTROL_PADCONF_SYS_32K_OFFSET 0x094
177#define OMAP2430_CONTROL_PADCONF_SYS_XTALIN_OFFSET 0x095
178#define OMAP2430_CONTROL_PADCONF_SYS_XTALOUT_OFFSET 0x096
179#define OMAP2430_CONTROL_PADCONF_GPIO_132_OFFSET 0x097
180#define OMAP2430_CONTROL_PADCONF_SYS_CLKREQ_OFFSET 0x098
181#define OMAP2430_CONTROL_PADCONF_SYS_CLKOUT_OFFSET 0x099
182#define OMAP2430_CONTROL_PADCONF_GPIO_151_OFFSET 0x09a
183#define OMAP2430_CONTROL_PADCONF_GPIO_133_OFFSET 0x09b
184#define OMAP2430_CONTROL_PADCONF_JTAG_EMU1_OFFSET 0x09c
185#define OMAP2430_CONTROL_PADCONF_JTAG_EMU0_OFFSET 0x09d
186#define OMAP2430_CONTROL_PADCONF_JTAG_NTRST_OFFSET 0x09e
187#define OMAP2430_CONTROL_PADCONF_JTAG_TCK_OFFSET 0x09f
188#define OMAP2430_CONTROL_PADCONF_JTAG_RTCK_OFFSET 0x0a0
189#define OMAP2430_CONTROL_PADCONF_JTAG_TMS_OFFSET 0x0a1
190#define OMAP2430_CONTROL_PADCONF_JTAG_TDI_OFFSET 0x0a2
191#define OMAP2430_CONTROL_PADCONF_JTAG_TDO_OFFSET 0x0a3
192#define OMAP2430_CONTROL_PADCONF_CAM_D9_OFFSET 0x0a4
193#define OMAP2430_CONTROL_PADCONF_CAM_D8_OFFSET 0x0a5
194#define OMAP2430_CONTROL_PADCONF_CAM_D7_OFFSET 0x0a6
195#define OMAP2430_CONTROL_PADCONF_CAM_D6_OFFSET 0x0a7
196#define OMAP2430_CONTROL_PADCONF_CAM_D5_OFFSET 0x0a8
197#define OMAP2430_CONTROL_PADCONF_CAM_D4_OFFSET 0x0a9
198#define OMAP2430_CONTROL_PADCONF_CAM_D3_OFFSET 0x0aa
199#define OMAP2430_CONTROL_PADCONF_CAM_D2_OFFSET 0x0ab
200#define OMAP2430_CONTROL_PADCONF_CAM_D1_OFFSET 0x0ac
201#define OMAP2430_CONTROL_PADCONF_CAM_D0_OFFSET 0x0ad
202#define OMAP2430_CONTROL_PADCONF_CAM_HS_OFFSET 0x0ae
203#define OMAP2430_CONTROL_PADCONF_CAM_VS_OFFSET 0x0af
204#define OMAP2430_CONTROL_PADCONF_CAM_LCLK_OFFSET 0x0b0
205#define OMAP2430_CONTROL_PADCONF_CAM_XCLK_OFFSET 0x0b1
206#define OMAP2430_CONTROL_PADCONF_CAM_D11_OFFSET 0x0b2
207#define OMAP2430_CONTROL_PADCONF_CAM_D10_OFFSET 0x0b3
208#define OMAP2430_CONTROL_PADCONF_GPIO_134_OFFSET 0x0b4
209#define OMAP2430_CONTROL_PADCONF_GPIO_135_OFFSET 0x0b5
210#define OMAP2430_CONTROL_PADCONF_GPIO_136_OFFSET 0x0b6
211#define OMAP2430_CONTROL_PADCONF_GPIO_137_OFFSET 0x0b7
212#define OMAP2430_CONTROL_PADCONF_GPIO_138_OFFSET 0x0b8
213#define OMAP2430_CONTROL_PADCONF_GPIO_139_OFFSET 0x0b9
214#define OMAP2430_CONTROL_PADCONF_GPIO_140_OFFSET 0x0ba
215#define OMAP2430_CONTROL_PADCONF_GPIO_141_OFFSET 0x0bb
216#define OMAP2430_CONTROL_PADCONF_GPIO_142_OFFSET 0x0bc
217#define OMAP2430_CONTROL_PADCONF_GPIO_154_OFFSET 0x0bd
218#define OMAP2430_CONTROL_PADCONF_GPIO_148_OFFSET 0x0be
219#define OMAP2430_CONTROL_PADCONF_GPIO_149_OFFSET 0x0bf
220#define OMAP2430_CONTROL_PADCONF_GPIO_150_OFFSET 0x0c0
221#define OMAP2430_CONTROL_PADCONF_GPIO_152_OFFSET 0x0c1
222#define OMAP2430_CONTROL_PADCONF_GPIO_153_OFFSET 0x0c2
223#define OMAP2430_CONTROL_PADCONF_SDMMC1_CLKO_OFFSET 0x0c3
224#define OMAP2430_CONTROL_PADCONF_SDMMC1_CMD_OFFSET 0x0c4
225#define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT0_OFFSET 0x0c5
226#define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT1_OFFSET 0x0c6
227#define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT2_OFFSET 0x0c7
228#define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT3_OFFSET 0x0c8
229#define OMAP2430_CONTROL_PADCONF_SDMMC2_CLKO_OFFSET 0x0c9
230#define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT3_OFFSET 0x0ca
231#define OMAP2430_CONTROL_PADCONF_SDMMC2_CMD_OFFSET 0x0cb
232#define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT0_OFFSET 0x0cc
233#define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT2_OFFSET 0x0cd
234#define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT1_OFFSET 0x0ce
235#define OMAP2430_CONTROL_PADCONF_UART2_CTS_OFFSET 0x0cf
236#define OMAP2430_CONTROL_PADCONF_UART2_RTS_OFFSET 0x0d0
237#define OMAP2430_CONTROL_PADCONF_UART2_TX_OFFSET 0x0d1
238#define OMAP2430_CONTROL_PADCONF_UART2_RX_OFFSET 0x0d2
239#define OMAP2430_CONTROL_PADCONF_MCBSP3_CLKX_OFFSET 0x0d3
240#define OMAP2430_CONTROL_PADCONF_MCBSP3_FSX_OFFSET 0x0d4
241#define OMAP2430_CONTROL_PADCONF_MCBSP3_DR_OFFSET 0x0d5
242#define OMAP2430_CONTROL_PADCONF_MCBSP3_DX_OFFSET 0x0d6
243#define OMAP2430_CONTROL_PADCONF_SSI1_DAT_TX_OFFSET 0x0d7
244#define OMAP2430_CONTROL_PADCONF_SSI1_FLAG_TX_OFFSET 0x0d8
245#define OMAP2430_CONTROL_PADCONF_SSI1_RDY_TX_OFFSET 0x0d9
246#define OMAP2430_CONTROL_PADCONF_SSI1_DAT_RX_OFFSET 0x0da
247#define OMAP2430_CONTROL_PADCONF_GPIO_63_OFFSET 0x0db
248#define OMAP2430_CONTROL_PADCONF_SSI1_FLAG_RX_OFFSET 0x0dc
249#define OMAP2430_CONTROL_PADCONF_SSI1_RDY_RX_OFFSET 0x0dd
250#define OMAP2430_CONTROL_PADCONF_SSI1_WAKE_OFFSET 0x0de
251#define OMAP2430_CONTROL_PADCONF_SPI1_CLK_OFFSET 0x0df
252#define OMAP2430_CONTROL_PADCONF_SPI1_SIMO_OFFSET 0x0e0
253#define OMAP2430_CONTROL_PADCONF_SPI1_SOMI_OFFSET 0x0e1
254#define OMAP2430_CONTROL_PADCONF_SPI1_CS0_OFFSET 0x0e2
255#define OMAP2430_CONTROL_PADCONF_SPI1_CS1_OFFSET 0x0e3
256#define OMAP2430_CONTROL_PADCONF_SPI1_CS2_OFFSET 0x0e4
257#define OMAP2430_CONTROL_PADCONF_SPI1_CS3_OFFSET 0x0e5
258#define OMAP2430_CONTROL_PADCONF_SPI2_CLK_OFFSET 0x0e6
259#define OMAP2430_CONTROL_PADCONF_SPI2_SIMO_OFFSET 0x0e7
260#define OMAP2430_CONTROL_PADCONF_SPI2_SOMI_OFFSET 0x0e8
261#define OMAP2430_CONTROL_PADCONF_SPI2_CS0_OFFSET 0x0e9
262#define OMAP2430_CONTROL_PADCONF_MCBSP1_CLKR_OFFSET 0x0ea
263#define OMAP2430_CONTROL_PADCONF_MCBSP1_FSR_OFFSET 0x0eb
264#define OMAP2430_CONTROL_PADCONF_MCBSP1_DX_OFFSET 0x0ec
265#define OMAP2430_CONTROL_PADCONF_MCBSP1_DR_OFFSET 0x0ed
266#define OMAP2430_CONTROL_PADCONF_MCBSP_CLKS_OFFSET 0x0ee
267#define OMAP2430_CONTROL_PADCONF_MCBSP1_FSX_OFFSET 0x0ef
268#define OMAP2430_CONTROL_PADCONF_MCBSP1_CLKX_OFFSET 0x0f0
269#define OMAP2430_CONTROL_PADCONF_I2C1_SCL_OFFSET 0x0f1
270#define OMAP2430_CONTROL_PADCONF_I2C1_SDA_OFFSET 0x0f2
271#define OMAP2430_CONTROL_PADCONF_I2C2_SCL_OFFSET 0x0f3
272#define OMAP2430_CONTROL_PADCONF_I2C2_SDA_OFFSET 0x0f4
273#define OMAP2430_CONTROL_PADCONF_HDQ_SIO_OFFSET 0x0f5
274#define OMAP2430_CONTROL_PADCONF_UART3_CTS_RCTX_OFFSET 0x0f6
275#define OMAP2430_CONTROL_PADCONF_UART3_RTS_SD_OFFSET 0x0f7
276#define OMAP2430_CONTROL_PADCONF_UART3_TX_IRTX_OFFSET 0x0f8
277#define OMAP2430_CONTROL_PADCONF_UART3_RX_IRRX_OFFSET 0x0f9
278#define OMAP2430_CONTROL_PADCONF_GPIO_7_OFFSET 0x0fa
279#define OMAP2430_CONTROL_PADCONF_GPIO_78_OFFSET 0x0fb
280#define OMAP2430_CONTROL_PADCONF_GPIO_79_OFFSET 0x0fc
281#define OMAP2430_CONTROL_PADCONF_GPIO_80_OFFSET 0x0fd
282#define OMAP2430_CONTROL_PADCONF_GPIO_113_OFFSET 0x0fe
283#define OMAP2430_CONTROL_PADCONF_GPIO_114_OFFSET 0x0ff
284#define OMAP2430_CONTROL_PADCONF_GPIO_115_OFFSET 0x100
285#define OMAP2430_CONTROL_PADCONF_GPIO_116_OFFSET 0x101
286#define OMAP2430_CONTROL_PADCONF_SYS_DRM_MSECURE_OFFSET 0x102
287#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA3_OFFSET 0x103
288#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA4_OFFSET 0x104
289#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA5_OFFSET 0x105
290#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA6_OFFSET 0x106
291#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA2_OFFSET 0x107
292#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA0_OFFSET 0x108
293#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA1_OFFSET 0x109
294#define OMAP2430_CONTROL_PADCONF_USB0HS_CLK_OFFSET 0x10a
295#define OMAP2430_CONTROL_PADCONF_USB0HS_DIR_OFFSET 0x10b
296#define OMAP2430_CONTROL_PADCONF_USB0HS_STP_OFFSET 0x10c
297#define OMAP2430_CONTROL_PADCONF_USB0HS_NXT_OFFSET 0x10d
298#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA7_OFFSET 0x10e
299#define OMAP2430_CONTROL_PADCONF_TV_OUT_OFFSET 0x10f
300#define OMAP2430_CONTROL_PADCONF_TV_VREF_OFFSET 0x110
301#define OMAP2430_CONTROL_PADCONF_TV_RSET_OFFSET 0x111
302#define OMAP2430_CONTROL_PADCONF_TV_VFB_OFFSET 0x112
303#define OMAP2430_CONTROL_PADCONF_TV_DACOUT_OFFSET 0x113
304#define OMAP2430_CONTROL_PADCONF_AD2DMCAD0_OFFSET 0x114
305#define OMAP2430_CONTROL_PADCONF_AD2DMCAD1_OFFSET 0x115
306#define OMAP2430_CONTROL_PADCONF_AD2DMCAD2_OFFSET 0x116
307#define OMAP2430_CONTROL_PADCONF_AD2DMCAD3_OFFSET 0x117
308#define OMAP2430_CONTROL_PADCONF_AD2DMCAD4_OFFSET 0x118
309#define OMAP2430_CONTROL_PADCONF_AD2DMCAD5_OFFSET 0x119
310#define OMAP2430_CONTROL_PADCONF_AD2DMCAD6_OFFSET 0x11a
311#define OMAP2430_CONTROL_PADCONF_AD2DMCAD7_OFFSET 0x11b
312#define OMAP2430_CONTROL_PADCONF_AD2DMCAD8_OFFSET 0x11c
313#define OMAP2430_CONTROL_PADCONF_AD2DMCAD9_OFFSET 0x11d
314#define OMAP2430_CONTROL_PADCONF_AD2DMCAD10_OFFSET 0x11e
315#define OMAP2430_CONTROL_PADCONF_AD2DMCAD11_OFFSET 0x11f
316#define OMAP2430_CONTROL_PADCONF_AD2DMCAD12_OFFSET 0x120
317#define OMAP2430_CONTROL_PADCONF_AD2DMCAD13_OFFSET 0x121
318#define OMAP2430_CONTROL_PADCONF_AD2DMCAD14_OFFSET 0x122
319#define OMAP2430_CONTROL_PADCONF_AD2DMCAD15_OFFSET 0x123
320#define OMAP2430_CONTROL_PADCONF_AD2DMCAD16_OFFSET 0x124
321#define OMAP2430_CONTROL_PADCONF_AD2DMCAD17_OFFSET 0x125
322#define OMAP2430_CONTROL_PADCONF_AD2DMCAD18_OFFSET 0x126
323#define OMAP2430_CONTROL_PADCONF_AD2DMCAD19_OFFSET 0x127
324#define OMAP2430_CONTROL_PADCONF_AD2DMCAD20_OFFSET 0x128
325#define OMAP2430_CONTROL_PADCONF_AD2DMCAD21_OFFSET 0x129
326#define OMAP2430_CONTROL_PADCONF_AD2DMCAD22_OFFSET 0x12a
327#define OMAP2430_CONTROL_PADCONF_AD2DMCAD23_OFFSET 0x12b
328#define OMAP2430_CONTROL_PADCONF_AD2DMCAD24_OFFSET 0x12c
329#define OMAP2430_CONTROL_PADCONF_AD2DMCAD25_OFFSET 0x12d
330#define OMAP2430_CONTROL_PADCONF_AD2DMCAD26_OFFSET 0x12e
331#define OMAP2430_CONTROL_PADCONF_AD2DMCAD27_OFFSET 0x12f
332#define OMAP2430_CONTROL_PADCONF_AD2DMCAD28_OFFSET 0x130
333#define OMAP2430_CONTROL_PADCONF_AD2DMCAD29_OFFSET 0x131
334#define OMAP2430_CONTROL_PADCONF_AD2DMCAD30_OFFSET 0x132
335#define OMAP2430_CONTROL_PADCONF_AD2DMCAD31_OFFSET 0x133
336#define OMAP2430_CONTROL_PADCONF_AD2DMCAD32_OFFSET 0x134
337#define OMAP2430_CONTROL_PADCONF_AD2DMCAD33_OFFSET 0x135
338#define OMAP2430_CONTROL_PADCONF_AD2DMCAD34_OFFSET 0x136
339#define OMAP2430_CONTROL_PADCONF_AD2DMCAD35_OFFSET 0x137
340#define OMAP2430_CONTROL_PADCONF_AD2DMCAD36_OFFSET 0x138
341#define OMAP2430_CONTROL_PADCONF_AD2DMCAD37_OFFSET 0x139
342#define OMAP2430_CONTROL_PADCONF_AD2DMWRITE_OFFSET 0x13a
343#define OMAP2430_CONTROL_PADCONF_D2DCLK26MI_OFFSET 0x13b
344#define OMAP2430_CONTROL_PADCONF_D2DNRESPWRON1_OFFSET 0x13c
345#define OMAP2430_CONTROL_PADCONF_D2DNRESWARM_OFFSET 0x13d
346#define OMAP2430_CONTROL_PADCONF_D2DARM9NIRQ_OFFSET 0x13e
347#define OMAP2430_CONTROL_PADCONF_D2DUMA2P6FIQ_OFFSET 0x13f
348#define OMAP2430_CONTROL_PADCONF_D2DSPINT_OFFSET 0x140
349#define OMAP2430_CONTROL_PADCONF_D2DFRINT_OFFSET 0x141
350#define OMAP2430_CONTROL_PADCONF_D2DDMAREQ0_OFFSET 0x142
351#define OMAP2430_CONTROL_PADCONF_D2DDMAREQ1_OFFSET 0x143
352#define OMAP2430_CONTROL_PADCONF_D2DDMAREQ2_OFFSET 0x144
353#define OMAP2430_CONTROL_PADCONF_D2DDMAREQ3_OFFSET 0x145
354#define OMAP2430_CONTROL_PADCONF_D2DN3GTRST_OFFSET 0x146
355#define OMAP2430_CONTROL_PADCONF_D2DN3GTDI_OFFSET 0x147
356#define OMAP2430_CONTROL_PADCONF_D2DN3GTDO_OFFSET 0x148
357#define OMAP2430_CONTROL_PADCONF_D2DN3GTMS_OFFSET 0x149
358#define OMAP2430_CONTROL_PADCONF_D2DN3GTCK_OFFSET 0x14a
359#define OMAP2430_CONTROL_PADCONF_D2DN3GRTCK_OFFSET 0x14b
360#define OMAP2430_CONTROL_PADCONF_D2DMSTDBY_OFFSET 0x14c
361#define OMAP2430_CONTROL_PADCONF_AD2DSREAD_OFFSET 0x14d
362#define OMAP2430_CONTROL_PADCONF_D2DSWAKEUP_OFFSET 0x14e
363#define OMAP2430_CONTROL_PADCONF_D2DIDLEREQ_OFFSET 0x14f
364#define OMAP2430_CONTROL_PADCONF_D2DIDLEACK_OFFSET 0x150
365#define OMAP2430_CONTROL_PADCONF_D2DSPARE0_OFFSET 0x151
366#define OMAP2430_CONTROL_PADCONF_AD2DSWRITE_OFFSET 0x152
367#define OMAP2430_CONTROL_PADCONF_AD2DMREAD_OFFSET 0x153
368
369#define OMAP2430_CONTROL_PADCONF_MUX_SIZE \
370 (OMAP2430_CONTROL_PADCONF_AD2DMREAD_OFFSET + 0x1)
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-16 06:28:12 -0500