Merge branch 'omap-boards' into omap-for-linus

9 files changed, 449 insertions, 17 deletions

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 2455dcc744a0..99abac2a8c53 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -10,6 +10,7 @@ config ARCH_OMAP2420
 config ARCH_OMAP2430
         bool "OMAP2430 support"
         depends on ARCH_OMAP2
+        select ARCH_OMAP_OTG
 
 config ARCH_OMAP3430
         bool "OMAP3430 support"
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 01d113ff9fcf..a11a575745e4 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -174,9 +174,18 @@ static struct i2c_board_info __initdata sdp2430_i2c_boardinfo[] = {
         },
 };
 
+static struct i2c_board_info __initdata sdp2430_i2c1_boardinfo[] = {
+        {
+                I2C_BOARD_INFO("isp1301_omap", 0x2D),
+                .flags = I2C_CLIENT_WAKE,
+                .irq = OMAP_GPIO_IRQ(78),
+        },
+};
+
 static int __init omap2430_i2c_init(void)
 {
-        omap_register_i2c_bus(1, 400, NULL, 0);
+        omap_register_i2c_bus(1, 100, sdp2430_i2c1_boardinfo,
+                        ARRAY_SIZE(sdp2430_i2c1_boardinfo));
         omap_register_i2c_bus(2, 2600, sdp2430_i2c_boardinfo,
                         ARRAY_SIZE(sdp2430_i2c_boardinfo));
         return 0;
@@ -198,6 +207,15 @@ static struct omap_musb_board_data musb_board_data = {
         .mode                   = MUSB_OTG,
         .power                  = 100,
 };
+static struct omap_usb_config sdp2430_usb_config __initdata = {
+        .otg            = 1,
+#ifdef  CONFIG_USB_GADGET_OMAP
+        .hmc_mode       = 0x0,
+#elif   defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+        .hmc_mode       = 0x1,
+#endif
+        .pins[0]        = 3,
+};
 
 static void __init omap_2430sdp_init(void)
 {
@@ -208,6 +226,7 @@ static void __init omap_2430sdp_init(void)
         platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
         omap_serial_init();
         omap2_hsmmc_init(mmc);
+        omap_usb_init(&sdp2430_usb_config);
         usb_musb_init(&musb_board_data);
         board_smc91x_init();
 
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index c1c4389fbd8f..19b9e415710d 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -21,6 +21,8 @@
 #include <linux/platform_device.h>
 #include <linux/gpio.h>
 #include <linux/i2c/pca953x.h>
+#include <linux/can/platform/ti_hecc.h>
+#include <linux/davinci_emac.h>
 
 #include <mach/hardware.h>
 #include <mach/am35xx.h>
@@ -30,11 +32,106 @@
 
 #include <plat/board.h>
 #include <plat/common.h>
+#include <plat/control.h>
 #include <plat/usb.h>
 #include <plat/display.h>
 
 #include "mux.h"
 
+#define AM35XX_EVM_PHY_MASK             (0xF)
+#define AM35XX_EVM_MDIO_FREQUENCY       (1000000)
+
+static struct emac_platform_data am3517_evm_emac_pdata = {
+        .phy_mask       = AM35XX_EVM_PHY_MASK,
+        .mdio_max_freq  = AM35XX_EVM_MDIO_FREQUENCY,
+        .rmii_en        = 1,
+};
+
+static struct resource am3517_emac_resources[] = {
+        {
+                .start  = AM35XX_IPSS_EMAC_BASE,
+                .end    = AM35XX_IPSS_EMAC_BASE + 0x3FFFF,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = INT_35XX_EMAC_C0_RXTHRESH_IRQ,
+                .end    = INT_35XX_EMAC_C0_RXTHRESH_IRQ,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = INT_35XX_EMAC_C0_RX_PULSE_IRQ,
+                .end    = INT_35XX_EMAC_C0_RX_PULSE_IRQ,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = INT_35XX_EMAC_C0_TX_PULSE_IRQ,
+                .end    = INT_35XX_EMAC_C0_TX_PULSE_IRQ,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = INT_35XX_EMAC_C0_MISC_PULSE_IRQ,
+                .end    = INT_35XX_EMAC_C0_MISC_PULSE_IRQ,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device am3517_emac_device = {
+        .name           = "davinci_emac",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(am3517_emac_resources),
+        .resource       = am3517_emac_resources,
+};
+
+static void am3517_enable_ethernet_int(void)
+{
+        u32 regval;
+
+        regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
+        regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |
+                AM35XX_CPGMAC_C0_TX_PULSE_CLR |
+                AM35XX_CPGMAC_C0_MISC_PULSE_CLR |
+                AM35XX_CPGMAC_C0_RX_THRESH_CLR);
+        omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
+        regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
+}
+
+static void am3517_disable_ethernet_int(void)
+{
+        u32 regval;
+
+        regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
+        regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |
+                AM35XX_CPGMAC_C0_TX_PULSE_CLR);
+        omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
+        regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
+}
+
+void am3517_evm_ethernet_init(struct emac_platform_data *pdata)
+{
+        unsigned int regval;
+
+        pdata->ctrl_reg_offset          = AM35XX_EMAC_CNTRL_OFFSET;
+        pdata->ctrl_mod_reg_offset      = AM35XX_EMAC_CNTRL_MOD_OFFSET;
+        pdata->ctrl_ram_offset          = AM35XX_EMAC_CNTRL_RAM_OFFSET;
+        pdata->mdio_reg_offset          = AM35XX_EMAC_MDIO_OFFSET;
+        pdata->ctrl_ram_size            = AM35XX_EMAC_CNTRL_RAM_SIZE;
+        pdata->version                  = EMAC_VERSION_2;
+        pdata->hw_ram_addr              = AM35XX_EMAC_HW_RAM_ADDR;
+        pdata->interrupt_enable         = am3517_enable_ethernet_int;
+        pdata->interrupt_disable        = am3517_disable_ethernet_int;
+        am3517_emac_device.dev.platform_data    = pdata;
+        platform_device_register(&am3517_emac_device);
+
+        regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
+        regval = regval & (~(AM35XX_CPGMACSS_SW_RST));
+        omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
+        regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
+
+        return ;
+}
+
+
+
 #define LCD_PANEL_PWR           176
 #define LCD_PANEL_BKLIGHT_PWR   182
 #define LCD_PANEL_PWM           181
@@ -119,6 +216,8 @@ static int __init am3517_evm_i2c_init(void)
 static int lcd_enabled;
 static int dvi_enabled;
 
+#if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \
+                defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE)
 static void __init am3517_evm_display_init(void)
 {
         int r;
@@ -162,6 +261,9 @@ err_2:
 err_1:
         gpio_free(LCD_PANEL_BKLIGHT_PWR);
 }
+#else
+static void __init am3517_evm_display_init(void) {}
+#endif
 
 static int am3517_evm_panel_enable_lcd(struct omap_dss_device *dssdev)
 {
@@ -275,7 +377,12 @@ static void __init am3517_evm_init_irq(void)
 
 static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
         .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
+#if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \
+                defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE)
+        .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+#else
         .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
+#endif
         .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
 
         .phy_reset  = true,
@@ -292,6 +399,42 @@ static struct omap_board_mux board_mux[] __initdata = {
 #define board_mux       NULL
 #endif
 
+
+static struct resource am3517_hecc_resources[] = {
+        {
+                .start  = AM35XX_IPSS_HECC_BASE,
+                .end    = AM35XX_IPSS_HECC_BASE + 0x3FFF,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = INT_35XX_HECC0_IRQ,
+                .end    = INT_35XX_HECC0_IRQ,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device am3517_hecc_device = {
+        .name           = "ti_hecc",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(am3517_hecc_resources),
+        .resource       = am3517_hecc_resources,
+};
+
+static struct ti_hecc_platform_data am3517_evm_hecc_pdata = {
+        .scc_hecc_offset        = AM35XX_HECC_SCC_HECC_OFFSET,
+        .scc_ram_offset         = AM35XX_HECC_SCC_RAM_OFFSET,
+        .hecc_ram_offset        = AM35XX_HECC_RAM_OFFSET,
+        .mbx_offset             = AM35XX_HECC_MBOX_OFFSET,
+        .int_line               = AM35XX_HECC_INT_LINE,
+        .version                = AM35XX_HECC_VERSION,
+};
+
+static void am3517_evm_hecc_init(struct ti_hecc_platform_data *pdata)
+{
+        am3517_hecc_device.dev.platform_data = pdata;
+        platform_device_register(&am3517_hecc_device);
+}
+
 static void __init am3517_evm_init(void)
 {
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
@@ -305,6 +448,7 @@ static void __init am3517_evm_init(void)
         /* Configure GPIO for EHCI port */
         omap_mux_init_gpio(57, OMAP_PIN_OUTPUT);
         usb_ehci_init(&ehci_pdata);
+        am3517_evm_hecc_init(&am3517_evm_hecc_pdata);
         /* DSS */
         am3517_evm_display_init();
 
@@ -313,6 +457,8 @@ static void __init am3517_evm_init(void)
 
         i2c_register_board_info(1, am3517evm_i2c_boardinfo,
                                 ARRAY_SIZE(am3517evm_i2c_boardinfo));
+        /*Ethernet*/
+        am3517_evm_ethernet_init(&am3517_evm_emac_pdata);
 }
 
 static void __init am3517_evm_map_io(void)
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 47e3af2166d4..77022b588816 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -633,8 +633,163 @@ static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
         .reset_gpio_port[2]  = -EINVAL
 };
 
+static struct omap_board_mux board_mux[] __initdata = {
+        /* nCS and IRQ for Devkit8000 ethernet */
+        OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0),
+        OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
+
+        /* McSPI 2*/
+        OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+
+        /* PENDOWN GPIO */
+        OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
+
+        /* mUSB */
+        OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+
+        /* USB 1 */
+        OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
+        OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
+        OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
+        OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
+        OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
+        OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
+        OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
+        OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
+        OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
+        OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
+        OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
+
+        /* MMC 1 */
+        OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+
+        /* McBSP 2 */
+        OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+
+        /* I2C 1 */
+        OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+
+        /* I2C 2 */
+        OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+
+        /* I2C 3 */
+        OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+
+        /* I2C 4 */
+        OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+
+        /* serial ports */
+        OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
+        OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+
+        /* DSS */
+        OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+
+        /* expansion port */
+        /* McSPI 1 */
+        OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
+        OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
+
+        /* HDQ */
+        OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+
+        /* McSPI4 */
+        OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
+        OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
+        OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
+        OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
+
+        /* MMC 2 */
+        OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
+
+        /* I2C3 */
+        OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+        OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+
+        OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
+
+        OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
+        OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
+
+        /* TPS IRQ */
+        OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
+                        OMAP_PIN_INPUT_PULLUP),
+
+        { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+
 static void __init devkit8000_init(void)
 {
+        omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
         omap_serial_init();
 
         omap_dm9000_init();
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 8848c7c5ce48..79ac41400c21 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -63,6 +63,8 @@
 
 #define OVERO_SMSC911X_CS      5
 #define OVERO_SMSC911X_GPIO    176
+#define OVERO_SMSC911X2_CS     4
+#define OVERO_SMSC911X2_GPIO   65
 
 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
         defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
@@ -137,6 +139,16 @@ static struct resource overo_smsc911x_resources[] = {
         },
 };
 
+static struct resource overo_smsc911x2_resources[] = {
+        {
+                .name   = "smsc911x2-memory",
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
+        },
+};
+
 static struct smsc911x_platform_config overo_smsc911x_config = {
         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
         .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
@@ -146,7 +158,7 @@ static struct smsc911x_platform_config overo_smsc911x_config = {
 
 static struct platform_device overo_smsc911x_device = {
         .name           = "smsc911x",
-        .id             = -1,
+        .id             = 0,
         .num_resources  = ARRAY_SIZE(overo_smsc911x_resources),
         .resource       = overo_smsc911x_resources,
         .dev            = {
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 4377a4cf36eb..8179d55106d5 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -277,7 +277,7 @@ static struct regulator_consumer_supply rx51_vmmc1_supply = {
         .dev_name = "mmci-omap-hs.0",
 };
 
-static struct regulator_consumer_supply rx51_vmmc2_supply = {
+static struct regulator_consumer_supply rx51_vaux3_supply = {
         .supply   = "vmmc",
         .dev_name = "mmci-omap-hs.1",
 };
@@ -287,6 +287,35 @@ static struct regulator_consumer_supply rx51_vsim_supply = {
         .dev_name = "mmci-omap-hs.1",
 };
 
+static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
+        /* tlv320aic3x analog supplies */
+        {
+                .supply         = "AVDD",
+                .dev_name       = "2-0018",
+        },
+        {
+                .supply         = "DRVDD",
+                .dev_name       = "2-0018",
+        },
+        /* Keep vmmc as last item. It is not iterated for newer boards */
+        {
+                .supply         = "vmmc",
+                .dev_name       = "mmci-omap-hs.1",
+        },
+};
+
+static struct regulator_consumer_supply rx51_vio_supplies[] = {
+        /* tlv320aic3x digital supplies */
+        {
+                .supply         = "IOVDD",
+                .dev_name       = "2-0018"
+        },
+        {
+                .supply         = "DVDD",
+                .dev_name       = "2-0018"
+        },
+};
+
 static struct regulator_init_data rx51_vaux1 = {
         .constraints = {
                 .name                   = "V28",
@@ -338,7 +367,7 @@ static struct regulator_init_data rx51_vaux3_mmc = {
                                         | REGULATOR_CHANGE_STATUS,
         },
         .num_consumer_supplies  = 1,
-        .consumer_supplies      = &rx51_vmmc2_supply,
+        .consumer_supplies      = &rx51_vaux3_supply,
 };
 
 static struct regulator_init_data rx51_vaux4 = {
@@ -370,9 +399,9 @@ static struct regulator_init_data rx51_vmmc1 = {
 
 static struct regulator_init_data rx51_vmmc2 = {
         .constraints = {
-                .name                   = "VMMC2_30",
-                .min_uV                 = 1850000,
-                .max_uV                 = 3150000,
+                .name                   = "V28_A",
+                .min_uV                 = 2800000,
+                .max_uV                 = 3000000,
                 .apply_uV               = true,
                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
                                         | REGULATOR_MODE_STANDBY,
@@ -380,8 +409,8 @@ static struct regulator_init_data rx51_vmmc2 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &rx51_vmmc2_supply,
+        .num_consumer_supplies  = ARRAY_SIZE(rx51_vmmc2_supplies),
+        .consumer_supplies      = rx51_vmmc2_supplies,
 };
 
 static struct regulator_init_data rx51_vsim = {
@@ -411,6 +440,20 @@ static struct regulator_init_data rx51_vdac = {
         },
 };
 
+static struct regulator_init_data rx51_vio = {
+        .constraints = {
+                .min_uV                 = 1800000,
+                .max_uV                 = 1800000,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
+                                        | REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = ARRAY_SIZE(rx51_vio_supplies),
+        .consumer_supplies      = rx51_vio_supplies,
+};
+
 static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
 {
         /* FIXME this gpio setup is just a placeholder for now */
@@ -618,6 +661,7 @@ static struct twl4030_platform_data rx51_twldata __initdata = {
         .vmmc1                  = &rx51_vmmc1,
         .vsim                   = &rx51_vsim,
         .vdac                   = &rx51_vdac,
+        .vio                    = &rx51_vio,
 };
 
 static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = {
@@ -629,18 +673,27 @@ static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = {
         },
 };
 
+static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
+        {
+                I2C_BOARD_INFO("tlv320aic3x", 0x18),
+        },
+};
+
 static int __init rx51_i2c_init(void)
 {
         if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
-            system_rev >= SYSTEM_REV_B_USES_VAUX3)
+            system_rev >= SYSTEM_REV_B_USES_VAUX3) {
                 rx51_twldata.vaux3 = &rx51_vaux3_mmc;
-        else {
+                /* Only older boards use VMMC2 for internal MMC */
+                rx51_vmmc2.num_consumer_supplies--;
+        } else {
                 rx51_twldata.vaux3 = &rx51_vaux3_cam;
-                rx51_twldata.vmmc2 = &rx51_vmmc2;
         }
+        rx51_twldata.vmmc2 = &rx51_vmmc2;
         omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1,
-                        ARRAY_SIZE(rx51_peripherals_i2c_board_info_1));
-        omap_register_i2c_bus(2, 100, NULL, 0);
+                              ARRAY_SIZE(rx51_peripherals_i2c_board_info_1));
+        omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
+                              ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
         omap_register_i2c_bus(3, 400, NULL, 0);
         return 0;
 }
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 9cba5560519b..6905eb7aa67c 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3472,8 +3472,8 @@ static struct omap_clk omap3xxx_clks[] = {
         CLK(NULL,       "ipss_ick",     &ipss_ick,      CK_AM35XX),
         CLK(NULL,       "rmii_ck",      &rmii_ck,       CK_AM35XX),
         CLK(NULL,       "pclk_ck",      &pclk_ck,       CK_AM35XX),
-        CLK("davinci_emac",     "ick",          &emac_ick,      CK_AM35XX),
-        CLK("davinci_emac",     "fck",          &emac_fck,      CK_AM35XX),
+        CLK("davinci_emac",     "emac_clk",     &emac_ick,      CK_AM35XX),
+        CLK("davinci_emac",     "phy_clk",      &emac_fck,      CK_AM35XX),
         CLK("vpfe-capture",     "master",       &vpfe_ick,      CK_AM35XX),
         CLK("vpfe-capture",     "slave",        &vpfe_fck,      CK_AM35XX),
         CLK("musb_hdrc",        "ick",          &hsotgusb_ick_am35xx,   CK_AM35XX),
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 2271b9bd1f50..10f3a3c58cc0 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -786,6 +786,33 @@ static inline void omap_hdq_init(void)
 static inline void omap_hdq_init(void) {}
 #endif
 
+/*---------------------------------------------------------------------------*/
+
+#if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
+        defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
+#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
+static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
+};
+#else
+static struct resource omap_vout_resource[2] = {
+};
+#endif
+
+static struct platform_device omap_vout_device = {
+        .name           = "omap_vout",
+        .num_resources  = ARRAY_SIZE(omap_vout_resource),
+        .resource       = &omap_vout_resource[0],
+        .id             = -1,
+};
+static void omap_init_vout(void)
+{
+        if (platform_device_register(&omap_vout_device) < 0)
+                printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
+}
+#else
+static inline void omap_init_vout(void) {}
+#endif
+
 /*-------------------------------------------------------------------------*/
 
 static int __init omap2_init_devices(void)
@@ -800,6 +827,7 @@ static int __init omap2_init_devices(void)
         omap_hdq_init();
         omap_init_sti();
         omap_init_sha1_md5();
+        omap_init_vout();
 
         return 0;
 }
diff --git a/arch/arm/mach-omap2/include/mach/am35xx.h b/arch/arm/mach-omap2/include/mach/am35xx.h
index a705f946fc46..f1e13d1ca5e7 100644
--- a/arch/arm/mach-omap2/include/mach/am35xx.h
+++ b/arch/arm/mach-omap2/include/mach/am35xx.h
@@ -23,4 +23,22 @@
 #define AM35XX_IPSS_HECC_BASE           0x5C050000
 #define AM35XX_IPSS_VPFE_BASE           0x5C060000
 
-#endif /*  __ASM_ARCH_AM35XX_H */
+
+/* HECC module specifc offset definitions */
+#define AM35XX_HECC_SCC_HECC_OFFSET     (0x0)
+#define AM35XX_HECC_SCC_RAM_OFFSET      (0x3000)
+#define AM35XX_HECC_RAM_OFFSET          (0x3000)
+#define AM35XX_HECC_MBOX_OFFSET         (0x2000)
+#define AM35XX_HECC_INT_LINE            (0x0)
+#define AM35XX_HECC_VERSION             (0x1)
+
+#define AM35XX_EMAC_CNTRL_OFFSET        (0x10000)
+#define AM35XX_EMAC_CNTRL_MOD_OFFSET    (0x0)
+#define AM35XX_EMAC_CNTRL_RAM_OFFSET    (0x20000)
+#define AM35XX_EMAC_MDIO_OFFSET         (0x30000)
+#define AM35XX_EMAC_CNTRL_RAM_SIZE      (0x2000)
+#define AM35XX_EMAC_RAM_ADDR            (AM3517_EMAC_BASE + \
+                                                AM3517_EMAC_CNTRL_RAM_OFFSET)
+#define AM35XX_EMAC_HW_RAM_ADDR         (0x01E20000)
+
+#endif  /*  __ASM_ARCH_AM35XX_H */