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authorKevin Hilman <khilman@ti.com>2011-07-20 19:35:46 -0400
committerKevin Hilman <khilman@ti.com>2011-09-15 15:09:22 -0400
commit5876c940c0dee298e38fbf47ce67c9e220b0572c (patch)
treef4f9773abbc985e427b6c9892402064a473e9ba6 /arch/arm/mach-omap2/vc3xxx_data.c
parent6a62b78d9aa6661cae1a7d30b574daf435a14c47 (diff)
OMAP2+: VC: more registers are per-channel starting with OMAP5
Starting with OMAP5, the following registers are per-channel and not common to a all VC channels: - SMPS I2C slave address - SMPS voltage register address offset - SMPS cmd/value register address offset - VC channel configuration register Move these from the channel-common struct into the per-channel struct to support OMAP5. Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/vc3xxx_data.c')
-rw-r--r--arch/arm/mach-omap2/vc3xxx_data.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c
index 95d7701300cb..cfe348e1af0e 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -30,9 +30,6 @@
30 * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. 30 * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
31 */ 31 */
32static struct omap_vc_common omap3_vc_common = { 32static struct omap_vc_common omap3_vc_common = {
33 .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
34 .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
35 .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
36 .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, 33 .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET,
37 .data_shift = OMAP3430_DATA_SHIFT, 34 .data_shift = OMAP3430_DATA_SHIFT,
38 .slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT, 35 .slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT,
@@ -43,7 +40,6 @@ static struct omap_vc_common omap3_vc_common = {
43 .cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT, 40 .cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT,
44 .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT, 41 .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT,
45 .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, 42 .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT,
46 .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
47 .i2c_cfg_hsen_mask = OMAP3430_HSEN_MASK, 43 .i2c_cfg_hsen_mask = OMAP3430_HSEN_MASK,
48 .i2c_cfg_reg = OMAP3_PRM_VC_I2C_CFG_OFFSET, 44 .i2c_cfg_reg = OMAP3_PRM_VC_I2C_CFG_OFFSET,
49 .i2c_mcode_mask = OMAP3430_MCODE_MASK, 45 .i2c_mcode_mask = OMAP3430_MCODE_MASK,
@@ -51,6 +47,10 @@ static struct omap_vc_common omap3_vc_common = {
51 47
52struct omap_vc_channel omap3_vc_mpu = { 48struct omap_vc_channel omap3_vc_mpu = {
53 .common = &omap3_vc_common, 49 .common = &omap3_vc_common,
50 .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
51 .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
52 .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
53 .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
54 .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, 54 .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET,
55 .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, 55 .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK,
56 .smps_volra_mask = OMAP3430_VOLRA0_MASK, 56 .smps_volra_mask = OMAP3430_VOLRA0_MASK,
@@ -60,6 +60,10 @@ struct omap_vc_channel omap3_vc_mpu = {
60 60
61struct omap_vc_channel omap3_vc_core = { 61struct omap_vc_channel omap3_vc_core = {
62 .common = &omap3_vc_common, 62 .common = &omap3_vc_common,
63 .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
64 .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
65 .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
66 .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
63 .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, 67 .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET,
64 .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, 68 .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK,
65 .smps_volra_mask = OMAP3430_VOLRA1_MASK, 69 .smps_volra_mask = OMAP3430_VOLRA1_MASK,