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authorSricharan R <r.sricharan@ti.com>2013-09-18 07:20:11 -0400
committerTony Lindgren <tony@atomide.com>2013-10-08 17:26:06 -0400
commit38a1981ce31dc4c527cbc0137f638543261b471a (patch)
tree01cd91e9b8dbba695c48207855ba496aa0216d80 /arch/arm/mach-omap2/timer.c
parentd0e639c9e06d44e713170031fe05fb60ebe680af (diff)
ARM: OMAP2+: DRA7: realtime_counter: Add ratio registers for 20MHZ sys-clk frequency
The real time counter also called master counter, is a free-running counter. It produces the count used by the CPU local timer peripherals in the MPU cluster. The timer counts at a rate of 6.144 MHz. The ratio registers are missing for a sys-clk of 20MHZ which is used by DRA7 socs. So because of this, the counter was getting wrongly programmed for a sys-clk of 38.4Mhz(default). So adding the ratio registers for 20MHZ sys-clk. Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/timer.c')
-rw-r--r--arch/arm/mach-omap2/timer.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index fa74a0625da1..d0f80c020423 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -515,6 +515,10 @@ static void __init realtime_counter_init(void)
515 num = 8; 515 num = 8;
516 den = 25; 516 den = 25;
517 break; 517 break;
518 case 20000000:
519 num = 192;
520 den = 625;
521 break;
518 case 2600000: 522 case 2600000:
519 num = 384; 523 num = 384;
520 den = 1625; 524 den = 1625;