aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/timer.c
diff options
context:
space:
mode:
authorOlof Johansson <olof@lixom.net>2013-01-14 13:20:02 -0500
committerOlof Johansson <olof@lixom.net>2013-01-14 13:20:02 -0500
commit8d84981e395850aab31c3f2ca7e2738e03f671d7 (patch)
tree933425fddb23d28be802277471df3fe3f6c2711d /arch/arm/mach-omap2/timer.c
parent00c82d64405631967dca3890a9ce80ab35d04cc7 (diff)
parent77cc982f6a3b33a5aa058ad3b20cda8866db2948 (diff)
Merge branch 'clocksource/cleanup' into next/cleanup
Clockevent cleanup series from Shawn Guo. Resolved move/change conflict in mach-pxa/time.c due to the sys_timer cleanup. * clocksource/cleanup: clocksource: use clockevents_config_and_register() where possible ARM: use clockevents_config_and_register() where possible clockevents: export clockevents_config_and_register for module use + sync to Linux 3.8-rc3 Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/mach-pxa/time.c
Diffstat (limited to 'arch/arm/mach-omap2/timer.c')
-rw-r--r--arch/arm/mach-omap2/timer.c13
1 files changed, 3 insertions, 10 deletions
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 5975a42e16d4..57b1ee39fe56 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -131,7 +131,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
131static struct clock_event_device clockevent_gpt = { 131static struct clock_event_device clockevent_gpt = {
132 .name = "gp_timer", 132 .name = "gp_timer",
133 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 133 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
134 .shift = 32,
135 .rating = 300, 134 .rating = 300,
136 .set_next_event = omap2_gp_timer_set_next_event, 135 .set_next_event = omap2_gp_timer_set_next_event,
137 .set_mode = omap2_gp_timer_set_mode, 136 .set_mode = omap2_gp_timer_set_mode,
@@ -340,17 +339,11 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
340 339
341 __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); 340 __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
342 341
343 clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
344 clockevent_gpt.shift);
345 clockevent_gpt.max_delta_ns =
346 clockevent_delta2ns(0xffffffff, &clockevent_gpt);
347 clockevent_gpt.min_delta_ns =
348 clockevent_delta2ns(3, &clockevent_gpt);
349 /* Timer internal resynch latency. */
350
351 clockevent_gpt.cpumask = cpu_possible_mask; 342 clockevent_gpt.cpumask = cpu_possible_mask;
352 clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev); 343 clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
353 clockevents_register_device(&clockevent_gpt); 344 clockevents_config_and_register(&clockevent_gpt, clkev.rate,
345 3, /* Timer internal resynch latency */
346 0xffffffff);
354 347
355 pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", 348 pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
356 gptimer_id, clkev.rate); 349 gptimer_id, clkev.rate);