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author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-14 16:42:43 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-14 16:42:43 -0400 |
commit | 2cf4d4514d5b43c1f3b64bd0ec8b9853bde8f1dc (patch) | |
tree | e35a625496acc6ac852846d40b8851186b9d1ac4 /arch/arm/mach-omap2/timer-gp.c | |
parent | 44b7532b8b464f606053562400719c9c21276037 (diff) | |
parent | ce53895a5d24e0ee19fb92f56c17323fb4c9ab27 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (417 commits)
MAINTAINERS: EB110ATX is not ebsa110
MAINTAINERS: update Eric Miao's email address and status
fb: add support of LCD display controller on pxa168/910 (base layer)
[ARM] 5552/1: ep93xx get_uart_rate(): use EP93XX_SYSCON_PWRCNT and EP93XX_SYSCON_PWRCN
[ARM] pxa/sharpsl_pm: zaurus needs generic pxa suspend/resume routines
[ARM] 5544/1: Trust PrimeCell resource sizes
[ARM] pxa/sharpsl_pm: cleanup of gpio-related code.
[ARM] pxa/sharpsl_pm: drop set_irq_type calls
[ARM] pxa/sharpsl_pm: merge pxa-specific code into generic one
[ARM] pxa/sharpsl_pm: merge the two sharpsl_pm.c since it's now pxa specific
[ARM] sa1100: remove unused collie_pm.c
[ARM] pxa: fix the conflicting non-static declarations of global_gpios[]
[ARM] 5550/1: Add default configure file for w90p910 platform
[ARM] 5549/1: Add clock api for w90p910 platform.
[ARM] 5548/1: Add gpio api for w90p910 platform
[ARM] 5551/1: Add multi-function pin api for w90p910 platform.
[ARM] Make ARM_VIC_NR depend on ARM_VIC
[ARM] 5546/1: ARM PL022 SSP/SPI driver v3
ARM: OMAP4: SMP: Update defconfig for OMAP4430
ARM: OMAP4: SMP: Enable SMP support for OMAP4430
...
Diffstat (limited to 'arch/arm/mach-omap2/timer-gp.c')
-rw-r--r-- | arch/arm/mach-omap2/timer-gp.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index f36aba12090e..97eeeebcb066 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c | |||
@@ -17,9 +17,10 @@ | |||
17 | * | 17 | * |
18 | * Some parts based off of TI's 24xx code: | 18 | * Some parts based off of TI's 24xx code: |
19 | * | 19 | * |
20 | * Copyright (C) 2004 Texas Instruments, Inc. | 20 | * Copyright (C) 2004-2009 Texas Instruments, Inc. |
21 | * | 21 | * |
22 | * Roughly modelled after the OMAP1 MPU timer code. | 22 | * Roughly modelled after the OMAP1 MPU timer code. |
23 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
23 | * | 24 | * |
24 | * This file is subject to the terms and conditions of the GNU General Public | 25 | * This file is subject to the terms and conditions of the GNU General Public |
25 | * License. See the file "COPYING" in the main directory of this archive | 26 | * License. See the file "COPYING" in the main directory of this archive |
@@ -37,6 +38,7 @@ | |||
37 | 38 | ||
38 | #include <asm/mach/time.h> | 39 | #include <asm/mach/time.h> |
39 | #include <mach/dmtimer.h> | 40 | #include <mach/dmtimer.h> |
41 | #include <asm/localtimer.h> | ||
40 | 42 | ||
41 | /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ | 43 | /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ |
42 | #define MAX_GPTIMER_ID 12 | 44 | #define MAX_GPTIMER_ID 12 |
@@ -82,7 +84,8 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode, | |||
82 | case CLOCK_EVT_MODE_PERIODIC: | 84 | case CLOCK_EVT_MODE_PERIODIC: |
83 | period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ; | 85 | period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ; |
84 | period -= 1; | 86 | period -= 1; |
85 | 87 | if (cpu_is_omap44xx()) | |
88 | period = 0xff; /* FIXME: */ | ||
86 | omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period); | 89 | omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period); |
87 | break; | 90 | break; |
88 | case CLOCK_EVT_MODE_ONESHOT: | 91 | case CLOCK_EVT_MODE_ONESHOT: |
@@ -145,6 +148,9 @@ static void __init omap2_gp_clockevent_init(void) | |||
145 | "timer-gp: omap_dm_timer_set_source() failed\n"); | 148 | "timer-gp: omap_dm_timer_set_source() failed\n"); |
146 | 149 | ||
147 | tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer)); | 150 | tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer)); |
151 | if (cpu_is_omap44xx()) | ||
152 | /* Assuming 32kHz clk is driving GPT1 */ | ||
153 | tick_rate = 32768; /* FIXME: */ | ||
148 | 154 | ||
149 | pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n", | 155 | pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n", |
150 | gptimer_id, tick_rate); | 156 | gptimer_id, tick_rate); |
@@ -224,6 +230,9 @@ static void __init omap2_gp_clocksource_init(void) | |||
224 | 230 | ||
225 | static void __init omap2_gp_timer_init(void) | 231 | static void __init omap2_gp_timer_init(void) |
226 | { | 232 | { |
233 | #ifdef CONFIG_LOCAL_TIMERS | ||
234 | twd_base = IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE); | ||
235 | #endif | ||
227 | omap_dm_timer_init(); | 236 | omap_dm_timer_init(); |
228 | 237 | ||
229 | omap2_gp_clockevent_init(); | 238 | omap2_gp_clockevent_init(); |