Merge branch 'linus' into tracing/core

Merge reason: tracing/core was on a .30-rc1 base and was missing out on
              on a handful of tracing fixes present in .30-rc5-almost.

Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 46 insertions, 4 deletions

diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 9fc13a2cc3f4..f36aba12090e 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -3,6 +3,8 @@
  *
  * OMAP2 GP timer support.
  *
+ * Copyright (C) 2009 Nokia Corporation
+ *
  * Update to use new clocksource/clockevent layers
  * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
  * Copyright (C) 2007 MontaVista Software, Inc.
@@ -36,8 +38,13 @@
 #include <asm/mach/time.h>
 #include <mach/dmtimer.h>
 
+/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
+#define MAX_GPTIMER_ID          12
+
 static struct omap_dm_timer *gptimer;
 static struct clock_event_device clockevent_gpt;
+static u8 __initdata gptimer_id = 1;
+static u8 __initdata inited;
 
 static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
 {
@@ -95,20 +102,53 @@ static struct clock_event_device clockevent_gpt = {
         .set_mode       = omap2_gp_timer_set_mode,
 };
 
+/**
+ * omap2_gp_clockevent_set_gptimer - set which GPTIMER is used for clockevents
+ * @id: GPTIMER to use (1..MAX_GPTIMER_ID)
+ *
+ * Define the GPTIMER that the system should use for the tick timer.
+ * Meant to be called from board-*.c files in the event that GPTIMER1, the
+ * default, is unsuitable.  Returns -EINVAL on error or 0 on success.
+ */
+int __init omap2_gp_clockevent_set_gptimer(u8 id)
+{
+        if (id < 1 || id > MAX_GPTIMER_ID)
+                return -EINVAL;
+
+        BUG_ON(inited);
+
+        gptimer_id = id;
+
+        return 0;
+}
+
 static void __init omap2_gp_clockevent_init(void)
 {
         u32 tick_rate;
+        int src;
+
+        inited = 1;
 
-        gptimer = omap_dm_timer_request_specific(1);
+        gptimer = omap_dm_timer_request_specific(gptimer_id);
         BUG_ON(gptimer == NULL);
 
 #if defined(CONFIG_OMAP_32K_TIMER)
-        omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_32_KHZ);
+        src = OMAP_TIMER_SRC_32_KHZ;
 #else
-        omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK);
+        src = OMAP_TIMER_SRC_SYS_CLK;
+        WARN(gptimer_id == 12, "WARNING: GPTIMER12 can only use the "
+             "secure 32KiHz clock source\n");
 #endif
+
+        if (gptimer_id != 12)
+                WARN(IS_ERR_VALUE(omap_dm_timer_set_source(gptimer, src)),
+                     "timer-gp: omap_dm_timer_set_source() failed\n");
+
         tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
 
+        pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n",
+                gptimer_id, tick_rate);
+
         omap2_gp_timer_irq.dev_id = (void *)gptimer;
         setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
         omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW);
@@ -125,6 +165,8 @@ static void __init omap2_gp_clockevent_init(void)
         clockevents_register_device(&clockevent_gpt);
 }
 
+/* Clocksource code */
+
 #ifdef CONFIG_OMAP_32K_TIMER
 /* 
  * When 32k-timer is enabled, don't use GPTimer for clocksource
@@ -138,7 +180,7 @@ static inline void __init omap2_gp_clocksource_init(void) {}
  * clocksource
  */
 static struct omap_dm_timer *gpt_clocksource;
-static cycle_t clocksource_read_cycles(void)
+static cycle_t clocksource_read_cycles(struct clocksource *cs)
 {
         return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource);
 }