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authorPaul Walmsley <paul@pwsan.com>2012-10-29 22:50:21 -0400
committerPaul Walmsley <paul@pwsan.com>2012-11-08 14:33:07 -0500
commitb6a4226c14001b0aa20b11c69190cb89d2237d3d (patch)
treee7c0f4b571cc010767c01d8b402762e49540c563 /arch/arm/mach-omap2/ti81xx.h
parent76e0e16d91af22dd6313000ff8018069123f8ed0 (diff)
ARM: OMAP2+: common: remove mach-omap2/common.c globals and map_common_io code
Get rid of the mach-omap2/common.c globals by moving the global initialization for IP block addresses that must occur early into mach-omap2/io.c. In the process, remove the *_map_common_io*() and SoC-specific *set_globals* functions. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/ti81xx.h')
-rw-r--r--arch/arm/mach-omap2/ti81xx.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/ti81xx.h b/arch/arm/mach-omap2/ti81xx.h
index 8f9843f78422..a1e6caf0dba6 100644
--- a/arch/arm/mach-omap2/ti81xx.h
+++ b/arch/arm/mach-omap2/ti81xx.h
@@ -22,6 +22,15 @@
22#define TI81XX_CTRL_BASE TI81XX_SCM_BASE 22#define TI81XX_CTRL_BASE TI81XX_SCM_BASE
23#define TI81XX_PRCM_BASE 0x48180000 23#define TI81XX_PRCM_BASE 0x48180000
24 24
25/*
26 * Adjust TAP register base such that omap3_check_revision accesses the correct
27 * TI81XX register for checking device ID (it adds 0x204 to tap base while
28 * TI81XX DEVICE ID register is at offset 0x600 from control base).
29 */
30#define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \
31 TI81XX_CONTROL_DEVICE_ID - 0x204)
32
33
25#define TI81XX_ARM_INTC_BASE 0x48200000 34#define TI81XX_ARM_INTC_BASE 0x48200000
26 35
27#endif /* __ASM_ARCH_TI81XX_H */ 36#endif /* __ASM_ARCH_TI81XX_H */