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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-17 22:28:15 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-17 22:28:15 -0400 |
commit | 0df0914d414a504b975f3cc66ace0c16ef55b7f3 (patch) | |
tree | c97ffa357943a8b226cdec1b9632c4cede813205 /arch/arm/mach-omap2/sram34xx.S | |
parent | 6899608533410557e6698cb9d4ff6df553916e98 (diff) | |
parent | 05f689400ea5fa3d71af82f910c8b140f87ad1f3 (diff) |
Merge branch 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (258 commits)
omap: zoom: host should not pull up wl1271's irq line
arm: plat-omap: iommu: fix request_mem_region() error path
OMAP2+: Common CPU DIE ID reading code reads wrong registers for OMAP4430
omap4: mux: Remove duplicate mux modes
omap: iovmm: don't check 'da' to set IOVMF_DA_FIXED flag
omap: iovmm: disallow mapping NULL address when IOVMF_DA_ANON is set
omap2+: mux: Fix compile when CONFIG_OMAP_MUX is not selected
omap4: board-omap4panda: Initialise the serial pads
omap3: board-3430sdp: Initialise the serial pads
omap4: board-4430sdp: Initialise the serial pads
omap2+: mux: Add macro for configuring static with omap_hwmod_mux_init
omap2+: mux: Remove the use of IDLE flag
omap2+: Add separate list for dynamic pads to mux
perf: add OMAP support for the new power events
OMAP4: Add IVA OPP enteries.
OMAP4: Update Voltage Rail Values for MPU, IVA and CORE
OMAP4: Enable 800 MHz and 1 GHz MPU-OPP
OMAP3+: OPP: Replace voltage values with Macros
OMAP3: wdtimer: Fix CORE idle transition
Watchdog: omap_wdt: add fine grain runtime-pm
...
Fix up various conflicts in
- arch/arm/mach-omap2/board-omap3evm.c
- arch/arm/mach-omap2/clock3xxx_data.c
- arch/arm/mach-omap2/usb-musb.c
- arch/arm/plat-omap/include/plat/usb.h
- drivers/usb/musb/musb_core.h
Diffstat (limited to 'arch/arm/mach-omap2/sram34xx.S')
-rw-r--r-- | arch/arm/mach-omap2/sram34xx.S | 36 |
1 files changed, 28 insertions, 8 deletions
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S index 25011ca2145d..6f5849aaa7c0 100644 --- a/arch/arm/mach-omap2/sram34xx.S +++ b/arch/arm/mach-omap2/sram34xx.S | |||
@@ -34,6 +34,12 @@ | |||
34 | #include "sdrc.h" | 34 | #include "sdrc.h" |
35 | #include "cm2xxx_3xxx.h" | 35 | #include "cm2xxx_3xxx.h" |
36 | 36 | ||
37 | /* | ||
38 | * This file needs be built unconditionally as ARM to interoperate correctly | ||
39 | * with non-Thumb-2-capable firmware. | ||
40 | */ | ||
41 | .arm | ||
42 | |||
37 | .text | 43 | .text |
38 | 44 | ||
39 | /* r1 parameters */ | 45 | /* r1 parameters */ |
@@ -117,24 +123,36 @@ ENTRY(omap3_sram_configure_core_dpll) | |||
117 | 123 | ||
118 | @ pull the extra args off the stack | 124 | @ pull the extra args off the stack |
119 | @ and store them in SRAM | 125 | @ and store them in SRAM |
126 | |||
127 | /* | ||
128 | * PC-relative stores are deprecated in ARMv7 and lead to undefined behaviour | ||
129 | * in Thumb-2: use a r7 as a base instead. | ||
130 | * Be careful not to clobber r7 when maintaing this file. | ||
131 | */ | ||
132 | THUMB( adr r7, omap3_sram_configure_core_dpll ) | ||
133 | .macro strtext Rt:req, label:req | ||
134 | ARM( str \Rt, \label ) | ||
135 | THUMB( str \Rt, [r7, \label - omap3_sram_configure_core_dpll] ) | ||
136 | .endm | ||
137 | |||
120 | ldr r4, [sp, #52] | 138 | ldr r4, [sp, #52] |
121 | str r4, omap_sdrc_rfr_ctrl_0_val | 139 | strtext r4, omap_sdrc_rfr_ctrl_0_val |
122 | ldr r4, [sp, #56] | 140 | ldr r4, [sp, #56] |
123 | str r4, omap_sdrc_actim_ctrl_a_0_val | 141 | strtext r4, omap_sdrc_actim_ctrl_a_0_val |
124 | ldr r4, [sp, #60] | 142 | ldr r4, [sp, #60] |
125 | str r4, omap_sdrc_actim_ctrl_b_0_val | 143 | strtext r4, omap_sdrc_actim_ctrl_b_0_val |
126 | ldr r4, [sp, #64] | 144 | ldr r4, [sp, #64] |
127 | str r4, omap_sdrc_mr_0_val | 145 | strtext r4, omap_sdrc_mr_0_val |
128 | ldr r4, [sp, #68] | 146 | ldr r4, [sp, #68] |
129 | str r4, omap_sdrc_rfr_ctrl_1_val | 147 | strtext r4, omap_sdrc_rfr_ctrl_1_val |
130 | cmp r4, #0 @ if SDRC_RFR_CTRL_1 is 0, | 148 | cmp r4, #0 @ if SDRC_RFR_CTRL_1 is 0, |
131 | beq skip_cs1_params @ do not use cs1 params | 149 | beq skip_cs1_params @ do not use cs1 params |
132 | ldr r4, [sp, #72] | 150 | ldr r4, [sp, #72] |
133 | str r4, omap_sdrc_actim_ctrl_a_1_val | 151 | strtext r4, omap_sdrc_actim_ctrl_a_1_val |
134 | ldr r4, [sp, #76] | 152 | ldr r4, [sp, #76] |
135 | str r4, omap_sdrc_actim_ctrl_b_1_val | 153 | strtext r4, omap_sdrc_actim_ctrl_b_1_val |
136 | ldr r4, [sp, #80] | 154 | ldr r4, [sp, #80] |
137 | str r4, omap_sdrc_mr_1_val | 155 | strtext r4, omap_sdrc_mr_1_val |
138 | skip_cs1_params: | 156 | skip_cs1_params: |
139 | mrc p15, 0, r8, c1, c0, 0 @ read ctrl register | 157 | mrc p15, 0, r8, c1, c0, 0 @ read ctrl register |
140 | bic r10, r8, #0x800 @ clear Z-bit, disable branch prediction | 158 | bic r10, r8, #0x800 @ clear Z-bit, disable branch prediction |
@@ -272,6 +290,7 @@ skip_cs1_prog: | |||
272 | ldr r12, [r11] @ posted-write barrier for SDRC | 290 | ldr r12, [r11] @ posted-write barrier for SDRC |
273 | bx lr | 291 | bx lr |
274 | 292 | ||
293 | .align | ||
275 | omap3_sdrc_power: | 294 | omap3_sdrc_power: |
276 | .word OMAP34XX_SDRC_REGADDR(SDRC_POWER) | 295 | .word OMAP34XX_SDRC_REGADDR(SDRC_POWER) |
277 | omap3_cm_clksel1_pll: | 296 | omap3_cm_clksel1_pll: |
@@ -320,6 +339,7 @@ omap3_sdrc_dlla_ctrl: | |||
320 | .word OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL) | 339 | .word OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL) |
321 | core_m2_mask_val: | 340 | core_m2_mask_val: |
322 | .word 0x07FFFFFF | 341 | .word 0x07FFFFFF |
342 | ENDPROC(omap3_sram_configure_core_dpll) | ||
323 | 343 | ||
324 | ENTRY(omap3_sram_configure_core_dpll_sz) | 344 | ENTRY(omap3_sram_configure_core_dpll_sz) |
325 | .word . - omap3_sram_configure_core_dpll | 345 | .word . - omap3_sram_configure_core_dpll |