aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/sram242x.S
diff options
context:
space:
mode:
authorJean Pihet <j-pihet@ti.com>2011-02-02 10:38:06 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-02-04 09:26:08 -0500
commitb6338bdc8305b27688a7feb8689e4ccfd42f0292 (patch)
tree2854dda3c50899b00cb7b302b06d2ba6fd03cdb2 /arch/arm/mach-omap2/sram242x.S
parent5756e9dd0de6d5c307773f8f734c0684b3098fdd (diff)
ARM: 6649/1: omap: use fncpy to copy the PM code functions to SRAM
The new fncpy API is better suited* for copying some code to SRAM at runtime. This patch changes the ad-hoc code to the more generic fncpy API. *: 1. fncpy ensures that the thumb mode bit is propagated, 2. fncpy provides the security of type safety between the original function and the sram function pointer. Tested OK on OMAP3 in low power modes (RET/OFF) using omap2plus_defconfig with !CONFIG_THUMB2_KERNEL. Compile tested on OMAP1/2 using omap1_defconfig. Boot tested on OMAP1 & OMAP2 Tested OK with suspend/resume on OMAP2420/n810 Boots fine on osk5912 and n800 Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Kevin Hilman <khilman@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Dave Martin <dave.martin@linaro.org> Tested-by: Kevin Hilman <khilman@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap2/sram242x.S')
-rw-r--r--arch/arm/mach-omap2/sram242x.S3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S
index 055310cc77de..ff9b9dbcb30e 100644
--- a/arch/arm/mach-omap2/sram242x.S
+++ b/arch/arm/mach-omap2/sram242x.S
@@ -39,6 +39,7 @@
39 39
40 .text 40 .text
41 41
42 .align 3
42ENTRY(omap242x_sram_ddr_init) 43ENTRY(omap242x_sram_ddr_init)
43 stmfd sp!, {r0 - r12, lr} @ save registers on stack 44 stmfd sp!, {r0 - r12, lr} @ save registers on stack
44 45
@@ -143,6 +144,7 @@ ENTRY(omap242x_sram_ddr_init_sz)
143 * r0 = [PRCM_FULL | PRCM_HALF] r1 = SDRC_DLLA_CTRL value r2 = [DDR | SDR] 144 * r0 = [PRCM_FULL | PRCM_HALF] r1 = SDRC_DLLA_CTRL value r2 = [DDR | SDR]
144 * PRCM_FULL = 2, PRCM_HALF = 1, DDR = 1, SDR = 0 145 * PRCM_FULL = 2, PRCM_HALF = 1, DDR = 1, SDR = 0
145 */ 146 */
147 .align 3
146ENTRY(omap242x_sram_reprogram_sdrc) 148ENTRY(omap242x_sram_reprogram_sdrc)
147 stmfd sp!, {r0 - r10, lr} @ save registers on stack 149 stmfd sp!, {r0 - r10, lr} @ save registers on stack
148 mov r3, #0x0 @ clear for mrc call 150 mov r3, #0x0 @ clear for mrc call
@@ -238,6 +240,7 @@ ENTRY(omap242x_sram_reprogram_sdrc_sz)
238/* 240/*
239 * Set dividers and pll. Also recalculate DLL value for DDR and unlock mode. 241 * Set dividers and pll. Also recalculate DLL value for DDR and unlock mode.
240 */ 242 */
243 .align 3
241ENTRY(omap242x_sram_set_prcm) 244ENTRY(omap242x_sram_set_prcm)
242 stmfd sp!, {r0-r12, lr} @ regs to stack 245 stmfd sp!, {r0-r12, lr} @ regs to stack
243 adr r4, pbegin @ addr of preload start 246 adr r4, pbegin @ addr of preload start