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authorTony Lindgren <tony@atomide.com>2009-05-25 14:26:42 -0400
committerTony Lindgren <tony@atomide.com>2009-05-25 14:26:42 -0400
commit8e3bd351d1d2505e17d0b10c17bf8d7655eb9faf (patch)
treec1efd26ff3761d7f83984f51fd68e13cd686b1e5 /arch/arm/mach-omap2/sram242x.S
parenta4ab0d836bbdbbfdb892135a92b339107530b710 (diff)
ARM: OMAP2/3: Remove OMAP_PRM_REGADDR and OMAP2_PRM_BASE
Remove OMAP_PRM_REGADDR and use processor specific defines instead. Also fold in a patch from Kevin Hilman to add _OFFSET #defines for the PRCM registers to be used with the prm_[read|write]_* macros. These are used extensively in the forthcoming OMAP PM support. Also remove now unused OMAP2_PRM_BASE. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/sram242x.S')
-rw-r--r--arch/arm/mach-omap2/sram242x.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S
index cbb893042487..bb299851116d 100644
--- a/arch/arm/mach-omap2/sram242x.S
+++ b/arch/arm/mach-omap2/sram242x.S
@@ -124,7 +124,7 @@ omap242x_sdi_cm_clksel2_pll:
124omap242x_sdi_sdrc_dlla_ctrl: 124omap242x_sdi_sdrc_dlla_ctrl:
125 .word OMAP242X_SDRC_REGADDR(SDRC_DLLA_CTRL) 125 .word OMAP242X_SDRC_REGADDR(SDRC_DLLA_CTRL)
126omap242x_sdi_prcm_voltctrl: 126omap242x_sdi_prcm_voltctrl:
127 .word OMAP242X_PRCM_VOLTCTRL 127 .word OMAP2420_PRCM_VOLTCTRL
128prcm_mask_val: 128prcm_mask_val:
129 .word 0xFFFF3FFC 129 .word 0xFFFF3FFC
130omap242x_sdi_timer_32ksynct_cr: 130omap242x_sdi_timer_32ksynct_cr:
@@ -220,7 +220,7 @@ omap242x_srs_sdrc_dlla_ctrl:
220omap242x_srs_sdrc_rfr_ctrl: 220omap242x_srs_sdrc_rfr_ctrl:
221 .word OMAP242X_SDRC_REGADDR(SDRC_RFR_CTRL_0) 221 .word OMAP242X_SDRC_REGADDR(SDRC_RFR_CTRL_0)
222omap242x_srs_prcm_voltctrl: 222omap242x_srs_prcm_voltctrl:
223 .word OMAP242X_PRCM_VOLTCTRL 223 .word OMAP2420_PRCM_VOLTCTRL
224ddr_prcm_mask_val: 224ddr_prcm_mask_val:
225 .word 0xFFFF3FFC 225 .word 0xFFFF3FFC
226omap242x_srs_timer_32ksynct: 226omap242x_srs_timer_32ksynct:
@@ -305,7 +305,7 @@ wait_dll_lock:
305 ldmfd sp!, {r0-r12, pc} @ restore regs and return 305 ldmfd sp!, {r0-r12, pc} @ restore regs and return
306 306
307omap242x_ssp_set_config: 307omap242x_ssp_set_config:
308 .word OMAP242X_PRCM_CLKCFG_CTRL 308 .word OMAP2420_PRCM_CLKCFG_CTRL
309omap242x_ssp_pll_ctl: 309omap242x_ssp_pll_ctl:
310 .word OMAP2420_CM_REGADDR(PLL_MOD, CM_CLKEN) 310 .word OMAP2420_CM_REGADDR(PLL_MOD, CM_CLKEN)
311omap242x_ssp_pll_stat: 311omap242x_ssp_pll_stat: