diff options
author | Thara Gopinath <thara@ti.com> | 2010-08-18 02:53:12 -0400 |
---|---|---|
committer | Kevin Hilman <khilman@deeprootsystems.com> | 2010-12-22 17:31:50 -0500 |
commit | b35cecf978e33bf8f4be0f36ffe00fe10f381c4a (patch) | |
tree | e64d7071a277931f9481761c1fa788994faab418 /arch/arm/mach-omap2/sr_device.c | |
parent | fb200cfb2330b959eabc94e2f2c15717ce8466af (diff) |
OMAP4: Smartreflex framework extensions
This patch extends the smartreflex framework to support
OMAP4. The changes are minor like compiling smartreflex Kconfig
option for OMAP4 also, and a couple of OMAP4 checks in
the smartreflex framework.
The change in sr_device.c where new logic has to be introduced
for reading the efuse registers is due to the fact that in OMAP4
the efuse registers are 24 bit aligned. A __raw_readl will
fail for non-32 bit aligned address and hence the 8-bit read
and shift.
Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-omap2/sr_device.c')
-rw-r--r-- | arch/arm/mach-omap2/sr_device.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c index 9a3538fb633a..786d685c09a9 100644 --- a/arch/arm/mach-omap2/sr_device.c +++ b/arch/arm/mach-omap2/sr_device.c | |||
@@ -20,6 +20,7 @@ | |||
20 | 20 | ||
21 | #include <linux/err.h> | 21 | #include <linux/err.h> |
22 | #include <linux/slab.h> | 22 | #include <linux/slab.h> |
23 | #include <linux/io.h> | ||
23 | 24 | ||
24 | #include <plat/omap_device.h> | 25 | #include <plat/omap_device.h> |
25 | #include <plat/smartreflex.h> | 26 | #include <plat/smartreflex.h> |
@@ -51,7 +52,21 @@ static void __init sr_set_nvalues(struct omap_volt_data *volt_data, | |||
51 | GFP_KERNEL); | 52 | GFP_KERNEL); |
52 | 53 | ||
53 | for (i = 0; i < count; i++) { | 54 | for (i = 0; i < count; i++) { |
54 | u32 v = omap_ctrl_readl(volt_data[i].sr_efuse_offs); | 55 | u32 v; |
56 | /* | ||
57 | * In OMAP4 the efuse registers are 24 bit aligned. | ||
58 | * A __raw_readl will fail for non-32 bit aligned address | ||
59 | * and hence the 8-bit read and shift. | ||
60 | */ | ||
61 | if (cpu_is_omap44xx()) { | ||
62 | u16 offset = volt_data[i].sr_efuse_offs; | ||
63 | |||
64 | v = omap_ctrl_readb(offset) | | ||
65 | omap_ctrl_readb(offset + 1) << 8 | | ||
66 | omap_ctrl_readb(offset + 2) << 16; | ||
67 | } else { | ||
68 | v = omap_ctrl_readl(volt_data[i].sr_efuse_offs); | ||
69 | } | ||
55 | 70 | ||
56 | nvalue_table[i].efuse_offs = volt_data[i].sr_efuse_offs; | 71 | nvalue_table[i].efuse_offs = volt_data[i].sr_efuse_offs; |
57 | nvalue_table[i].nvalue = v; | 72 | nvalue_table[i].nvalue = v; |