diff options
author | Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | 2012-09-05 10:22:45 -0400 |
---|---|---|
committer | Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | 2012-09-05 10:22:45 -0400 |
commit | 593d0a3e9f813db910dc50574532914db21d09ff (patch) | |
tree | 12d8413ee57b4383ca8c906996ffe02be6d377a5 /arch/arm/mach-omap2/smartreflex.c | |
parent | 50e900417b8096939d12a46848f965e27a905e36 (diff) | |
parent | 4cb38750d49010ae72e718d46605ac9ba5a851b4 (diff) |
Merge commit '4cb38750d49010ae72e718d46605ac9ba5a851b4' into stable/for-linus-3.6
* commit '4cb38750d49010ae72e718d46605ac9ba5a851b4': (6849 commits)
bcma: fix invalid PMU chip control masks
[libata] pata_cmd64x: whitespace cleanup
libata-acpi: fix up for acpi_pm_device_sleep_state API
sata_dwc_460ex: device tree may specify dma_channel
ahci, trivial: fixed coding style issues related to braces
ahci_platform: add hibernation callbacks
libata-eh.c: local functions should not be exposed globally
libata-transport.c: local functions should not be exposed globally
sata_dwc_460ex: support hardreset
ata: use module_pci_driver
drivers/ata/pata_pcmcia.c: adjust suspicious bit operation
pata_imx: Convert to clk_prepare_enable/clk_disable_unprepare
ahci: Enable SB600 64bit DMA on MSI K9AGM2 (MS-7327) v2
[libata] Prevent interface errors with Seagate FreeAgent GoFlex
drivers/acpi/glue: revert accidental license-related 6b66d95895c bits
libata-acpi: add missing inlines in libata.h
i2c-omap: Add support for I2C_M_STOP message flag
i2c: Fall back to emulated SMBus if the operation isn't supported natively
i2c: Add SCCB support
i2c-tiny-usb: Add support for the Robofuzz OSIF USB/I2C converter
...
Diffstat (limited to 'arch/arm/mach-omap2/smartreflex.c')
-rw-r--r-- | arch/arm/mach-omap2/smartreflex.c | 1165 |
1 files changed, 0 insertions, 1165 deletions
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c deleted file mode 100644 index 008fbd7b9352..000000000000 --- a/arch/arm/mach-omap2/smartreflex.c +++ /dev/null | |||
@@ -1,1165 +0,0 @@ | |||
1 | /* | ||
2 | * OMAP SmartReflex Voltage Control | ||
3 | * | ||
4 | * Author: Thara Gopinath <thara@ti.com> | ||
5 | * | ||
6 | * Copyright (C) 2010 Texas Instruments, Inc. | ||
7 | * Thara Gopinath <thara@ti.com> | ||
8 | * | ||
9 | * Copyright (C) 2008 Nokia Corporation | ||
10 | * Kalle Jokiniemi | ||
11 | * | ||
12 | * Copyright (C) 2007 Texas Instruments, Inc. | ||
13 | * Lesly A M <x0080970@ti.com> | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License version 2 as | ||
17 | * published by the Free Software Foundation. | ||
18 | */ | ||
19 | |||
20 | #include <linux/module.h> | ||
21 | #include <linux/interrupt.h> | ||
22 | #include <linux/clk.h> | ||
23 | #include <linux/io.h> | ||
24 | #include <linux/debugfs.h> | ||
25 | #include <linux/delay.h> | ||
26 | #include <linux/slab.h> | ||
27 | #include <linux/pm_runtime.h> | ||
28 | |||
29 | #include "common.h" | ||
30 | |||
31 | #include "pm.h" | ||
32 | #include "smartreflex.h" | ||
33 | |||
34 | #define SMARTREFLEX_NAME_LEN 16 | ||
35 | #define NVALUE_NAME_LEN 40 | ||
36 | #define SR_DISABLE_TIMEOUT 200 | ||
37 | |||
38 | struct omap_sr { | ||
39 | struct list_head node; | ||
40 | struct platform_device *pdev; | ||
41 | struct omap_sr_nvalue_table *nvalue_table; | ||
42 | struct voltagedomain *voltdm; | ||
43 | struct dentry *dbg_dir; | ||
44 | unsigned int irq; | ||
45 | int srid; | ||
46 | int ip_type; | ||
47 | int nvalue_count; | ||
48 | bool autocomp_active; | ||
49 | u32 clk_length; | ||
50 | u32 err_weight; | ||
51 | u32 err_minlimit; | ||
52 | u32 err_maxlimit; | ||
53 | u32 accum_data; | ||
54 | u32 senn_avgweight; | ||
55 | u32 senp_avgweight; | ||
56 | u32 senp_mod; | ||
57 | u32 senn_mod; | ||
58 | void __iomem *base; | ||
59 | }; | ||
60 | |||
61 | /* sr_list contains all the instances of smartreflex module */ | ||
62 | static LIST_HEAD(sr_list); | ||
63 | |||
64 | static struct omap_sr_class_data *sr_class; | ||
65 | static struct omap_sr_pmic_data *sr_pmic_data; | ||
66 | static struct dentry *sr_dbg_dir; | ||
67 | |||
68 | static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value) | ||
69 | { | ||
70 | __raw_writel(value, (sr->base + offset)); | ||
71 | } | ||
72 | |||
73 | static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask, | ||
74 | u32 value) | ||
75 | { | ||
76 | u32 reg_val; | ||
77 | |||
78 | /* | ||
79 | * Smartreflex error config register is special as it contains | ||
80 | * certain status bits which if written a 1 into means a clear | ||
81 | * of those bits. So in order to make sure no accidental write of | ||
82 | * 1 happens to those status bits, do a clear of them in the read | ||
83 | * value. This mean this API doesn't rewrite values in these bits | ||
84 | * if they are currently set, but does allow the caller to write | ||
85 | * those bits. | ||
86 | */ | ||
87 | if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1) | ||
88 | mask |= ERRCONFIG_STATUS_V1_MASK; | ||
89 | else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2) | ||
90 | mask |= ERRCONFIG_VPBOUNDINTST_V2; | ||
91 | |||
92 | reg_val = __raw_readl(sr->base + offset); | ||
93 | reg_val &= ~mask; | ||
94 | |||
95 | value &= mask; | ||
96 | |||
97 | reg_val |= value; | ||
98 | |||
99 | __raw_writel(reg_val, (sr->base + offset)); | ||
100 | } | ||
101 | |||
102 | static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset) | ||
103 | { | ||
104 | return __raw_readl(sr->base + offset); | ||
105 | } | ||
106 | |||
107 | static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm) | ||
108 | { | ||
109 | struct omap_sr *sr_info; | ||
110 | |||
111 | if (!voltdm) { | ||
112 | pr_err("%s: Null voltage domain passed!\n", __func__); | ||
113 | return ERR_PTR(-EINVAL); | ||
114 | } | ||
115 | |||
116 | list_for_each_entry(sr_info, &sr_list, node) { | ||
117 | if (voltdm == sr_info->voltdm) | ||
118 | return sr_info; | ||
119 | } | ||
120 | |||
121 | return ERR_PTR(-ENODATA); | ||
122 | } | ||
123 | |||
124 | static irqreturn_t sr_interrupt(int irq, void *data) | ||
125 | { | ||
126 | struct omap_sr *sr_info = data; | ||
127 | u32 status = 0; | ||
128 | |||
129 | switch (sr_info->ip_type) { | ||
130 | case SR_TYPE_V1: | ||
131 | /* Read the status bits */ | ||
132 | status = sr_read_reg(sr_info, ERRCONFIG_V1); | ||
133 | |||
134 | /* Clear them by writing back */ | ||
135 | sr_write_reg(sr_info, ERRCONFIG_V1, status); | ||
136 | break; | ||
137 | case SR_TYPE_V2: | ||
138 | /* Read the status bits */ | ||
139 | status = sr_read_reg(sr_info, IRQSTATUS); | ||
140 | |||
141 | /* Clear them by writing back */ | ||
142 | sr_write_reg(sr_info, IRQSTATUS, status); | ||
143 | break; | ||
144 | default: | ||
145 | dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n", | ||
146 | sr_info->ip_type); | ||
147 | return IRQ_NONE; | ||
148 | } | ||
149 | |||
150 | if (sr_class->notify) | ||
151 | sr_class->notify(sr_info->voltdm, status); | ||
152 | |||
153 | return IRQ_HANDLED; | ||
154 | } | ||
155 | |||
156 | static void sr_set_clk_length(struct omap_sr *sr) | ||
157 | { | ||
158 | struct clk *sys_ck; | ||
159 | u32 sys_clk_speed; | ||
160 | |||
161 | if (cpu_is_omap34xx()) | ||
162 | sys_ck = clk_get(NULL, "sys_ck"); | ||
163 | else | ||
164 | sys_ck = clk_get(NULL, "sys_clkin_ck"); | ||
165 | |||
166 | if (IS_ERR(sys_ck)) { | ||
167 | dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n", | ||
168 | __func__); | ||
169 | return; | ||
170 | } | ||
171 | |||
172 | sys_clk_speed = clk_get_rate(sys_ck); | ||
173 | clk_put(sys_ck); | ||
174 | |||
175 | switch (sys_clk_speed) { | ||
176 | case 12000000: | ||
177 | sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK; | ||
178 | break; | ||
179 | case 13000000: | ||
180 | sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK; | ||
181 | break; | ||
182 | case 19200000: | ||
183 | sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK; | ||
184 | break; | ||
185 | case 26000000: | ||
186 | sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK; | ||
187 | break; | ||
188 | case 38400000: | ||
189 | sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK; | ||
190 | break; | ||
191 | default: | ||
192 | dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n", | ||
193 | __func__, sys_clk_speed); | ||
194 | break; | ||
195 | } | ||
196 | } | ||
197 | |||
198 | static void sr_set_regfields(struct omap_sr *sr) | ||
199 | { | ||
200 | /* | ||
201 | * For time being these values are defined in smartreflex.h | ||
202 | * and populated during init. May be they can be moved to board | ||
203 | * file or pmic specific data structure. In that case these structure | ||
204 | * fields will have to be populated using the pdata or pmic structure. | ||
205 | */ | ||
206 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) { | ||
207 | sr->err_weight = OMAP3430_SR_ERRWEIGHT; | ||
208 | sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT; | ||
209 | sr->accum_data = OMAP3430_SR_ACCUMDATA; | ||
210 | if (!(strcmp(sr->voltdm->name, "mpu"))) { | ||
211 | sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT; | ||
212 | sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT; | ||
213 | } else { | ||
214 | sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT; | ||
215 | sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT; | ||
216 | } | ||
217 | } | ||
218 | } | ||
219 | |||
220 | static void sr_start_vddautocomp(struct omap_sr *sr) | ||
221 | { | ||
222 | if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { | ||
223 | dev_warn(&sr->pdev->dev, | ||
224 | "%s: smartreflex class driver not registered\n", | ||
225 | __func__); | ||
226 | return; | ||
227 | } | ||
228 | |||
229 | if (!sr_class->enable(sr->voltdm)) | ||
230 | sr->autocomp_active = true; | ||
231 | } | ||
232 | |||
233 | static void sr_stop_vddautocomp(struct omap_sr *sr) | ||
234 | { | ||
235 | if (!sr_class || !(sr_class->disable)) { | ||
236 | dev_warn(&sr->pdev->dev, | ||
237 | "%s: smartreflex class driver not registered\n", | ||
238 | __func__); | ||
239 | return; | ||
240 | } | ||
241 | |||
242 | if (sr->autocomp_active) { | ||
243 | sr_class->disable(sr->voltdm, 1); | ||
244 | sr->autocomp_active = false; | ||
245 | } | ||
246 | } | ||
247 | |||
248 | /* | ||
249 | * This function handles the intializations which have to be done | ||
250 | * only when both sr device and class driver regiter has | ||
251 | * completed. This will be attempted to be called from both sr class | ||
252 | * driver register and sr device intializtion API's. Only one call | ||
253 | * will ultimately succeed. | ||
254 | * | ||
255 | * Currently this function registers interrupt handler for a particular SR | ||
256 | * if smartreflex class driver is already registered and has | ||
257 | * requested for interrupts and the SR interrupt line in present. | ||
258 | */ | ||
259 | static int sr_late_init(struct omap_sr *sr_info) | ||
260 | { | ||
261 | char *name; | ||
262 | struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data; | ||
263 | struct resource *mem; | ||
264 | int ret = 0; | ||
265 | |||
266 | if (sr_class->notify && sr_class->notify_flags && sr_info->irq) { | ||
267 | name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); | ||
268 | if (name == NULL) { | ||
269 | ret = -ENOMEM; | ||
270 | goto error; | ||
271 | } | ||
272 | ret = request_irq(sr_info->irq, sr_interrupt, | ||
273 | 0, name, sr_info); | ||
274 | if (ret) | ||
275 | goto error; | ||
276 | disable_irq(sr_info->irq); | ||
277 | } | ||
278 | |||
279 | if (pdata && pdata->enable_on_init) | ||
280 | sr_start_vddautocomp(sr_info); | ||
281 | |||
282 | return ret; | ||
283 | |||
284 | error: | ||
285 | iounmap(sr_info->base); | ||
286 | mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); | ||
287 | release_mem_region(mem->start, resource_size(mem)); | ||
288 | list_del(&sr_info->node); | ||
289 | dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" | ||
290 | "interrupt handler. Smartreflex will" | ||
291 | "not function as desired\n", __func__); | ||
292 | kfree(name); | ||
293 | kfree(sr_info); | ||
294 | |||
295 | return ret; | ||
296 | } | ||
297 | |||
298 | static void sr_v1_disable(struct omap_sr *sr) | ||
299 | { | ||
300 | int timeout = 0; | ||
301 | int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST | | ||
302 | ERRCONFIG_MCUBOUNDINTST; | ||
303 | |||
304 | /* Enable MCUDisableAcknowledge interrupt */ | ||
305 | sr_modify_reg(sr, ERRCONFIG_V1, | ||
306 | ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN); | ||
307 | |||
308 | /* SRCONFIG - disable SR */ | ||
309 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); | ||
310 | |||
311 | /* Disable all other SR interrupts and clear the status as needed */ | ||
312 | if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1) | ||
313 | errconf_val |= ERRCONFIG_VPBOUNDINTST_V1; | ||
314 | sr_modify_reg(sr, ERRCONFIG_V1, | ||
315 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | | ||
316 | ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1), | ||
317 | errconf_val); | ||
318 | |||
319 | /* | ||
320 | * Wait for SR to be disabled. | ||
321 | * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us. | ||
322 | */ | ||
323 | omap_test_timeout((sr_read_reg(sr, ERRCONFIG_V1) & | ||
324 | ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT, | ||
325 | timeout); | ||
326 | |||
327 | if (timeout >= SR_DISABLE_TIMEOUT) | ||
328 | dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", | ||
329 | __func__); | ||
330 | |||
331 | /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ | ||
332 | sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN, | ||
333 | ERRCONFIG_MCUDISACKINTST); | ||
334 | } | ||
335 | |||
336 | static void sr_v2_disable(struct omap_sr *sr) | ||
337 | { | ||
338 | int timeout = 0; | ||
339 | |||
340 | /* Enable MCUDisableAcknowledge interrupt */ | ||
341 | sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT); | ||
342 | |||
343 | /* SRCONFIG - disable SR */ | ||
344 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); | ||
345 | |||
346 | /* | ||
347 | * Disable all other SR interrupts and clear the status | ||
348 | * write to status register ONLY on need basis - only if status | ||
349 | * is set. | ||
350 | */ | ||
351 | if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2) | ||
352 | sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2, | ||
353 | ERRCONFIG_VPBOUNDINTST_V2); | ||
354 | else | ||
355 | sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2, | ||
356 | 0x0); | ||
357 | sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT | | ||
358 | IRQENABLE_MCUVALIDINT | | ||
359 | IRQENABLE_MCUBOUNDSINT)); | ||
360 | sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT | | ||
361 | IRQSTATUS_MCVALIDINT | | ||
362 | IRQSTATUS_MCBOUNDSINT)); | ||
363 | |||
364 | /* | ||
365 | * Wait for SR to be disabled. | ||
366 | * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us. | ||
367 | */ | ||
368 | omap_test_timeout((sr_read_reg(sr, IRQSTATUS) & | ||
369 | IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT, | ||
370 | timeout); | ||
371 | |||
372 | if (timeout >= SR_DISABLE_TIMEOUT) | ||
373 | dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", | ||
374 | __func__); | ||
375 | |||
376 | /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ | ||
377 | sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT); | ||
378 | sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT); | ||
379 | } | ||
380 | |||
381 | static u32 sr_retrieve_nvalue(struct omap_sr *sr, u32 efuse_offs) | ||
382 | { | ||
383 | int i; | ||
384 | |||
385 | if (!sr->nvalue_table) { | ||
386 | dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n", | ||
387 | __func__); | ||
388 | return 0; | ||
389 | } | ||
390 | |||
391 | for (i = 0; i < sr->nvalue_count; i++) { | ||
392 | if (sr->nvalue_table[i].efuse_offs == efuse_offs) | ||
393 | return sr->nvalue_table[i].nvalue; | ||
394 | } | ||
395 | |||
396 | return 0; | ||
397 | } | ||
398 | |||
399 | /* Public Functions */ | ||
400 | |||
401 | /** | ||
402 | * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the | ||
403 | * error generator module. | ||
404 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
405 | * | ||
406 | * This API is to be called from the smartreflex class driver to | ||
407 | * configure the error generator module inside the smartreflex module. | ||
408 | * SR settings if using the ERROR module inside Smartreflex. | ||
409 | * SR CLASS 3 by default uses only the ERROR module where as | ||
410 | * SR CLASS 2 can choose between ERROR module and MINMAXAVG | ||
411 | * module. Returns 0 on success and error value in case of failure. | ||
412 | */ | ||
413 | int sr_configure_errgen(struct voltagedomain *voltdm) | ||
414 | { | ||
415 | u32 sr_config, sr_errconfig, errconfig_offs; | ||
416 | u32 vpboundint_en, vpboundint_st; | ||
417 | u32 senp_en = 0, senn_en = 0; | ||
418 | u8 senp_shift, senn_shift; | ||
419 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
420 | |||
421 | if (IS_ERR(sr)) { | ||
422 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | ||
423 | __func__, voltdm->name); | ||
424 | return PTR_ERR(sr); | ||
425 | } | ||
426 | |||
427 | if (!sr->clk_length) | ||
428 | sr_set_clk_length(sr); | ||
429 | |||
430 | senp_en = sr->senp_mod; | ||
431 | senn_en = sr->senn_mod; | ||
432 | |||
433 | sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | | ||
434 | SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN; | ||
435 | |||
436 | switch (sr->ip_type) { | ||
437 | case SR_TYPE_V1: | ||
438 | sr_config |= SRCONFIG_DELAYCTRL; | ||
439 | senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; | ||
440 | senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; | ||
441 | errconfig_offs = ERRCONFIG_V1; | ||
442 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1; | ||
443 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1; | ||
444 | break; | ||
445 | case SR_TYPE_V2: | ||
446 | senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; | ||
447 | senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; | ||
448 | errconfig_offs = ERRCONFIG_V2; | ||
449 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2; | ||
450 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2; | ||
451 | break; | ||
452 | default: | ||
453 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | ||
454 | "module without specifying the ip\n", __func__); | ||
455 | return -EINVAL; | ||
456 | } | ||
457 | |||
458 | sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); | ||
459 | sr_write_reg(sr, SRCONFIG, sr_config); | ||
460 | sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) | | ||
461 | (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) | | ||
462 | (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT); | ||
463 | sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK | | ||
464 | SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK), | ||
465 | sr_errconfig); | ||
466 | |||
467 | /* Enabling the interrupts if the ERROR module is used */ | ||
468 | sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st), | ||
469 | vpboundint_en); | ||
470 | |||
471 | return 0; | ||
472 | } | ||
473 | |||
474 | /** | ||
475 | * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component | ||
476 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
477 | * | ||
478 | * This API is to be called from the smartreflex class driver to | ||
479 | * disable the error generator module inside the smartreflex module. | ||
480 | * | ||
481 | * Returns 0 on success and error value in case of failure. | ||
482 | */ | ||
483 | int sr_disable_errgen(struct voltagedomain *voltdm) | ||
484 | { | ||
485 | u32 errconfig_offs; | ||
486 | u32 vpboundint_en, vpboundint_st; | ||
487 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
488 | |||
489 | if (IS_ERR(sr)) { | ||
490 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | ||
491 | __func__, voltdm->name); | ||
492 | return PTR_ERR(sr); | ||
493 | } | ||
494 | |||
495 | switch (sr->ip_type) { | ||
496 | case SR_TYPE_V1: | ||
497 | errconfig_offs = ERRCONFIG_V1; | ||
498 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1; | ||
499 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1; | ||
500 | break; | ||
501 | case SR_TYPE_V2: | ||
502 | errconfig_offs = ERRCONFIG_V2; | ||
503 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2; | ||
504 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2; | ||
505 | break; | ||
506 | default: | ||
507 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | ||
508 | "module without specifying the ip\n", __func__); | ||
509 | return -EINVAL; | ||
510 | } | ||
511 | |||
512 | /* Disable the interrupts of ERROR module */ | ||
513 | sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0); | ||
514 | |||
515 | /* Disable the Sensor and errorgen */ | ||
516 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0); | ||
517 | |||
518 | return 0; | ||
519 | } | ||
520 | |||
521 | /** | ||
522 | * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the | ||
523 | * minmaxavg module. | ||
524 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
525 | * | ||
526 | * This API is to be called from the smartreflex class driver to | ||
527 | * configure the minmaxavg module inside the smartreflex module. | ||
528 | * SR settings if using the ERROR module inside Smartreflex. | ||
529 | * SR CLASS 3 by default uses only the ERROR module where as | ||
530 | * SR CLASS 2 can choose between ERROR module and MINMAXAVG | ||
531 | * module. Returns 0 on success and error value in case of failure. | ||
532 | */ | ||
533 | int sr_configure_minmax(struct voltagedomain *voltdm) | ||
534 | { | ||
535 | u32 sr_config, sr_avgwt; | ||
536 | u32 senp_en = 0, senn_en = 0; | ||
537 | u8 senp_shift, senn_shift; | ||
538 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
539 | |||
540 | if (IS_ERR(sr)) { | ||
541 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | ||
542 | __func__, voltdm->name); | ||
543 | return PTR_ERR(sr); | ||
544 | } | ||
545 | |||
546 | if (!sr->clk_length) | ||
547 | sr_set_clk_length(sr); | ||
548 | |||
549 | senp_en = sr->senp_mod; | ||
550 | senn_en = sr->senn_mod; | ||
551 | |||
552 | sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | | ||
553 | SRCONFIG_SENENABLE | | ||
554 | (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT); | ||
555 | |||
556 | switch (sr->ip_type) { | ||
557 | case SR_TYPE_V1: | ||
558 | sr_config |= SRCONFIG_DELAYCTRL; | ||
559 | senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; | ||
560 | senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; | ||
561 | break; | ||
562 | case SR_TYPE_V2: | ||
563 | senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; | ||
564 | senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; | ||
565 | break; | ||
566 | default: | ||
567 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | ||
568 | "module without specifying the ip\n", __func__); | ||
569 | return -EINVAL; | ||
570 | } | ||
571 | |||
572 | sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); | ||
573 | sr_write_reg(sr, SRCONFIG, sr_config); | ||
574 | sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) | | ||
575 | (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT); | ||
576 | sr_write_reg(sr, AVGWEIGHT, sr_avgwt); | ||
577 | |||
578 | /* | ||
579 | * Enabling the interrupts if MINMAXAVG module is used. | ||
580 | * TODO: check if all the interrupts are mandatory | ||
581 | */ | ||
582 | switch (sr->ip_type) { | ||
583 | case SR_TYPE_V1: | ||
584 | sr_modify_reg(sr, ERRCONFIG_V1, | ||
585 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | | ||
586 | ERRCONFIG_MCUBOUNDINTEN), | ||
587 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST | | ||
588 | ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST | | ||
589 | ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST)); | ||
590 | break; | ||
591 | case SR_TYPE_V2: | ||
592 | sr_write_reg(sr, IRQSTATUS, | ||
593 | IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT | | ||
594 | IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT); | ||
595 | sr_write_reg(sr, IRQENABLE_SET, | ||
596 | IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT | | ||
597 | IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT); | ||
598 | break; | ||
599 | default: | ||
600 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | ||
601 | "module without specifying the ip\n", __func__); | ||
602 | return -EINVAL; | ||
603 | } | ||
604 | |||
605 | return 0; | ||
606 | } | ||
607 | |||
608 | /** | ||
609 | * sr_enable() - Enables the smartreflex module. | ||
610 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
611 | * @volt: The voltage at which the Voltage domain associated with | ||
612 | * the smartreflex module is operating at. | ||
613 | * This is required only to program the correct Ntarget value. | ||
614 | * | ||
615 | * This API is to be called from the smartreflex class driver to | ||
616 | * enable a smartreflex module. Returns 0 on success. Returns error | ||
617 | * value if the voltage passed is wrong or if ntarget value is wrong. | ||
618 | */ | ||
619 | int sr_enable(struct voltagedomain *voltdm, unsigned long volt) | ||
620 | { | ||
621 | struct omap_volt_data *volt_data; | ||
622 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
623 | u32 nvalue_reciprocal; | ||
624 | int ret; | ||
625 | |||
626 | if (IS_ERR(sr)) { | ||
627 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | ||
628 | __func__, voltdm->name); | ||
629 | return PTR_ERR(sr); | ||
630 | } | ||
631 | |||
632 | volt_data = omap_voltage_get_voltdata(sr->voltdm, volt); | ||
633 | |||
634 | if (IS_ERR(volt_data)) { | ||
635 | dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table" | ||
636 | "for nominal voltage %ld\n", __func__, volt); | ||
637 | return PTR_ERR(volt_data); | ||
638 | } | ||
639 | |||
640 | nvalue_reciprocal = sr_retrieve_nvalue(sr, volt_data->sr_efuse_offs); | ||
641 | |||
642 | if (!nvalue_reciprocal) { | ||
643 | dev_warn(&sr->pdev->dev, "%s: NVALUE = 0 at voltage %ld\n", | ||
644 | __func__, volt); | ||
645 | return -ENODATA; | ||
646 | } | ||
647 | |||
648 | /* errminlimit is opp dependent and hence linked to voltage */ | ||
649 | sr->err_minlimit = volt_data->sr_errminlimit; | ||
650 | |||
651 | pm_runtime_get_sync(&sr->pdev->dev); | ||
652 | |||
653 | /* Check if SR is already enabled. If yes do nothing */ | ||
654 | if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) | ||
655 | return 0; | ||
656 | |||
657 | /* Configure SR */ | ||
658 | ret = sr_class->configure(voltdm); | ||
659 | if (ret) | ||
660 | return ret; | ||
661 | |||
662 | sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal); | ||
663 | |||
664 | /* SRCONFIG - enable SR */ | ||
665 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE); | ||
666 | return 0; | ||
667 | } | ||
668 | |||
669 | /** | ||
670 | * sr_disable() - Disables the smartreflex module. | ||
671 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
672 | * | ||
673 | * This API is to be called from the smartreflex class driver to | ||
674 | * disable a smartreflex module. | ||
675 | */ | ||
676 | void sr_disable(struct voltagedomain *voltdm) | ||
677 | { | ||
678 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
679 | |||
680 | if (IS_ERR(sr)) { | ||
681 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | ||
682 | __func__, voltdm->name); | ||
683 | return; | ||
684 | } | ||
685 | |||
686 | /* Check if SR clocks are already disabled. If yes do nothing */ | ||
687 | if (pm_runtime_suspended(&sr->pdev->dev)) | ||
688 | return; | ||
689 | |||
690 | /* | ||
691 | * Disable SR if only it is indeed enabled. Else just | ||
692 | * disable the clocks. | ||
693 | */ | ||
694 | if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) { | ||
695 | switch (sr->ip_type) { | ||
696 | case SR_TYPE_V1: | ||
697 | sr_v1_disable(sr); | ||
698 | break; | ||
699 | case SR_TYPE_V2: | ||
700 | sr_v2_disable(sr); | ||
701 | break; | ||
702 | default: | ||
703 | dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n", | ||
704 | sr->ip_type); | ||
705 | } | ||
706 | } | ||
707 | |||
708 | pm_runtime_put_sync_suspend(&sr->pdev->dev); | ||
709 | } | ||
710 | |||
711 | /** | ||
712 | * sr_register_class() - API to register a smartreflex class parameters. | ||
713 | * @class_data: The structure containing various sr class specific data. | ||
714 | * | ||
715 | * This API is to be called by the smartreflex class driver to register itself | ||
716 | * with the smartreflex driver during init. Returns 0 on success else the | ||
717 | * error value. | ||
718 | */ | ||
719 | int sr_register_class(struct omap_sr_class_data *class_data) | ||
720 | { | ||
721 | struct omap_sr *sr_info; | ||
722 | |||
723 | if (!class_data) { | ||
724 | pr_warning("%s:, Smartreflex class data passed is NULL\n", | ||
725 | __func__); | ||
726 | return -EINVAL; | ||
727 | } | ||
728 | |||
729 | if (sr_class) { | ||
730 | pr_warning("%s: Smartreflex class driver already registered\n", | ||
731 | __func__); | ||
732 | return -EBUSY; | ||
733 | } | ||
734 | |||
735 | sr_class = class_data; | ||
736 | |||
737 | /* | ||
738 | * Call into late init to do intializations that require | ||
739 | * both sr driver and sr class driver to be initiallized. | ||
740 | */ | ||
741 | list_for_each_entry(sr_info, &sr_list, node) | ||
742 | sr_late_init(sr_info); | ||
743 | |||
744 | return 0; | ||
745 | } | ||
746 | |||
747 | /** | ||
748 | * omap_sr_enable() - API to enable SR clocks and to call into the | ||
749 | * registered smartreflex class enable API. | ||
750 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
751 | * | ||
752 | * This API is to be called from the kernel in order to enable | ||
753 | * a particular smartreflex module. This API will do the initial | ||
754 | * configurations to turn on the smartreflex module and in turn call | ||
755 | * into the registered smartreflex class enable API. | ||
756 | */ | ||
757 | void omap_sr_enable(struct voltagedomain *voltdm) | ||
758 | { | ||
759 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
760 | |||
761 | if (IS_ERR(sr)) { | ||
762 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | ||
763 | __func__, voltdm->name); | ||
764 | return; | ||
765 | } | ||
766 | |||
767 | if (!sr->autocomp_active) | ||
768 | return; | ||
769 | |||
770 | if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { | ||
771 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | ||
772 | "registered\n", __func__); | ||
773 | return; | ||
774 | } | ||
775 | |||
776 | sr_class->enable(voltdm); | ||
777 | } | ||
778 | |||
779 | /** | ||
780 | * omap_sr_disable() - API to disable SR without resetting the voltage | ||
781 | * processor voltage | ||
782 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
783 | * | ||
784 | * This API is to be called from the kernel in order to disable | ||
785 | * a particular smartreflex module. This API will in turn call | ||
786 | * into the registered smartreflex class disable API. This API will tell | ||
787 | * the smartreflex class disable not to reset the VP voltage after | ||
788 | * disabling smartreflex. | ||
789 | */ | ||
790 | void omap_sr_disable(struct voltagedomain *voltdm) | ||
791 | { | ||
792 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
793 | |||
794 | if (IS_ERR(sr)) { | ||
795 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | ||
796 | __func__, voltdm->name); | ||
797 | return; | ||
798 | } | ||
799 | |||
800 | if (!sr->autocomp_active) | ||
801 | return; | ||
802 | |||
803 | if (!sr_class || !(sr_class->disable)) { | ||
804 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | ||
805 | "registered\n", __func__); | ||
806 | return; | ||
807 | } | ||
808 | |||
809 | sr_class->disable(voltdm, 0); | ||
810 | } | ||
811 | |||
812 | /** | ||
813 | * omap_sr_disable_reset_volt() - API to disable SR and reset the | ||
814 | * voltage processor voltage | ||
815 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
816 | * | ||
817 | * This API is to be called from the kernel in order to disable | ||
818 | * a particular smartreflex module. This API will in turn call | ||
819 | * into the registered smartreflex class disable API. This API will tell | ||
820 | * the smartreflex class disable to reset the VP voltage after | ||
821 | * disabling smartreflex. | ||
822 | */ | ||
823 | void omap_sr_disable_reset_volt(struct voltagedomain *voltdm) | ||
824 | { | ||
825 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
826 | |||
827 | if (IS_ERR(sr)) { | ||
828 | pr_warning("%s: omap_sr struct for sr_%s not found\n", | ||
829 | __func__, voltdm->name); | ||
830 | return; | ||
831 | } | ||
832 | |||
833 | if (!sr->autocomp_active) | ||
834 | return; | ||
835 | |||
836 | if (!sr_class || !(sr_class->disable)) { | ||
837 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | ||
838 | "registered\n", __func__); | ||
839 | return; | ||
840 | } | ||
841 | |||
842 | sr_class->disable(voltdm, 1); | ||
843 | } | ||
844 | |||
845 | /** | ||
846 | * omap_sr_register_pmic() - API to register pmic specific info. | ||
847 | * @pmic_data: The structure containing pmic specific data. | ||
848 | * | ||
849 | * This API is to be called from the PMIC specific code to register with | ||
850 | * smartreflex driver pmic specific info. Currently the only info required | ||
851 | * is the smartreflex init on the PMIC side. | ||
852 | */ | ||
853 | void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data) | ||
854 | { | ||
855 | if (!pmic_data) { | ||
856 | pr_warning("%s: Trying to register NULL PMIC data structure" | ||
857 | "with smartreflex\n", __func__); | ||
858 | return; | ||
859 | } | ||
860 | |||
861 | sr_pmic_data = pmic_data; | ||
862 | } | ||
863 | |||
864 | /* PM Debug FS entries to enable and disable smartreflex. */ | ||
865 | static int omap_sr_autocomp_show(void *data, u64 *val) | ||
866 | { | ||
867 | struct omap_sr *sr_info = data; | ||
868 | |||
869 | if (!sr_info) { | ||
870 | pr_warning("%s: omap_sr struct not found\n", __func__); | ||
871 | return -EINVAL; | ||
872 | } | ||
873 | |||
874 | *val = sr_info->autocomp_active; | ||
875 | |||
876 | return 0; | ||
877 | } | ||
878 | |||
879 | static int omap_sr_autocomp_store(void *data, u64 val) | ||
880 | { | ||
881 | struct omap_sr *sr_info = data; | ||
882 | |||
883 | if (!sr_info) { | ||
884 | pr_warning("%s: omap_sr struct not found\n", __func__); | ||
885 | return -EINVAL; | ||
886 | } | ||
887 | |||
888 | /* Sanity check */ | ||
889 | if (val > 1) { | ||
890 | pr_warning("%s: Invalid argument %lld\n", __func__, val); | ||
891 | return -EINVAL; | ||
892 | } | ||
893 | |||
894 | /* control enable/disable only if there is a delta in value */ | ||
895 | if (sr_info->autocomp_active != val) { | ||
896 | if (!val) | ||
897 | sr_stop_vddautocomp(sr_info); | ||
898 | else | ||
899 | sr_start_vddautocomp(sr_info); | ||
900 | } | ||
901 | |||
902 | return 0; | ||
903 | } | ||
904 | |||
905 | DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show, | ||
906 | omap_sr_autocomp_store, "%llu\n"); | ||
907 | |||
908 | static int __init omap_sr_probe(struct platform_device *pdev) | ||
909 | { | ||
910 | struct omap_sr *sr_info; | ||
911 | struct omap_sr_data *pdata = pdev->dev.platform_data; | ||
912 | struct resource *mem, *irq; | ||
913 | struct dentry *nvalue_dir; | ||
914 | struct omap_volt_data *volt_data; | ||
915 | int i, ret = 0; | ||
916 | char *name; | ||
917 | |||
918 | sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL); | ||
919 | if (!sr_info) { | ||
920 | dev_err(&pdev->dev, "%s: unable to allocate sr_info\n", | ||
921 | __func__); | ||
922 | return -ENOMEM; | ||
923 | } | ||
924 | |||
925 | platform_set_drvdata(pdev, sr_info); | ||
926 | |||
927 | if (!pdata) { | ||
928 | dev_err(&pdev->dev, "%s: platform data missing\n", __func__); | ||
929 | ret = -EINVAL; | ||
930 | goto err_free_devinfo; | ||
931 | } | ||
932 | |||
933 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
934 | if (!mem) { | ||
935 | dev_err(&pdev->dev, "%s: no mem resource\n", __func__); | ||
936 | ret = -ENODEV; | ||
937 | goto err_free_devinfo; | ||
938 | } | ||
939 | |||
940 | mem = request_mem_region(mem->start, resource_size(mem), | ||
941 | dev_name(&pdev->dev)); | ||
942 | if (!mem) { | ||
943 | dev_err(&pdev->dev, "%s: no mem region\n", __func__); | ||
944 | ret = -EBUSY; | ||
945 | goto err_free_devinfo; | ||
946 | } | ||
947 | |||
948 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
949 | |||
950 | pm_runtime_enable(&pdev->dev); | ||
951 | pm_runtime_irq_safe(&pdev->dev); | ||
952 | |||
953 | sr_info->pdev = pdev; | ||
954 | sr_info->srid = pdev->id; | ||
955 | sr_info->voltdm = pdata->voltdm; | ||
956 | sr_info->nvalue_table = pdata->nvalue_table; | ||
957 | sr_info->nvalue_count = pdata->nvalue_count; | ||
958 | sr_info->senn_mod = pdata->senn_mod; | ||
959 | sr_info->senp_mod = pdata->senp_mod; | ||
960 | sr_info->autocomp_active = false; | ||
961 | sr_info->ip_type = pdata->ip_type; | ||
962 | sr_info->base = ioremap(mem->start, resource_size(mem)); | ||
963 | if (!sr_info->base) { | ||
964 | dev_err(&pdev->dev, "%s: ioremap fail\n", __func__); | ||
965 | ret = -ENOMEM; | ||
966 | goto err_release_region; | ||
967 | } | ||
968 | |||
969 | if (irq) | ||
970 | sr_info->irq = irq->start; | ||
971 | |||
972 | sr_set_clk_length(sr_info); | ||
973 | sr_set_regfields(sr_info); | ||
974 | |||
975 | list_add(&sr_info->node, &sr_list); | ||
976 | |||
977 | /* | ||
978 | * Call into late init to do intializations that require | ||
979 | * both sr driver and sr class driver to be initiallized. | ||
980 | */ | ||
981 | if (sr_class) { | ||
982 | ret = sr_late_init(sr_info); | ||
983 | if (ret) { | ||
984 | pr_warning("%s: Error in SR late init\n", __func__); | ||
985 | goto err_iounmap; | ||
986 | } | ||
987 | } | ||
988 | |||
989 | dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__); | ||
990 | if (!sr_dbg_dir) { | ||
991 | sr_dbg_dir = debugfs_create_dir("smartreflex", NULL); | ||
992 | if (IS_ERR_OR_NULL(sr_dbg_dir)) { | ||
993 | ret = PTR_ERR(sr_dbg_dir); | ||
994 | pr_err("%s:sr debugfs dir creation failed(%d)\n", | ||
995 | __func__, ret); | ||
996 | goto err_iounmap; | ||
997 | } | ||
998 | } | ||
999 | |||
1000 | name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); | ||
1001 | if (!name) { | ||
1002 | dev_err(&pdev->dev, "%s: Unable to alloc debugfs name\n", | ||
1003 | __func__); | ||
1004 | ret = -ENOMEM; | ||
1005 | goto err_iounmap; | ||
1006 | } | ||
1007 | sr_info->dbg_dir = debugfs_create_dir(name, sr_dbg_dir); | ||
1008 | kfree(name); | ||
1009 | if (IS_ERR_OR_NULL(sr_info->dbg_dir)) { | ||
1010 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", | ||
1011 | __func__); | ||
1012 | ret = PTR_ERR(sr_info->dbg_dir); | ||
1013 | goto err_iounmap; | ||
1014 | } | ||
1015 | |||
1016 | (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, | ||
1017 | sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops); | ||
1018 | (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir, | ||
1019 | &sr_info->err_weight); | ||
1020 | (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir, | ||
1021 | &sr_info->err_maxlimit); | ||
1022 | (void) debugfs_create_x32("errminlimit", S_IRUGO, sr_info->dbg_dir, | ||
1023 | &sr_info->err_minlimit); | ||
1024 | |||
1025 | nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir); | ||
1026 | if (IS_ERR_OR_NULL(nvalue_dir)) { | ||
1027 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory" | ||
1028 | "for n-values\n", __func__); | ||
1029 | ret = PTR_ERR(nvalue_dir); | ||
1030 | goto err_debugfs; | ||
1031 | } | ||
1032 | |||
1033 | omap_voltage_get_volttable(sr_info->voltdm, &volt_data); | ||
1034 | if (!volt_data) { | ||
1035 | dev_warn(&pdev->dev, "%s: No Voltage table for the" | ||
1036 | " corresponding vdd vdd_%s. Cannot create debugfs" | ||
1037 | "entries for n-values\n", | ||
1038 | __func__, sr_info->voltdm->name); | ||
1039 | ret = -ENODATA; | ||
1040 | goto err_debugfs; | ||
1041 | } | ||
1042 | |||
1043 | for (i = 0; i < sr_info->nvalue_count; i++) { | ||
1044 | char name[NVALUE_NAME_LEN + 1]; | ||
1045 | |||
1046 | snprintf(name, sizeof(name), "volt_%d", | ||
1047 | volt_data[i].volt_nominal); | ||
1048 | (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir, | ||
1049 | &(sr_info->nvalue_table[i].nvalue)); | ||
1050 | } | ||
1051 | |||
1052 | return ret; | ||
1053 | |||
1054 | err_debugfs: | ||
1055 | debugfs_remove_recursive(sr_info->dbg_dir); | ||
1056 | err_iounmap: | ||
1057 | list_del(&sr_info->node); | ||
1058 | iounmap(sr_info->base); | ||
1059 | err_release_region: | ||
1060 | release_mem_region(mem->start, resource_size(mem)); | ||
1061 | err_free_devinfo: | ||
1062 | kfree(sr_info); | ||
1063 | |||
1064 | return ret; | ||
1065 | } | ||
1066 | |||
1067 | static int __devexit omap_sr_remove(struct platform_device *pdev) | ||
1068 | { | ||
1069 | struct omap_sr_data *pdata = pdev->dev.platform_data; | ||
1070 | struct omap_sr *sr_info; | ||
1071 | struct resource *mem; | ||
1072 | |||
1073 | if (!pdata) { | ||
1074 | dev_err(&pdev->dev, "%s: platform data missing\n", __func__); | ||
1075 | return -EINVAL; | ||
1076 | } | ||
1077 | |||
1078 | sr_info = _sr_lookup(pdata->voltdm); | ||
1079 | if (IS_ERR(sr_info)) { | ||
1080 | dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", | ||
1081 | __func__); | ||
1082 | return PTR_ERR(sr_info); | ||
1083 | } | ||
1084 | |||
1085 | if (sr_info->autocomp_active) | ||
1086 | sr_stop_vddautocomp(sr_info); | ||
1087 | if (sr_info->dbg_dir) | ||
1088 | debugfs_remove_recursive(sr_info->dbg_dir); | ||
1089 | |||
1090 | list_del(&sr_info->node); | ||
1091 | iounmap(sr_info->base); | ||
1092 | kfree(sr_info); | ||
1093 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
1094 | release_mem_region(mem->start, resource_size(mem)); | ||
1095 | |||
1096 | return 0; | ||
1097 | } | ||
1098 | |||
1099 | static void __devexit omap_sr_shutdown(struct platform_device *pdev) | ||
1100 | { | ||
1101 | struct omap_sr_data *pdata = pdev->dev.platform_data; | ||
1102 | struct omap_sr *sr_info; | ||
1103 | |||
1104 | if (!pdata) { | ||
1105 | dev_err(&pdev->dev, "%s: platform data missing\n", __func__); | ||
1106 | return; | ||
1107 | } | ||
1108 | |||
1109 | sr_info = _sr_lookup(pdata->voltdm); | ||
1110 | if (IS_ERR(sr_info)) { | ||
1111 | dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", | ||
1112 | __func__); | ||
1113 | return; | ||
1114 | } | ||
1115 | |||
1116 | if (sr_info->autocomp_active) | ||
1117 | sr_stop_vddautocomp(sr_info); | ||
1118 | |||
1119 | return; | ||
1120 | } | ||
1121 | |||
1122 | static struct platform_driver smartreflex_driver = { | ||
1123 | .remove = __devexit_p(omap_sr_remove), | ||
1124 | .shutdown = __devexit_p(omap_sr_shutdown), | ||
1125 | .driver = { | ||
1126 | .name = "smartreflex", | ||
1127 | }, | ||
1128 | }; | ||
1129 | |||
1130 | static int __init sr_init(void) | ||
1131 | { | ||
1132 | int ret = 0; | ||
1133 | |||
1134 | /* | ||
1135 | * sr_init is a late init. If by then a pmic specific API is not | ||
1136 | * registered either there is no need for anything to be done on | ||
1137 | * the PMIC side or somebody has forgotten to register a PMIC | ||
1138 | * handler. Warn for the second condition. | ||
1139 | */ | ||
1140 | if (sr_pmic_data && sr_pmic_data->sr_pmic_init) | ||
1141 | sr_pmic_data->sr_pmic_init(); | ||
1142 | else | ||
1143 | pr_warning("%s: No PMIC hook to init smartreflex\n", __func__); | ||
1144 | |||
1145 | ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe); | ||
1146 | if (ret) { | ||
1147 | pr_err("%s: platform driver register failed for SR\n", | ||
1148 | __func__); | ||
1149 | return ret; | ||
1150 | } | ||
1151 | |||
1152 | return 0; | ||
1153 | } | ||
1154 | late_initcall(sr_init); | ||
1155 | |||
1156 | static void __exit sr_exit(void) | ||
1157 | { | ||
1158 | platform_driver_unregister(&smartreflex_driver); | ||
1159 | } | ||
1160 | module_exit(sr_exit); | ||
1161 | |||
1162 | MODULE_DESCRIPTION("OMAP Smartreflex Driver"); | ||
1163 | MODULE_LICENSE("GPL"); | ||
1164 | MODULE_ALIAS("platform:" DRIVER_NAME); | ||
1165 | MODULE_AUTHOR("Texas Instruments Inc"); | ||