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authorNishanth Menon <nm@ti.com>2010-12-20 15:05:06 -0500
committerKevin Hilman <khilman@deeprootsystems.com>2010-12-21 17:45:50 -0500
commit458e999eb14a301d4176783c8fcb277f5d009b4e (patch)
tree7300efdef971f91e4d7601f9bc1174fe9716f313 /arch/arm/mach-omap2/sleep34xx.S
parent8cdfd83473d9b408b924b5d32777ac3fddd251ff (diff)
OMAP3630: PM: Erratum i608: disable RTA
Erratum id: i608 RTA (Retention Till Access) feature is not supported and leads to device stability issues when enabled. This impacts modules with embedded memories on OMAP3630 Workaround is to disable RTA on boot and coming out of core off. For disabling RTA coming out of off mode, we do this by overriding the restore pointer for 3630 as the first point of entry before caches are touched and is common for GP and HS devices. To disable earlier than this could be possible by modifying the PPA for HS devices, but not for GP devices. Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [ambresh@ti.com: co-developer] Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-omap2/sleep34xx.S')
-rw-r--r--arch/arm/mach-omap2/sleep34xx.S26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 24ecb0a5cce1..4abf447fddfc 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -45,6 +45,8 @@
45#define CM_IDLEST_CKGEN_V OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST) 45#define CM_IDLEST_CKGEN_V OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST)
46#define SRAM_BASE_P 0x40200000 46#define SRAM_BASE_P 0x40200000
47#define CONTROL_STAT 0x480022F0 47#define CONTROL_STAT 0x480022F0
48#define CONTROL_MEM_RTA_CTRL (OMAP343X_CTRL_BASE\
49 + OMAP36XX_CONTROL_MEM_RTA_CTRL)
48#define SCRATCHPAD_MEM_OFFS 0x310 /* Move this as correct place is 50#define SCRATCHPAD_MEM_OFFS 0x310 /* Move this as correct place is
49 * available */ 51 * available */
50#define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE + OMAP343X_CONTROL_MEM_WKUP\ 52#define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE + OMAP343X_CONTROL_MEM_WKUP\
@@ -99,6 +101,14 @@ ENTRY(get_restore_pointer)
99 ldmfd sp!, {pc} @ restore regs and return 101 ldmfd sp!, {pc} @ restore regs and return
100ENTRY(get_restore_pointer_sz) 102ENTRY(get_restore_pointer_sz)
101 .word . - get_restore_pointer 103 .word . - get_restore_pointer
104 .text
105/* Function call to get the restore pointer for 3630 resume from OFF */
106ENTRY(get_omap3630_restore_pointer)
107 stmfd sp!, {lr} @ save registers on stack
108 adr r0, restore_3630
109 ldmfd sp!, {pc} @ restore regs and return
110ENTRY(get_omap3630_restore_pointer_sz)
111 .word . - get_omap3630_restore_pointer
102 112
103 .text 113 .text
104/* Function call to get the restore pointer for for ES3 to resume from OFF */ 114/* Function call to get the restore pointer for for ES3 to resume from OFF */
@@ -246,6 +256,20 @@ copy_to_sram:
246 bne copy_to_sram 256 bne copy_to_sram
247 ldr r1, sram_base 257 ldr r1, sram_base
248 blx r1 258 blx r1
259 b restore
260
261restore_3630:
262 /*b restore_es3630*/ @ Enable to debug restore code
263 ldr r1, pm_prepwstst_core_p
264 ldr r2, [r1]
265 and r2, r2, #0x3
266 cmp r2, #0x0 @ Check if previous power state of CORE is OFF
267 bne restore
268 /* Disable RTA before giving control */
269 ldr r1, control_mem_rta
270 mov r2, #OMAP36XX_RTA_DISABLE
271 str r2, [r1]
272 /* Fall thru for the remaining logic */
249restore: 273restore:
250 /* b restore*/ @ Enable to debug restore code 274 /* b restore*/ @ Enable to debug restore code
251 /* Check what was the reason for mpu reset and store the reason in r9*/ 275 /* Check what was the reason for mpu reset and store the reason in r9*/
@@ -651,6 +675,8 @@ cache_pred_disable_mask:
651 .word 0xFFFFE7FB 675 .word 0xFFFFE7FB
652control_stat: 676control_stat:
653 .word CONTROL_STAT 677 .word CONTROL_STAT
678control_mem_rta:
679 .word CONTROL_MEM_RTA_CTRL
654kernel_flush: 680kernel_flush:
655 .word v7_flush_dcache_all 681 .word v7_flush_dcache_all
656 /* 682 /*