diff options
author | Andrei Emeltchenko <andrei.emeltchenko@nokia.com> | 2010-11-30 17:11:49 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2010-11-30 17:11:49 -0500 |
commit | 662b083a87a3489f3f19c6e0651c1b99b0de5df0 (patch) | |
tree | 67c7ba4784a1099f404c42ba1496c3078fa4af71 /arch/arm/mach-omap2/serial.c | |
parent | 498cb95175c29ed96bf32f30df2d11ec1c7f3879 (diff) |
omap: Serial: Define register access modes in LCR
Access to some registers depends on register access mode
Three different modes are available for OMAP (at least)
• Operational mode LCR_REG[7] = 0x0
• Configuration mode A LCR_REG[7] = 0x1 and LCR_REG[7:0]! = 0xBF
• Configuration mode B LCR_REG[7] = 0x1 and LCR_REG[7:0] = 0xBF
Define access modes and remove redefinitions and magic numbers
in serial drivers (and later in bluetooth driver).
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@nokia.com>
Acked-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/serial.c')
-rw-r--r-- | arch/arm/mach-omap2/serial.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index fa9806250b50..9dc077e2d8af 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -219,7 +219,7 @@ static void omap_uart_save_context(struct omap_uart_state *uart) | |||
219 | return; | 219 | return; |
220 | 220 | ||
221 | lcr = serial_read_reg(uart, UART_LCR); | 221 | lcr = serial_read_reg(uart, UART_LCR); |
222 | serial_write_reg(uart, UART_LCR, 0xBF); | 222 | serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B); |
223 | uart->dll = serial_read_reg(uart, UART_DLL); | 223 | uart->dll = serial_read_reg(uart, UART_DLL); |
224 | uart->dlh = serial_read_reg(uart, UART_DLM); | 224 | uart->dlh = serial_read_reg(uart, UART_DLM); |
225 | serial_write_reg(uart, UART_LCR, lcr); | 225 | serial_write_reg(uart, UART_LCR, lcr); |
@@ -227,7 +227,7 @@ static void omap_uart_save_context(struct omap_uart_state *uart) | |||
227 | uart->sysc = serial_read_reg(uart, UART_OMAP_SYSC); | 227 | uart->sysc = serial_read_reg(uart, UART_OMAP_SYSC); |
228 | uart->scr = serial_read_reg(uart, UART_OMAP_SCR); | 228 | uart->scr = serial_read_reg(uart, UART_OMAP_SCR); |
229 | uart->wer = serial_read_reg(uart, UART_OMAP_WER); | 229 | uart->wer = serial_read_reg(uart, UART_OMAP_WER); |
230 | serial_write_reg(uart, UART_LCR, 0x80); | 230 | serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_A); |
231 | uart->mcr = serial_read_reg(uart, UART_MCR); | 231 | uart->mcr = serial_read_reg(uart, UART_MCR); |
232 | serial_write_reg(uart, UART_LCR, lcr); | 232 | serial_write_reg(uart, UART_LCR, lcr); |
233 | 233 | ||
@@ -251,19 +251,19 @@ static void omap_uart_restore_context(struct omap_uart_state *uart) | |||
251 | else | 251 | else |
252 | serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); | 252 | serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); |
253 | 253 | ||
254 | serial_write_reg(uart, UART_LCR, 0xBF); /* Config B mode */ | 254 | serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B); |
255 | efr = serial_read_reg(uart, UART_EFR); | 255 | efr = serial_read_reg(uart, UART_EFR); |
256 | serial_write_reg(uart, UART_EFR, UART_EFR_ECB); | 256 | serial_write_reg(uart, UART_EFR, UART_EFR_ECB); |
257 | serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */ | 257 | serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */ |
258 | serial_write_reg(uart, UART_IER, 0x0); | 258 | serial_write_reg(uart, UART_IER, 0x0); |
259 | serial_write_reg(uart, UART_LCR, 0xBF); /* Config B mode */ | 259 | serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B); |
260 | serial_write_reg(uart, UART_DLL, uart->dll); | 260 | serial_write_reg(uart, UART_DLL, uart->dll); |
261 | serial_write_reg(uart, UART_DLM, uart->dlh); | 261 | serial_write_reg(uart, UART_DLM, uart->dlh); |
262 | serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */ | 262 | serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */ |
263 | serial_write_reg(uart, UART_IER, uart->ier); | 263 | serial_write_reg(uart, UART_IER, uart->ier); |
264 | serial_write_reg(uart, UART_LCR, 0x80); | 264 | serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_A); |
265 | serial_write_reg(uart, UART_MCR, uart->mcr); | 265 | serial_write_reg(uart, UART_MCR, uart->mcr); |
266 | serial_write_reg(uart, UART_LCR, 0xBF); /* Config B mode */ | 266 | serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B); |
267 | serial_write_reg(uart, UART_EFR, efr); | 267 | serial_write_reg(uart, UART_EFR, efr); |
268 | serial_write_reg(uart, UART_LCR, UART_LCR_WLEN8); | 268 | serial_write_reg(uart, UART_LCR, UART_LCR_WLEN8); |
269 | serial_write_reg(uart, UART_OMAP_SCR, uart->scr); | 269 | serial_write_reg(uart, UART_OMAP_SCR, uart->scr); |