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authorFrederic Weisbecker <fweisbec@gmail.com>2010-02-27 10:18:46 -0500
committerFrederic Weisbecker <fweisbec@gmail.com>2010-02-27 10:18:46 -0500
commit018cbffe6819f6f8db20a0a3acd9bab9bfd667e4 (patch)
treefadde2521591998dc653fa094c636e8a547e620d /arch/arm/mach-omap2/serial.c
parent1dd2980d990068e20045b90c424518cc7f3657ff (diff)
parent60b341b778cc2929df16c0a504c91621b3c6a4ad (diff)
Merge commit 'v2.6.33' into perf/core
Merge reason: __percpu annotations need the corresponding sparse address space definition upstream. Conflicts: tools/perf/util/probe-event.c (trivial)
Diffstat (limited to 'arch/arm/mach-omap2/serial.c')
-rw-r--r--arch/arm/mach-omap2/serial.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 8c964bec8159..e10a02df6e1d 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -36,7 +36,13 @@
36#define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52 36#define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52
37#define UART_OMAP_WER 0x17 /* Wake-up enable register */ 37#define UART_OMAP_WER 0x17 /* Wake-up enable register */
38 38
39#define DEFAULT_TIMEOUT (5 * HZ) 39/*
40 * NOTE: By default the serial timeout is disabled as it causes lost characters
41 * over the serial ports. This means that the UART clocks will stay on until
42 * disabled via sysfs. This also causes that any deeper omap sleep states are
43 * blocked.
44 */
45#define DEFAULT_TIMEOUT 0
40 46
41struct omap_uart_state { 47struct omap_uart_state {
42 int num; 48 int num;
@@ -422,7 +428,8 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
422 uart->timeout = DEFAULT_TIMEOUT; 428 uart->timeout = DEFAULT_TIMEOUT;
423 setup_timer(&uart->timer, omap_uart_idle_timer, 429 setup_timer(&uart->timer, omap_uart_idle_timer,
424 (unsigned long) uart); 430 (unsigned long) uart);
425 mod_timer(&uart->timer, jiffies + uart->timeout); 431 if (uart->timeout)
432 mod_timer(&uart->timer, jiffies + uart->timeout);
426 omap_uart_smart_idle_enable(uart, 0); 433 omap_uart_smart_idle_enable(uart, 0);
427 434
428 if (cpu_is_omap34xx()) { 435 if (cpu_is_omap34xx()) {