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authorGovindraj.R <govindraj.raja@ti.com>2011-11-07 08:25:05 -0500
committerKevin Hilman <khilman@ti.com>2011-12-14 18:49:02 -0500
commit7496ba309f2adbce74d917fbb8bd3da26222d49f (patch)
treef54dd8f5ad2da160e537ef0ca85562b6bdd4381c /arch/arm/mach-omap2/serial.c
parent273558b3a0399e368d99da5b3daf1c0e11b93e06 (diff)
ARM: OMAP2+: UART: Add default mux for all uarts.
Padconf wakeup is used to wakeup uart after uart fclks/iclks are gated. Rx-Pad wakeup was done by writing to rx-pad offset value populated in serial.c idle_init. Remove the direct reading and writing into rx pad. Remove the padconf field part of omap_uart_state struct and pad offsets populated. Now with mux framework support we can use mux_utilities along with hmwod framework to handle io-pad configuration and enable rx-pad wake-up mechanism. To avoid breaking any board support add default mux data for all uart's if mux info is not passed from board file. With the default pads populated in serial.c wakeup capability for rx pads is set, this can be used to enable uart_rx io-pad wakeup from hwmod framework. The pad values in 3430sdp/4430sdp/omap4panda board file are same as the default pad values populated in serial.c. Remove pad values from 3430sdp/4430sdp/omap4panda board file and use the default pads from serial.c file. Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/serial.c')
-rw-r--r--arch/arm/mach-omap2/serial.c155
1 files changed, 130 insertions, 25 deletions
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 5bdbc42e42a6..77feaab78059 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -62,7 +62,6 @@ struct omap_uart_state {
62 void __iomem *wk_st; 62 void __iomem *wk_st;
63 void __iomem *wk_en; 63 void __iomem *wk_en;
64 u32 wk_mask; 64 u32 wk_mask;
65 u32 padconf;
66 u32 dma_enabled; 65 u32 dma_enabled;
67 66
68 int clocked; 67 int clocked;
@@ -272,13 +271,6 @@ static void omap_uart_enable_wakeup(struct omap_uart_state *uart)
272 v |= uart->wk_mask; 271 v |= uart->wk_mask;
273 __raw_writel(v, uart->wk_en); 272 __raw_writel(v, uart->wk_en);
274 } 273 }
275
276 /* Ensure IOPAD wake-enables are set */
277 if (cpu_is_omap34xx() && uart->padconf) {
278 u16 v = omap_ctrl_readw(uart->padconf);
279 v |= OMAP3_PADCONF_WAKEUPENABLE0;
280 omap_ctrl_writew(v, uart->padconf);
281 }
282} 274}
283 275
284static void omap_uart_disable_wakeup(struct omap_uart_state *uart) 276static void omap_uart_disable_wakeup(struct omap_uart_state *uart)
@@ -289,13 +281,6 @@ static void omap_uart_disable_wakeup(struct omap_uart_state *uart)
289 v &= ~uart->wk_mask; 281 v &= ~uart->wk_mask;
290 __raw_writel(v, uart->wk_en); 282 __raw_writel(v, uart->wk_en);
291 } 283 }
292
293 /* Ensure IOPAD wake-enables are cleared */
294 if (cpu_is_omap34xx() && uart->padconf) {
295 u16 v = omap_ctrl_readw(uart->padconf);
296 v &= ~OMAP3_PADCONF_WAKEUPENABLE0;
297 omap_ctrl_writew(v, uart->padconf);
298 }
299} 284}
300 285
301static void omap_uart_smart_idle_enable(struct omap_uart_state *uart, 286static void omap_uart_smart_idle_enable(struct omap_uart_state *uart,
@@ -358,7 +343,6 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
358 if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx())) { 343 if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx())) {
359 u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD; 344 u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD;
360 u32 wk_mask = 0; 345 u32 wk_mask = 0;
361 u32 padconf = 0;
362 346
363 /* XXX These PRM accesses do not belong here */ 347 /* XXX These PRM accesses do not belong here */
364 uart->wk_en = OMAP34XX_PRM_REGADDR(mod, PM_WKEN1); 348 uart->wk_en = OMAP34XX_PRM_REGADDR(mod, PM_WKEN1);
@@ -366,23 +350,18 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
366 switch (uart->num) { 350 switch (uart->num) {
367 case 0: 351 case 0:
368 wk_mask = OMAP3430_ST_UART1_MASK; 352 wk_mask = OMAP3430_ST_UART1_MASK;
369 padconf = 0x182;
370 break; 353 break;
371 case 1: 354 case 1:
372 wk_mask = OMAP3430_ST_UART2_MASK; 355 wk_mask = OMAP3430_ST_UART2_MASK;
373 padconf = 0x17a;
374 break; 356 break;
375 case 2: 357 case 2:
376 wk_mask = OMAP3430_ST_UART3_MASK; 358 wk_mask = OMAP3430_ST_UART3_MASK;
377 padconf = 0x19e;
378 break; 359 break;
379 case 3: 360 case 3:
380 wk_mask = OMAP3630_ST_UART4_MASK; 361 wk_mask = OMAP3630_ST_UART4_MASK;
381 padconf = 0x0d2;
382 break; 362 break;
383 } 363 }
384 uart->wk_mask = wk_mask; 364 uart->wk_mask = wk_mask;
385 uart->padconf = padconf;
386 } else if (cpu_is_omap24xx()) { 365 } else if (cpu_is_omap24xx()) {
387 u32 wk_mask = 0; 366 u32 wk_mask = 0;
388 u32 wk_en = PM_WKEN1, wk_st = PM_WKST1; 367 u32 wk_en = PM_WKEN1, wk_st = PM_WKST1;
@@ -412,12 +391,10 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
412 uart->wk_en = NULL; 391 uart->wk_en = NULL;
413 uart->wk_st = NULL; 392 uart->wk_st = NULL;
414 uart->wk_mask = 0; 393 uart->wk_mask = 0;
415 uart->padconf = 0;
416 } 394 }
417} 395}
418 396
419#else 397#else
420static inline void omap_uart_idle_init(struct omap_uart_state *uart) {}
421static void omap_uart_block_sleep(struct omap_uart_state *uart) 398static void omap_uart_block_sleep(struct omap_uart_state *uart)
422{ 399{
423 /* Needed to enable UART clocks when built without CONFIG_PM */ 400 /* Needed to enable UART clocks when built without CONFIG_PM */
@@ -425,6 +402,130 @@ static void omap_uart_block_sleep(struct omap_uart_state *uart)
425} 402}
426#endif /* CONFIG_PM */ 403#endif /* CONFIG_PM */
427 404
405#ifdef CONFIG_OMAP_MUX
406static struct omap_device_pad default_uart1_pads[] __initdata = {
407 {
408 .name = "uart1_cts.uart1_cts",
409 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
410 },
411 {
412 .name = "uart1_rts.uart1_rts",
413 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
414 },
415 {
416 .name = "uart1_tx.uart1_tx",
417 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
418 },
419 {
420 .name = "uart1_rx.uart1_rx",
421 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
422 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
423 .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
424 },
425};
426
427static struct omap_device_pad default_uart2_pads[] __initdata = {
428 {
429 .name = "uart2_cts.uart2_cts",
430 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
431 },
432 {
433 .name = "uart2_rts.uart2_rts",
434 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
435 },
436 {
437 .name = "uart2_tx.uart2_tx",
438 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
439 },
440 {
441 .name = "uart2_rx.uart2_rx",
442 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
443 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
444 .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
445 },
446};
447
448static struct omap_device_pad default_uart3_pads[] __initdata = {
449 {
450 .name = "uart3_cts_rctx.uart3_cts_rctx",
451 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
452 },
453 {
454 .name = "uart3_rts_sd.uart3_rts_sd",
455 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
456 },
457 {
458 .name = "uart3_tx_irtx.uart3_tx_irtx",
459 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
460 },
461 {
462 .name = "uart3_rx_irrx.uart3_rx_irrx",
463 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
464 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
465 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
466 },
467};
468
469static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = {
470 {
471 .name = "gpmc_wait2.uart4_tx",
472 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
473 },
474 {
475 .name = "gpmc_wait3.uart4_rx",
476 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
477 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
478 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
479 },
480};
481
482static struct omap_device_pad default_omap4_uart4_pads[] __initdata = {
483 {
484 .name = "uart4_tx.uart4_tx",
485 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
486 },
487 {
488 .name = "uart4_rx.uart4_rx",
489 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
490 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
491 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
492 },
493};
494
495static void omap_serial_fill_default_pads(struct omap_board_data *bdata)
496{
497 switch (bdata->id) {
498 case 0:
499 bdata->pads = default_uart1_pads;
500 bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads);
501 break;
502 case 1:
503 bdata->pads = default_uart2_pads;
504 bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads);
505 break;
506 case 2:
507 bdata->pads = default_uart3_pads;
508 bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads);
509 break;
510 case 3:
511 if (cpu_is_omap44xx()) {
512 bdata->pads = default_omap4_uart4_pads;
513 bdata->pads_cnt =
514 ARRAY_SIZE(default_omap4_uart4_pads);
515 } else if (cpu_is_omap3630()) {
516 bdata->pads = default_omap36xx_uart4_pads;
517 bdata->pads_cnt =
518 ARRAY_SIZE(default_omap36xx_uart4_pads);
519 }
520 break;
521 default:
522 break;
523 }
524}
525#else
526static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}
527#endif
528
428static int __init omap_serial_early_init(void) 529static int __init omap_serial_early_init(void)
429{ 530{
430 int i = 0; 531 int i = 0;
@@ -547,8 +648,8 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
547 omap_uart_block_sleep(uart); 648 omap_uart_block_sleep(uart);
548 console_unlock(); 649 console_unlock();
549 650
550 if ((cpu_is_omap34xx() && uart->padconf) || 651 if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads) ||
551 (uart->wk_en && uart->wk_mask)) 652 (pdata->wk_en && pdata->wk_mask))
552 device_init_wakeup(&pdev->dev, true); 653 device_init_wakeup(&pdev->dev, true);
553 654
554 /* Enable the MDR1 errata for OMAP3 */ 655 /* Enable the MDR1 errata for OMAP3 */
@@ -573,6 +674,10 @@ void __init omap_serial_init(void)
573 bdata.flags = 0; 674 bdata.flags = 0;
574 bdata.pads = NULL; 675 bdata.pads = NULL;
575 bdata.pads_cnt = 0; 676 bdata.pads_cnt = 0;
677
678 if (cpu_is_omap44xx() || cpu_is_omap34xx())
679 omap_serial_fill_default_pads(&bdata);
680
576 omap_serial_init_port(&bdata); 681 omap_serial_init_port(&bdata);
577 682
578 } 683 }