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authorLinus Torvalds <torvalds@linux-foundation.org>2009-09-18 12:19:26 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-09-18 12:19:26 -0400
commit73c583e4e2dd0fbbf2fafe0cc57ff75314fe72df (patch)
treeb2fb05a6d199c0f6653fff84b67159af8f228760 /arch/arm/mach-omap2/serial.c
parent5ce00289875a853280985aee671258795b77e089 (diff)
parent1f685b36dbf27db55072fb738aac57aaf37d2c71 (diff)
Merge branch 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (47 commits) OMAP clock: use debugfs_remove_recursive() for rewinding OMAP2/3/4 core: create omap_device layer OMAP: omap_hwmod: call omap_hwmod init at boot; create interconnects OMAP2/3/4: create omap_hwmod layer OMAP2/3 board-*.c files: read bootloader configuration earlier OMAP2/3/4 PRCM: add module IDLEST wait code OMAP2/3 PM: create the OMAP PM interface and add a default OMAP PM no-op layer OMAP3 clock: remove superfluous calls to omap2_init_clk_clkdm OMAP clock: associate MPU clocks with the mpu_clkdm OMAP3 clock: Fixed processing of bootarg 'mpurate' OMAP: SDRC: Add several new register definitions OMAP: powerdomain: Fix overflow when doing powerdomain deps lookups. OMAP: PM: Added suspend target state control to debugfs for OMAP3 OMAP: PM debug: Add PRCM register dump support OMAP: PM debug: make powerdomains use PM-debug counters OMAP: PM: Add pm-debug counters OMAP: PM: Add closures to clkdm_for_each and pwrdm_for_each. OMAP: PM: Hook into PM counters OMAP: PM counter infrastructure. OMAP3: PM: fix lockdep warning caused by omap3_pm_init ...
Diffstat (limited to 'arch/arm/mach-omap2/serial.c')
-rw-r--r--arch/arm/mach-omap2/serial.c67
1 files changed, 48 insertions, 19 deletions
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index ce22344b94e7..3a529c77daa8 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -73,7 +73,7 @@ static LIST_HEAD(uart_list);
73 73
74static struct plat_serial8250_port serial_platform_data0[] = { 74static struct plat_serial8250_port serial_platform_data0[] = {
75 { 75 {
76 .membase = IO_ADDRESS(OMAP_UART1_BASE), 76 .membase = OMAP2_IO_ADDRESS(OMAP_UART1_BASE),
77 .mapbase = OMAP_UART1_BASE, 77 .mapbase = OMAP_UART1_BASE,
78 .irq = 72, 78 .irq = 72,
79 .flags = UPF_BOOT_AUTOCONF, 79 .flags = UPF_BOOT_AUTOCONF,
@@ -87,7 +87,7 @@ static struct plat_serial8250_port serial_platform_data0[] = {
87 87
88static struct plat_serial8250_port serial_platform_data1[] = { 88static struct plat_serial8250_port serial_platform_data1[] = {
89 { 89 {
90 .membase = IO_ADDRESS(OMAP_UART2_BASE), 90 .membase = OMAP2_IO_ADDRESS(OMAP_UART2_BASE),
91 .mapbase = OMAP_UART2_BASE, 91 .mapbase = OMAP_UART2_BASE,
92 .irq = 73, 92 .irq = 73,
93 .flags = UPF_BOOT_AUTOCONF, 93 .flags = UPF_BOOT_AUTOCONF,
@@ -101,7 +101,7 @@ static struct plat_serial8250_port serial_platform_data1[] = {
101 101
102static struct plat_serial8250_port serial_platform_data2[] = { 102static struct plat_serial8250_port serial_platform_data2[] = {
103 { 103 {
104 .membase = IO_ADDRESS(OMAP_UART3_BASE), 104 .membase = OMAP2_IO_ADDRESS(OMAP_UART3_BASE),
105 .mapbase = OMAP_UART3_BASE, 105 .mapbase = OMAP_UART3_BASE,
106 .irq = 74, 106 .irq = 74,
107 .flags = UPF_BOOT_AUTOCONF, 107 .flags = UPF_BOOT_AUTOCONF,
@@ -123,6 +123,21 @@ static struct plat_serial8250_port serial_platform_data2[] = {
123 } 123 }
124}; 124};
125 125
126#ifdef CONFIG_ARCH_OMAP4
127static struct plat_serial8250_port serial_platform_data3[] = {
128 {
129 .membase = IO_ADDRESS(OMAP_UART4_BASE),
130 .mapbase = OMAP_UART4_BASE,
131 .irq = 70,
132 .flags = UPF_BOOT_AUTOCONF,
133 .iotype = UPIO_MEM,
134 .regshift = 2,
135 .uartclk = OMAP24XX_BASE_BAUD * 16,
136 }, {
137 .flags = 0
138 }
139};
140#endif
126static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, 141static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
127 int offset) 142 int offset)
128{ 143{
@@ -470,7 +485,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
470 uart->padconf = 0; 485 uart->padconf = 0;
471 } 486 }
472 487
473 p->flags |= UPF_SHARE_IRQ; 488 p->irqflags |= IRQF_SHARED;
474 ret = request_irq(p->irq, omap_uart_interrupt, IRQF_SHARED, 489 ret = request_irq(p->irq, omap_uart_interrupt, IRQF_SHARED,
475 "serial idle", (void *)uart); 490 "serial idle", (void *)uart);
476 WARN_ON(ret); 491 WARN_ON(ret);
@@ -560,12 +575,22 @@ static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS] = {
560 }, 575 },
561 }, 576 },
562 }, 577 },
578#ifdef CONFIG_ARCH_OMAP4
579 {
580 .pdev = {
581 .name = "serial8250",
582 .id = 3
583 .dev = {
584 .platform_data = serial_platform_data3,
585 },
586 },
587 },
588#endif
563}; 589};
564 590
565void __init omap_serial_init(void) 591void __init omap_serial_early_init(void)
566{ 592{
567 int i; 593 int i;
568 const struct omap_uart_config *info;
569 char name[16]; 594 char name[16];
570 595
571 /* 596 /*
@@ -574,23 +599,12 @@ void __init omap_serial_init(void)
574 * if not needed. 599 * if not needed.
575 */ 600 */
576 601
577 info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
578
579 if (info == NULL)
580 return;
581
582 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { 602 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
583 struct omap_uart_state *uart = &omap_uart[i]; 603 struct omap_uart_state *uart = &omap_uart[i];
584 struct platform_device *pdev = &uart->pdev; 604 struct platform_device *pdev = &uart->pdev;
585 struct device *dev = &pdev->dev; 605 struct device *dev = &pdev->dev;
586 struct plat_serial8250_port *p = dev->platform_data; 606 struct plat_serial8250_port *p = dev->platform_data;
587 607
588 if (!(info->enabled_uarts & (1 << i))) {
589 p->membase = NULL;
590 p->mapbase = 0;
591 continue;
592 }
593
594 sprintf(name, "uart%d_ick", i+1); 608 sprintf(name, "uart%d_ick", i+1);
595 uart->ick = clk_get(NULL, name); 609 uart->ick = clk_get(NULL, name);
596 if (IS_ERR(uart->ick)) { 610 if (IS_ERR(uart->ick)) {
@@ -605,8 +619,11 @@ void __init omap_serial_init(void)
605 uart->fck = NULL; 619 uart->fck = NULL;
606 } 620 }
607 621
608 if (!uart->ick || !uart->fck) 622 /* FIXME: Remove this once the clkdev is ready */
609 continue; 623 if (!cpu_is_omap44xx()) {
624 if (!uart->ick || !uart->fck)
625 continue;
626 }
610 627
611 uart->num = i; 628 uart->num = i;
612 p->private_data = uart; 629 p->private_data = uart;
@@ -617,6 +634,18 @@ void __init omap_serial_init(void)
617 p->irq += 32; 634 p->irq += 32;
618 635
619 omap_uart_enable_clocks(uart); 636 omap_uart_enable_clocks(uart);
637 }
638}
639
640void __init omap_serial_init(void)
641{
642 int i;
643
644 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
645 struct omap_uart_state *uart = &omap_uart[i];
646 struct platform_device *pdev = &uart->pdev;
647 struct device *dev = &pdev->dev;
648
620 omap_uart_reset(uart); 649 omap_uart_reset(uart);
621 omap_uart_idle_init(uart); 650 omap_uart_idle_init(uart);
622 651