aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/serial.c
diff options
context:
space:
mode:
authorGovindraj R <govindraj.raja@ti.com>2010-08-02 06:18:11 -0400
committerTony Lindgren <tony@atomide.com>2010-08-02 06:18:11 -0400
commit5ade4ff593c8f91f7e1288c6bc9aff046b62e0d6 (patch)
treefd4cabfef1f84e9e7acb14c4728c4266b41c2dd7 /arch/arm/mach-omap2/serial.c
parentb075f58b2c0f377b4bfbe11b817e003393bcb489 (diff)
omap3: serial: Add context save and restore for mcr
Adds context save/restore for mcr register as state of mcr register is lost after core off. Signed-off-by: Govindraj R <govindraj.raja@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/serial.c')
-rw-r--r--arch/arm/mach-omap2/serial.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 3771254dfa81..804dbb21cee2 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -74,6 +74,7 @@ struct omap_uart_state {
74 u16 sysc; 74 u16 sysc;
75 u16 scr; 75 u16 scr;
76 u16 wer; 76 u16 wer;
77 u16 mcr;
77#endif 78#endif
78}; 79};
79 80
@@ -197,6 +198,9 @@ static void omap_uart_save_context(struct omap_uart_state *uart)
197 uart->sysc = serial_read_reg(p, UART_OMAP_SYSC); 198 uart->sysc = serial_read_reg(p, UART_OMAP_SYSC);
198 uart->scr = serial_read_reg(p, UART_OMAP_SCR); 199 uart->scr = serial_read_reg(p, UART_OMAP_SCR);
199 uart->wer = serial_read_reg(p, UART_OMAP_WER); 200 uart->wer = serial_read_reg(p, UART_OMAP_WER);
201 serial_write_reg(p, UART_LCR, 0x80);
202 uart->mcr = serial_read_reg(p, UART_MCR);
203 serial_write_reg(p, UART_LCR, lcr);
200 204
201 uart->context_valid = 1; 205 uart->context_valid = 1;
202} 206}
@@ -225,6 +229,8 @@ static void omap_uart_restore_context(struct omap_uart_state *uart)
225 serial_write_reg(p, UART_DLM, uart->dlh); 229 serial_write_reg(p, UART_DLM, uart->dlh);
226 serial_write_reg(p, UART_LCR, 0x0); /* Operational mode */ 230 serial_write_reg(p, UART_LCR, 0x0); /* Operational mode */
227 serial_write_reg(p, UART_IER, uart->ier); 231 serial_write_reg(p, UART_IER, uart->ier);
232 serial_write_reg(p, UART_LCR, 0x80);
233 serial_write_reg(p, UART_MCR, uart->mcr);
228 serial_write_reg(p, UART_FCR, 0xA1); 234 serial_write_reg(p, UART_FCR, 0xA1);
229 serial_write_reg(p, UART_LCR, 0xBF); /* Config B mode */ 235 serial_write_reg(p, UART_LCR, 0xBF); /* Config B mode */
230 serial_write_reg(p, UART_EFR, efr); 236 serial_write_reg(p, UART_EFR, efr);