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authorvikram pandita <vikram.pandita@ti.com>2009-11-22 13:11:32 -0500
committerTony Lindgren <tony@atomide.com>2009-11-22 13:24:33 -0500
commit5f35fbe8b8a05743fb9686e33194a126cd4273f6 (patch)
tree815c2428deabf4fed11b55f97578735f667173ef /arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h
parent6b61a83b31744d143b0e7bc92f463d831319eabc (diff)
omap3: zoom: Introduce zoom3 board support
Zoom3 is the next version of Zoom2 board. There has been a silicon update from zoom2 to zoom3. Zoom2 has OMAP34xx Zoom3 has OMAP3630 [1] Zoom3 = OMAP3630 SOM board [2] + same zoom2 main board [3] + same debugboard Zoom3 has a SDRAM part from Hynix Zoom2 had SDRAM part from micron Hynix memory timings are contributed by: Chalhoub, Nicole and Bour, Vincent Reuse the zoom2 files as much for zoom3, as at board level, there is no change at all. References: (courtesy Nishant Menon) [1] OMAP3630 http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12836&contentId=52606 [2] SOM boards http://logicpd.com/products/system-modules/texas-instruments-omap35x-som-lv [3] Zoom2 boards http://logicpd.com/products/development-kits/texas-instruments-zoom%E2%84%A2-omap34x-ii-mdp OMAP3630: Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Cc: Nicole Chalhoub <n-chalhoub@ti.com> Cc: Vincent Bour <v-bour@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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diff --git a/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h b/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h
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1/*
2 * SDRC register values for the Hynix H8MBX00U0MER-0EM
3 *
4 * Copyright (C) 2009 Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM
12#define __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM
13
14#include <plat/sdrc.h>
15
16/* Hynix H8MBX00U0MER-0EM */
17static struct omap_sdrc_params h8mbx00u0mer0em_sdrc_params[] = {
18 [0] = {
19 .rate = 200000000,
20 .actim_ctrla = 0xa2e1b4c6,
21 .actim_ctrlb = 0x0002131c,
22 .rfr_ctrl = 0x0005e601,
23 .mr = 0x00000032,
24 },
25 [1] = {
26 .rate = 166000000,
27 .actim_ctrla = 0x629db4c6,
28 .actim_ctrlb = 0x00012214,
29 .rfr_ctrl = 0x0004dc01,
30 .mr = 0x00000032,
31 },
32 [2] = {
33 .rate = 100000000,
34 .actim_ctrla = 0x51912284,
35 .actim_ctrlb = 0x0002120e,
36 .rfr_ctrl = 0x0002d101,
37 .mr = 0x00000022,
38 },
39 [3] = {
40 .rate = 83000000,
41 .actim_ctrla = 0x31512283,
42 .actim_ctrlb = 0x0001220a,
43 .rfr_ctrl = 0x00025501,
44 .mr = 0x00000022,
45 },
46 [4] = {
47 .rate = 0
48 },
49};
50
51#endif