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authorTony Lindgren <tony@atomide.com>2012-04-03 12:49:32 -0400
committerTony Lindgren <tony@atomide.com>2012-04-03 12:49:32 -0400
commite9dad875daa0728b49fb20c6ad22d88d2186eed6 (patch)
tree9a48fa057b4ac15a0f2399091b351f6d3632a8ae /arch/arm/mach-omap2/prm44xx.c
parentdd775ae2549217d3ae09363e3edb305d0fa19928 (diff)
parent553e322282655f213d131903ce7019aa25880273 (diff)
Merge branch 'misc_devel_3.4' of git://git.pwsan.com/linux-2.6 into fixes
Diffstat (limited to 'arch/arm/mach-omap2/prm44xx.c')
-rw-r--r--arch/arm/mach-omap2/prm44xx.c21
1 files changed, 11 insertions, 10 deletions
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index eac623c7c3d8..f106d21ff581 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -147,8 +147,9 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs)
147 u32 mask, st; 147 u32 mask, st;
148 148
149 /* XXX read mask from RAM? */ 149 /* XXX read mask from RAM? */
150 mask = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqen_offs); 150 mask = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
151 st = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqst_offs); 151 irqen_offs);
152 st = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, irqst_offs);
152 153
153 return mask & st; 154 return mask & st;
154} 155}
@@ -180,7 +181,7 @@ void omap44xx_prm_read_pending_irqs(unsigned long *events)
180 */ 181 */
181void omap44xx_prm_ocp_barrier(void) 182void omap44xx_prm_ocp_barrier(void)
182{ 183{
183 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, 184 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
184 OMAP4_REVISION_PRM_OFFSET); 185 OMAP4_REVISION_PRM_OFFSET);
185} 186}
186 187
@@ -198,19 +199,19 @@ void omap44xx_prm_ocp_barrier(void)
198void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask) 199void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
199{ 200{
200 saved_mask[0] = 201 saved_mask[0] =
201 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, 202 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
202 OMAP4_PRM_IRQSTATUS_MPU_OFFSET); 203 OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
203 saved_mask[1] = 204 saved_mask[1] =
204 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, 205 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
205 OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET); 206 OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET);
206 207
207 omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST, 208 omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
208 OMAP4_PRM_IRQENABLE_MPU_OFFSET); 209 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
209 omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST, 210 omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
210 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); 211 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
211 212
212 /* OCP barrier */ 213 /* OCP barrier */
213 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, 214 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
214 OMAP4_REVISION_PRM_OFFSET); 215 OMAP4_REVISION_PRM_OFFSET);
215} 216}
216 217
@@ -226,9 +227,9 @@ void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
226 */ 227 */
227void omap44xx_prm_restore_irqen(u32 *saved_mask) 228void omap44xx_prm_restore_irqen(u32 *saved_mask)
228{ 229{
229 omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_DEVICE_INST, 230 omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_OCP_SOCKET_INST,
230 OMAP4_PRM_IRQENABLE_MPU_OFFSET); 231 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
231 omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_DEVICE_INST, 232 omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_OCP_SOCKET_INST,
232 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); 233 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
233} 234}
234 235