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authorTero Kristo <t-kristo@ti.com>2011-12-16 16:37:00 -0500
committerPaul Walmsley <paul@pwsan.com>2011-12-16 16:37:00 -0500
commit2f31b51659c2d8315ea2888ba5b93076febe672b (patch)
treee8f62efcd447f79f4e49fda5bb702d8634a6c98a /arch/arm/mach-omap2/prm44xx.c
parent22f51371f8c35869ed850f46aa76b6cc2b502110 (diff)
ARM: OMAP4: PRM: use PRCM interrupt handler
Use the new PRCM interrupt handler code on OMAP4 systems. The OMAP code will need to be converted to use sparse IRQs for this to work. Until that time, the following message will appear on boot: PRCM: failed to allocate irq descs: -12 Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> [paul@pwsan.com: split this from a previous patch to this patch; call omap4xxx_prcm_init() during init; write trivial commit log] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/prm44xx.c')
-rw-r--r--arch/arm/mach-omap2/prm44xx.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index c4be5d94a019..040c39ce7326 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -27,6 +27,24 @@
27#include "prcm44xx.h" 27#include "prcm44xx.h"
28#include "prminst44xx.h" 28#include "prminst44xx.h"
29 29
30static const struct omap_prcm_irq omap4_prcm_irqs[] = {
31 OMAP_PRCM_IRQ("wkup", 0, 0),
32 OMAP_PRCM_IRQ("io", 9, 1),
33};
34
35static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
36 .ack = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
37 .mask = OMAP4_PRM_IRQENABLE_MPU_OFFSET,
38 .nr_regs = 2,
39 .irqs = omap4_prcm_irqs,
40 .nr_irqs = ARRAY_SIZE(omap4_prcm_irqs),
41 .irq = OMAP44XX_IRQ_PRCM,
42 .read_pending_irqs = &omap44xx_prm_read_pending_irqs,
43 .ocp_barrier = &omap44xx_prm_ocp_barrier,
44 .save_and_clear_irqen = &omap44xx_prm_save_and_clear_irqen,
45 .restore_irqen = &omap44xx_prm_restore_irqen,
46};
47
30/* PRM low-level functions */ 48/* PRM low-level functions */
31 49
32/* Read a register in a CM/PRM instance in the PRM module */ 50/* Read a register in a CM/PRM instance in the PRM module */
@@ -211,3 +229,11 @@ void omap44xx_prm_restore_irqen(u32 *saved_mask)
211 omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_DEVICE_INST, 229 omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_DEVICE_INST,
212 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); 230 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
213} 231}
232
233static int __init omap4xxx_prcm_init(void)
234{
235 if (cpu_is_omap44xx())
236 return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);
237 return 0;
238}
239subsys_initcall(omap4xxx_prcm_init);