diff options
author | Vaibhav Bedia <vaibhav.bedia@ti.com> | 2013-01-29 06:15:06 -0500 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2013-02-08 09:25:28 -0500 |
commit | 3c06f1b8c3ca74669b77c0aaee428b5c46d3e552 (patch) | |
tree | 1cd374358db5df5be0b821d664d856b7f92df865 /arch/arm/mach-omap2/prm33xx.c | |
parent | 3077fe69d7055b2ab118b299613394e13f4983a8 (diff) |
ARM: OMAP2+: AM33XX: Update the hardreset API
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the hardreset API to ensure that the reset line properly
deasserted.
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/prm33xx.c')
-rw-r--r-- | arch/arm/mach-omap2/prm33xx.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c index 1ac73883f891..44c0d7216aa7 100644 --- a/arch/arm/mach-omap2/prm33xx.c +++ b/arch/arm/mach-omap2/prm33xx.c | |||
@@ -110,11 +110,11 @@ int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs) | |||
110 | * -EINVAL upon an argument error, -EEXIST if the submodule was already out | 110 | * -EINVAL upon an argument error, -EEXIST if the submodule was already out |
111 | * of reset, or -EBUSY if the submodule did not exit reset promptly. | 111 | * of reset, or -EBUSY if the submodule did not exit reset promptly. |
112 | */ | 112 | */ |
113 | int am33xx_prm_deassert_hardreset(u8 shift, s16 inst, | 113 | int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst, |
114 | u16 rstctrl_offs, u16 rstst_offs) | 114 | u16 rstctrl_offs, u16 rstst_offs) |
115 | { | 115 | { |
116 | int c; | 116 | int c; |
117 | u32 mask = 1 << shift; | 117 | u32 mask = 1 << st_shift; |
118 | 118 | ||
119 | /* Check the current status to avoid de-asserting the line twice */ | 119 | /* Check the current status to avoid de-asserting the line twice */ |
120 | if (am33xx_prm_is_hardreset_asserted(shift, inst, rstctrl_offs) == 0) | 120 | if (am33xx_prm_is_hardreset_asserted(shift, inst, rstctrl_offs) == 0) |
@@ -122,11 +122,14 @@ int am33xx_prm_deassert_hardreset(u8 shift, s16 inst, | |||
122 | 122 | ||
123 | /* Clear the reset status by writing 1 to the status bit */ | 123 | /* Clear the reset status by writing 1 to the status bit */ |
124 | am33xx_prm_rmw_reg_bits(0xffffffff, mask, inst, rstst_offs); | 124 | am33xx_prm_rmw_reg_bits(0xffffffff, mask, inst, rstst_offs); |
125 | |||
125 | /* de-assert the reset control line */ | 126 | /* de-assert the reset control line */ |
127 | mask = 1 << shift; | ||
128 | |||
126 | am33xx_prm_rmw_reg_bits(mask, 0, inst, rstctrl_offs); | 129 | am33xx_prm_rmw_reg_bits(mask, 0, inst, rstctrl_offs); |
127 | /* wait the status to be set */ | ||
128 | 130 | ||
129 | omap_test_timeout(am33xx_prm_is_hardreset_asserted(shift, inst, | 131 | /* wait the status to be set */ |
132 | omap_test_timeout(am33xx_prm_is_hardreset_asserted(st_shift, inst, | ||
130 | rstst_offs), | 133 | rstst_offs), |
131 | MAX_MODULE_HARDRESET_WAIT, c); | 134 | MAX_MODULE_HARDRESET_WAIT, c); |
132 | 135 | ||