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authorKevin Hilman <khilman@ti.com>2011-03-28 13:25:12 -0400
committerKevin Hilman <khilman@ti.com>2011-09-15 15:02:07 -0400
commit4bb73adec43bbf63d39e1c2021de0aab0c60ea34 (patch)
treedc05e399041841aaebe773c4ac37fd86e82777d2 /arch/arm/mach-omap2/prm2xxx_3xxx.h
parent842ec22852cf843558828e6f7a6da2bf72f341a5 (diff)
OMAP2+: PRM: add register access functions for VC/VP
On OMAP3+, the voltage controller (VC) and voltage processor (VP) are inside the PRM. Add some PRM helper functions for register access to these module registers. Thanks to Nishanth Menon for finding/fixing a sparse problem. Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/prm2xxx_3xxx.h')
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 51125268632b..cef533df0861 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -307,7 +307,15 @@ extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
307u32 omap3_prm_vp_check_txdone(u8 vp_id); 307u32 omap3_prm_vp_check_txdone(u8 vp_id);
308void omap3_prm_vp_clear_txdone(u8 vp_id); 308void omap3_prm_vp_clear_txdone(u8 vp_id);
309 309
310/*
311 * OMAP3 access functions for voltage controller (VC) and
312 * voltage proccessor (VP) in the PRM.
313 */
314extern u32 omap3_prm_vcvp_read(u8 offset);
315extern void omap3_prm_vcvp_write(u32 val, u8 offset);
316extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
310#endif /* CONFIG_ARCH_OMAP4 */ 317#endif /* CONFIG_ARCH_OMAP4 */
318
311#endif 319#endif
312 320
313/* 321/*