ARM: OMAP2/3: PRM: fix bogus OMAP2xxx powerstate return values

On OMAP2xxx chips, the register bitfields for the
PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED are
different than those used on OMAP3/4.  The order is reversed.  So, for
example, on OMAP2xxx, 0x0 indicates 'ON'; but on OMAP3/4, 0x0
indicates 'OFF'.  Similarly, on OMAP2xxx, 0x3 indicates 'OFF', but on
OMAP3/4, 0x3 indicates 'ON'.

To fix this, we treat the OMAP3/4 values as the powerdomain API
values, and create new low-level powerdomain functions for the
OMAP2xxx chips which translate between the OMAP2xxx values and the
OMAP3/4 values.

Without this patch, the conversion of the OMAP2xxx PM code to the
functional powerstate code results in a non-booting kernel.

Signed-off-by: Paul Walmsley <paul@pwsan.com>

1 files changed, 85 insertions, 3 deletions

diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index faeab18696df..00cd4fcbda0f 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -29,6 +29,14 @@
 #include "prm-regbits-24xx.h"
 
 /*
+ * OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits -
+ * these are reversed from the bits used on OMAP3+
+ */
+#define OMAP24XX_PWRDM_POWER_ON                 0x0
+#define OMAP24XX_PWRDM_POWER_RET                0x1
+#define OMAP24XX_PWRDM_POWER_OFF                0x3
+
+/*
  * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP
  *   hardware register (which are specific to the OMAP2xxx SoCs) to
  *   reset source ID bit shifts (which is an OMAP SoC-independent
@@ -69,6 +77,34 @@ static u32 omap2xxx_prm_read_reset_sources(void)
 }
 
 /**
+ * omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst
+ * @omap2xxx_pwrst: OMAP2xxx hardware power state to convert
+ *
+ * Return the common power state bits corresponding to the OMAP2xxx
+ * hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error.
+ */
+static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
+{
+        u8 pwrst;
+
+        switch (omap2xxx_pwrst) {
+        case OMAP24XX_PWRDM_POWER_OFF:
+                pwrst = PWRDM_POWER_OFF;
+                break;
+        case OMAP24XX_PWRDM_POWER_RET:
+                pwrst = PWRDM_POWER_RET;
+                break;
+        case OMAP24XX_PWRDM_POWER_ON:
+                pwrst = PWRDM_POWER_ON;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        return pwrst;
+}
+
+/**
  * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
  *
  * Set the DPLL reset bit, which should reboot the SoC.  This is the
@@ -98,10 +134,56 @@ int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm)
         return 0;
 }
 
+static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
+{
+        u8 omap24xx_pwrst;
+
+        switch (pwrst) {
+        case PWRDM_POWER_OFF:
+                omap24xx_pwrst = OMAP24XX_PWRDM_POWER_OFF;
+                break;
+        case PWRDM_POWER_RET:
+                omap24xx_pwrst = OMAP24XX_PWRDM_POWER_RET;
+                break;
+        case PWRDM_POWER_ON:
+                omap24xx_pwrst = OMAP24XX_PWRDM_POWER_ON;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
+                                   (omap24xx_pwrst << OMAP_POWERSTATE_SHIFT),
+                                   pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
+        return 0;
+}
+
+static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
+{
+        u8 omap2xxx_pwrst;
+
+        omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+                                                       OMAP2_PM_PWSTCTRL,
+                                                       OMAP_POWERSTATE_MASK);
+
+        return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
+}
+
+static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
+{
+        u8 omap2xxx_pwrst;
+
+        omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+                                                       OMAP2_PM_PWSTST,
+                                                       OMAP_POWERSTATEST_MASK);
+
+        return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
+}
+
 struct pwrdm_ops omap2_pwrdm_operations = {
-        .pwrdm_set_next_pwrst   = omap2_pwrdm_set_next_pwrst,
-        .pwrdm_read_next_pwrst  = omap2_pwrdm_read_next_pwrst,
-        .pwrdm_read_pwrst       = omap2_pwrdm_read_pwrst,
+        .pwrdm_set_next_pwrst   = omap2xxx_pwrdm_set_next_pwrst,
+        .pwrdm_read_next_pwrst  = omap2xxx_pwrdm_read_next_pwrst,
+        .pwrdm_read_pwrst       = omap2xxx_pwrdm_read_pwrst,
         .pwrdm_set_logic_retst  = omap2_pwrdm_set_logic_retst,
         .pwrdm_set_mem_onst     = omap2_pwrdm_set_mem_onst,
         .pwrdm_set_mem_retst    = omap2_pwrdm_set_mem_retst,