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authorTony Lindgren <tony@atomide.com>2008-07-03 05:24:38 -0400
committerTony Lindgren <tony@atomide.com>2008-07-03 05:24:38 -0400
commitc2d43e39c7c303db53facd0bea44b66f263e3f35 (patch)
tree10b0b5a5dde1176f925b5aedcda32963f7c80029 /arch/arm/mach-omap2/prm.h
parent373a67021d00a8b8c86bfa19f8914377de05b4bd (diff)
ARM: OMAP: SRAM: Split sram24xx.S into sram242x.S and sram243x.S
Split sram24xx.S into sram242x.S and sram243x.S Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/prm.h')
-rw-r--r--arch/arm/mach-omap2/prm.h18
1 files changed, 17 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 618f8111658a..dcdb35bfa0c0 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -38,13 +38,29 @@
38 * 38 *
39 */ 39 */
40 40
41/* Global 24xx registers in GR_MOD (Same as OCP_MOD for 24xx) */
42#define OMAP24XX_PRCM_VOLTCTRL_OFFSET 0x0050
43#define OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET 0x0080
44
45/* 242x GR_MOD registers, use these only for assembly code */
46#define OMAP242X_PRCM_VOLTCTRL OMAP2420_PRM_REGADDR(OMAP24XX_GR_MOD, \
47 OMAP24XX_PRCM_VOLTCTRL_OFFSET)
48#define OMAP242X_PRCM_CLKCFG_CTRL OMAP2420_PRM_REGADDR(OMAP24XX_GR_MOD, \
49 OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET)
50
51/* 243x GR_MOD registers, use these only for assembly code */
52#define OMAP243X_PRCM_VOLTCTRL OMAP2430_PRM_REGADDR(OMAP24XX_GR_MOD, \
53 OMAP24XX_PRCM_VOLTCTRL_OFFSET)
54#define OMAP243X_PRCM_CLKCFG_CTRL OMAP2430_PRM_REGADDR(OMAP24XX_GR_MOD, \
55 OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET)
56
57/* These will disappear */
41#define OMAP24XX_PRCM_REVISION OMAP_PRM_REGADDR(OCP_MOD, 0x0000) 58#define OMAP24XX_PRCM_REVISION OMAP_PRM_REGADDR(OCP_MOD, 0x0000)
42#define OMAP24XX_PRCM_SYSCONFIG OMAP_PRM_REGADDR(OCP_MOD, 0x0010) 59#define OMAP24XX_PRCM_SYSCONFIG OMAP_PRM_REGADDR(OCP_MOD, 0x0010)
43 60
44#define OMAP24XX_PRCM_IRQSTATUS_MPU OMAP_PRM_REGADDR(OCP_MOD, 0x0018) 61#define OMAP24XX_PRCM_IRQSTATUS_MPU OMAP_PRM_REGADDR(OCP_MOD, 0x0018)
45#define OMAP24XX_PRCM_IRQENABLE_MPU OMAP_PRM_REGADDR(OCP_MOD, 0x001c) 62#define OMAP24XX_PRCM_IRQENABLE_MPU OMAP_PRM_REGADDR(OCP_MOD, 0x001c)
46 63
47#define OMAP24XX_PRCM_VOLTCTRL OMAP_PRM_REGADDR(OCP_MOD, 0x0050)
48#define OMAP24XX_PRCM_VOLTST OMAP_PRM_REGADDR(OCP_MOD, 0x0054) 64#define OMAP24XX_PRCM_VOLTST OMAP_PRM_REGADDR(OCP_MOD, 0x0054)
49#define OMAP24XX_PRCM_CLKSRC_CTRL OMAP_PRM_REGADDR(OCP_MOD, 0x0060) 65#define OMAP24XX_PRCM_CLKSRC_CTRL OMAP_PRM_REGADDR(OCP_MOD, 0x0060)
50#define OMAP24XX_PRCM_CLKOUT_CTRL OMAP_PRM_REGADDR(OCP_MOD, 0x0070) 66#define OMAP24XX_PRCM_CLKOUT_CTRL OMAP_PRM_REGADDR(OCP_MOD, 0x0070)