ARM: OMAP4: PM: OMAP4 Power Domain Porting Related Clean-up.

Module offsets were same for OMAP2 and OMAP3 while they differ for OMAP4.
Hence we need different macros for identifying platform specific offsets.

Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>

1 files changed, 14 insertions, 3 deletions

diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index cf466ea1dffc..b4ba14974b37 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -11,6 +11,7 @@
  * Rajendra Nayak <rnayak@ti.com>
  *
  * Some pieces of code Copyright (C) 2005 Texas Instruments, Inc.
+ * Upgraded with OMAP4 support by Abhijit Pagare <abhijitpagare@ti.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -121,7 +122,10 @@ struct omap3_prcm_regs prcm_context;
 u32 omap_prcm_get_reset_sources(void)
 {
         /* XXX This presumably needs modification for 34XX */
-        return prm_read_mod_reg(WKUP_MOD, RM_RSTST) & 0x7f;
+        if (cpu_is_omap24xx() | cpu_is_omap34xx())
+                return prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST) & 0x7f;
+        if (cpu_is_omap44xx())
+                return prm_read_mod_reg(WKUP_MOD, OMAP4_RM_RSTST) & 0x7f;
 }
 EXPORT_SYMBOL(omap_prcm_get_reset_sources);
 
@@ -144,10 +148,17 @@ void omap_prcm_arch_reset(char mode)
                  * cf. OMAP34xx TRM, Initialization / Software Booting
                  * Configuration. */
                 omap_writel(l, OMAP343X_SCRATCHPAD + 4);
-        } else
+        } else if (cpu_is_omap44xx())
+                prcm_offs = OMAP4430_PRM_DEVICE_MOD;
+        else
                 WARN_ON(1);
 
-        prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs, RM_RSTCTRL);
+        if (cpu_is_omap24xx() | cpu_is_omap34xx())
+                prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs,
+                                                 OMAP2_RM_RSTCTRL);
+        if (cpu_is_omap44xx())
+                prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs,
+                                                 OMAP4_RM_RSTCTRL);
 }
 
 static inline u32 __omap_prcm_read(void __iomem *base, s16 module, u16 reg)