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authorLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 17:39:59 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 17:39:59 -0500
commitb3c37522928b5452588fc202eaa0f11f6e339256 (patch)
tree37bfe21d9977b15271903d1a4b304289a232e364 /arch/arm/mach-omap2/prcm-common.h
parent2ac9d7aaccbd598b5bd19ac40761b723bb675442 (diff)
parent6d0a5636fba5a3f82ec80ab124dd4748344549c3 (diff)
Merge tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
power management changes for omap and imx A significant part of the changes for these two platforms went into power management, so they are split out into a separate branch. * tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (65 commits) ARM: imx6: remove __CPUINIT annotation from v7_invalidate_l1 ARM: imx6: fix v7_invalidate_l1 by adding I-Cache invalidation ARM: imx6q: resume PL310 only when CACHE_L2X0 defined ARM: imx6q: build pm code only when CONFIG_PM selected ARM: mx5: use generic irq chip pm interface for pm functions on ARM: omap: pass minimal SoC/board data for UART from dt arm/dts: Add minimal device tree support for omap2420 and omap2430 omap-serial: Add minimal device tree support omap-serial: Use default clock speed (48Mhz) if not specified omap-serial: Get rid of all pdev->id usage ARM: OMAP2+: hwmod: Add a new flag to handle hwmods left enabled at init ARM: OMAP4: PRM: use PRCM interrupt handler ARM: OMAP3: pm: use prcm chain handler ARM: OMAP: hwmod: add support for selecting mpu_irq for each wakeup pad ARM: OMAP2+: mux: add support for PAD wakeup interrupts ARM: OMAP: PRCM: add suspend prepare / finish support ARM: OMAP: PRCM: add support for chain interrupt handler ARM: OMAP3/4: PRM: add functions to read pending IRQs, PRM barrier ARM: OMAP2+: hwmod: Add API to enable IO ring wakeup ARM: OMAP2+: mux: add wakeup-capable hwmod mux entries to dynamic list ...
Diffstat (limited to 'arch/arm/mach-omap2/prcm-common.h')
-rw-r--r--arch/arm/mach-omap2/prcm-common.h75
1 files changed, 74 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index da2d80f5fcbd..5aa5435e3ff1 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -4,7 +4,7 @@
4/* 4/*
5 * OMAP2/3 PRCM base and module definitions 5 * OMAP2/3 PRCM base and module definitions
6 * 6 *
7 * Copyright (C) 2007-2009 Texas Instruments, Inc. 7 * Copyright (C) 2007-2009, 2011 Texas Instruments, Inc.
8 * Copyright (C) 2007-2009 Nokia Corporation 8 * Copyright (C) 2007-2009 Nokia Corporation
9 * 9 *
10 * Written by Paul Walmsley 10 * Written by Paul Walmsley
@@ -410,6 +410,79 @@
410extern void __iomem *prm_base; 410extern void __iomem *prm_base;
411extern void __iomem *cm_base; 411extern void __iomem *cm_base;
412extern void __iomem *cm2_base; 412extern void __iomem *cm2_base;
413
414/**
415 * struct omap_prcm_irq - describes a PRCM interrupt bit
416 * @name: a short name describing the interrupt type, e.g. "wkup" or "io"
417 * @offset: the bit shift of the interrupt inside the IRQ{ENABLE,STATUS} regs
418 * @priority: should this interrupt be handled before @priority=false IRQs?
419 *
420 * Describes interrupt bits inside the PRM_IRQ{ENABLE,STATUS}_MPU* registers.
421 * On systems with multiple PRM MPU IRQ registers, the bitfields read from
422 * the registers are concatenated, so @offset could be > 31 on these systems -
423 * see omap_prm_irq_handler() for more details. I/O ring interrupts should
424 * have @priority set to true.
425 */
426struct omap_prcm_irq {
427 const char *name;
428 unsigned int offset;
429 bool priority;
430};
431
432/**
433 * struct omap_prcm_irq_setup - PRCM interrupt controller details
434 * @ack: PRM register offset for the first PRM_IRQSTATUS_MPU register
435 * @mask: PRM register offset for the first PRM_IRQENABLE_MPU register
436 * @nr_regs: number of PRM_IRQ{STATUS,ENABLE}_MPU* registers
437 * @nr_irqs: number of entries in the @irqs array
438 * @irqs: ptr to an array of PRCM interrupt bits (see @nr_irqs)
439 * @irq: MPU IRQ asserted when a PRCM interrupt arrives
440 * @read_pending_irqs: fn ptr to determine if any PRCM IRQs are pending
441 * @ocp_barrier: fn ptr to force buffered PRM writes to complete
442 * @save_and_clear_irqen: fn ptr to save and clear IRQENABLE regs
443 * @restore_irqen: fn ptr to save and clear IRQENABLE regs
444 * @saved_mask: IRQENABLE regs are saved here during suspend
445 * @priority_mask: 1 bit per IRQ, set to 1 if omap_prcm_irq.priority = true
446 * @base_irq: base dynamic IRQ number, returned from irq_alloc_descs() in init
447 * @suspended: set to true after Linux suspend code has called our ->prepare()
448 * @suspend_save_flag: set to true after IRQ masks have been saved and disabled
449 *
450 * @saved_mask, @priority_mask, @base_irq, @suspended, and
451 * @suspend_save_flag are populated dynamically, and are not to be
452 * specified in static initializers.
453 */
454struct omap_prcm_irq_setup {
455 u16 ack;
456 u16 mask;
457 u8 nr_regs;
458 u8 nr_irqs;
459 const struct omap_prcm_irq *irqs;
460 int irq;
461 void (*read_pending_irqs)(unsigned long *events);
462 void (*ocp_barrier)(void);
463 void (*save_and_clear_irqen)(u32 *saved_mask);
464 void (*restore_irqen)(u32 *saved_mask);
465 u32 *saved_mask;
466 u32 *priority_mask;
467 int base_irq;
468 bool suspended;
469 bool suspend_save_flag;
470};
471
472/* OMAP_PRCM_IRQ: convenience macro for creating struct omap_prcm_irq records */
473#define OMAP_PRCM_IRQ(_name, _offset, _priority) { \
474 .name = _name, \
475 .offset = _offset, \
476 .priority = _priority \
477 }
478
479extern void omap_prcm_irq_cleanup(void);
480extern int omap_prcm_register_chain_handler(
481 struct omap_prcm_irq_setup *irq_setup);
482extern int omap_prcm_event_to_irq(const char *event);
483extern void omap_prcm_irq_prepare(void);
484extern void omap_prcm_irq_complete(void);
485
413# endif 486# endif
414 487
415#endif 488#endif