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authorRajendra Nayak <rnayak@ti.com>2010-05-18 22:24:03 -0400
committerPaul Walmsley <paul@pwsan.com>2010-05-20 14:31:13 -0400
commit90dbc7b0b80725afd7ed52f18e541dbc671dfd70 (patch)
treecc4627d059e2102434b16d623b4fff3b9032776c /arch/arm/mach-omap2/powerdomains44xx.h
parent71ee297a9bc69748510179f5333a3f4541c27723 (diff)
OMAP4 powerdomain: Support LOWPOWERSTATECHANGE for powerdomains
Some powerdomains in OMAP4 support a direct transition from one sleep state to another deeper sleep state without having to wakeup the powerdomain. This patch adds an api in the powerdomain framework to set the LOWPOWERSTATECHANGE bit in PWRSTCTRL register. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/powerdomains44xx.h')
-rw-r--r--arch/arm/mach-omap2/powerdomains44xx.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/powerdomains44xx.h b/arch/arm/mach-omap2/powerdomains44xx.h
index ad5a2655ad44..c7219513472a 100644
--- a/arch/arm/mach-omap2/powerdomains44xx.h
+++ b/arch/arm/mach-omap2/powerdomains44xx.h
@@ -54,6 +54,7 @@ static struct powerdomain core_44xx_pwrdm = {
54 [3] = PWRDM_POWER_ON, /* ducati_l2ram */ 54 [3] = PWRDM_POWER_ON, /* ducati_l2ram */
55 [4] = PWRDM_POWER_ON, /* ducati_unicache */ 55 [4] = PWRDM_POWER_ON, /* ducati_unicache */
56 }, 56 },
57 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
57}; 58};
58 59
59/* gfx_44xx_pwrdm: 3D accelerator power domain */ 60/* gfx_44xx_pwrdm: 3D accelerator power domain */
@@ -69,6 +70,7 @@ static struct powerdomain gfx_44xx_pwrdm = {
69 .pwrsts_mem_on = { 70 .pwrsts_mem_on = {
70 [0] = PWRDM_POWER_ON, /* gfx_mem */ 71 [0] = PWRDM_POWER_ON, /* gfx_mem */
71 }, 72 },
73 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
72}; 74};
73 75
74/* abe_44xx_pwrdm: Audio back end power domain */ 76/* abe_44xx_pwrdm: Audio back end power domain */
@@ -87,6 +89,7 @@ static struct powerdomain abe_44xx_pwrdm = {
87 [0] = PWRDM_POWER_ON, /* aessmem */ 89 [0] = PWRDM_POWER_ON, /* aessmem */
88 [1] = PWRDM_POWER_ON, /* periphmem */ 90 [1] = PWRDM_POWER_ON, /* periphmem */
89 }, 91 },
92 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
90}; 93};
91 94
92/* dss_44xx_pwrdm: Display subsystem power domain */ 95/* dss_44xx_pwrdm: Display subsystem power domain */
@@ -103,6 +106,7 @@ static struct powerdomain dss_44xx_pwrdm = {
103 .pwrsts_mem_on = { 106 .pwrsts_mem_on = {
104 [0] = PWRDM_POWER_ON, /* dss_mem */ 107 [0] = PWRDM_POWER_ON, /* dss_mem */
105 }, 108 },
109 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
106}; 110};
107 111
108/* tesla_44xx_pwrdm: Tesla processor power domain */ 112/* tesla_44xx_pwrdm: Tesla processor power domain */
@@ -123,6 +127,7 @@ static struct powerdomain tesla_44xx_pwrdm = {
123 [1] = PWRDM_POWER_ON, /* tesla_l1 */ 127 [1] = PWRDM_POWER_ON, /* tesla_l1 */
124 [2] = PWRDM_POWER_ON, /* tesla_l2 */ 128 [2] = PWRDM_POWER_ON, /* tesla_l2 */
125 }, 129 },
130 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
126}; 131};
127 132
128/* wkup_44xx_pwrdm: Wake-up power domain */ 133/* wkup_44xx_pwrdm: Wake-up power domain */
@@ -227,6 +232,7 @@ static struct powerdomain ivahd_44xx_pwrdm = {
227 [2] = PWRDM_POWER_ON, /* tcm1_mem */ 232 [2] = PWRDM_POWER_ON, /* tcm1_mem */
228 [3] = PWRDM_POWER_ON, /* tcm2_mem */ 233 [3] = PWRDM_POWER_ON, /* tcm2_mem */
229 }, 234 },
235 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
230}; 236};
231 237
232/* cam_44xx_pwrdm: Camera subsystem power domain */ 238/* cam_44xx_pwrdm: Camera subsystem power domain */
@@ -242,6 +248,7 @@ static struct powerdomain cam_44xx_pwrdm = {
242 .pwrsts_mem_on = { 248 .pwrsts_mem_on = {
243 [0] = PWRDM_POWER_ON, /* cam_mem */ 249 [0] = PWRDM_POWER_ON, /* cam_mem */
244 }, 250 },
251 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
245}; 252};
246 253
247/* l3init_44xx_pwrdm: L3 initators pheripherals power domain */ 254/* l3init_44xx_pwrdm: L3 initators pheripherals power domain */
@@ -258,6 +265,7 @@ static struct powerdomain l3init_44xx_pwrdm = {
258 .pwrsts_mem_on = { 265 .pwrsts_mem_on = {
259 [0] = PWRDM_POWER_ON, /* l3init_bank1 */ 266 [0] = PWRDM_POWER_ON, /* l3init_bank1 */
260 }, 267 },
268 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
261}; 269};
262 270
263/* l4per_44xx_pwrdm: Target peripherals power domain */ 271/* l4per_44xx_pwrdm: Target peripherals power domain */
@@ -276,6 +284,7 @@ static struct powerdomain l4per_44xx_pwrdm = {
276 [0] = PWRDM_POWER_ON, /* nonretained_bank */ 284 [0] = PWRDM_POWER_ON, /* nonretained_bank */
277 [1] = PWRDM_POWER_ON, /* retained_bank */ 285 [1] = PWRDM_POWER_ON, /* retained_bank */
278 }, 286 },
287 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
279}; 288};
280 289
281/* 290/*