diff options
author | Paul Walmsley <paul@pwsan.com> | 2008-08-19 04:08:42 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2008-08-19 04:08:42 -0400 |
commit | fe6a58f8f50500a4c9a82da4a9bdae41c1500fa0 (patch) | |
tree | d088e9400557dc877c134897b287b61fd69522c7 /arch/arm/mach-omap2/powerdomains24xx.h | |
parent | 9717100f77538bbee54d2b5c293fd829b252d2a6 (diff) |
ARM: OMAP2: Powerdomain: Add OMAP2 powerdomains
Add OMAP2-specific powerdomains.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/powerdomains24xx.h')
-rw-r--r-- | arch/arm/mach-omap2/powerdomains24xx.h | 200 |
1 files changed, 200 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/powerdomains24xx.h b/arch/arm/mach-omap2/powerdomains24xx.h new file mode 100644 index 000000000000..9f08dc3f7fd2 --- /dev/null +++ b/arch/arm/mach-omap2/powerdomains24xx.h | |||
@@ -0,0 +1,200 @@ | |||
1 | /* | ||
2 | * OMAP24XX powerdomain definitions | ||
3 | * | ||
4 | * Copyright (C) 2007-2008 Texas Instruments, Inc. | ||
5 | * Copyright (C) 2007-2008 Nokia Corporation | ||
6 | * | ||
7 | * Written by Paul Walmsley | ||
8 | * Debugging and integration fixes by Jouni Högander | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS24XX | ||
16 | #define ARCH_ARM_MACH_OMAP2_POWERDOMAINS24XX | ||
17 | |||
18 | /* | ||
19 | * N.B. If powerdomains are added or removed from this file, update | ||
20 | * the array in mach-omap2/powerdomains.h. | ||
21 | */ | ||
22 | |||
23 | #include <mach/powerdomain.h> | ||
24 | |||
25 | #include "prcm-common.h" | ||
26 | #include "prm.h" | ||
27 | #include "prm-regbits-24xx.h" | ||
28 | #include "cm.h" | ||
29 | #include "cm-regbits-24xx.h" | ||
30 | |||
31 | /* 24XX powerdomains and dependencies */ | ||
32 | |||
33 | #ifdef CONFIG_ARCH_OMAP24XX | ||
34 | |||
35 | |||
36 | /* Wakeup dependency source arrays */ | ||
37 | |||
38 | /* | ||
39 | * 2420/2430 PM_WKDEP_DSP: CORE, MPU, WKUP | ||
40 | * 2430 PM_WKDEP_MDM: same as above | ||
41 | */ | ||
42 | static struct pwrdm_dep dsp_mdm_24xx_wkdeps[] = { | ||
43 | { | ||
44 | .pwrdm_name = "core_pwrdm", | ||
45 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) | ||
46 | }, | ||
47 | { | ||
48 | .pwrdm_name = "mpu_pwrdm", | ||
49 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) | ||
50 | }, | ||
51 | { | ||
52 | .pwrdm_name = "wkup_pwrdm", | ||
53 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) | ||
54 | }, | ||
55 | { NULL }, | ||
56 | }; | ||
57 | |||
58 | /* | ||
59 | * 2420 PM_WKDEP_MPU: CORE, DSP, WKUP | ||
60 | * 2430 adds MDM | ||
61 | */ | ||
62 | static struct pwrdm_dep mpu_24xx_wkdeps[] = { | ||
63 | { | ||
64 | .pwrdm_name = "core_pwrdm", | ||
65 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) | ||
66 | }, | ||
67 | { | ||
68 | .pwrdm_name = "dsp_pwrdm", | ||
69 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) | ||
70 | }, | ||
71 | { | ||
72 | .pwrdm_name = "wkup_pwrdm", | ||
73 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) | ||
74 | }, | ||
75 | { | ||
76 | .pwrdm_name = "mdm_pwrdm", | ||
77 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
78 | }, | ||
79 | { NULL }, | ||
80 | }; | ||
81 | |||
82 | /* | ||
83 | * 2420 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP | ||
84 | * 2430 adds MDM | ||
85 | */ | ||
86 | static struct pwrdm_dep core_24xx_wkdeps[] = { | ||
87 | { | ||
88 | .pwrdm_name = "dsp_pwrdm", | ||
89 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) | ||
90 | }, | ||
91 | { | ||
92 | .pwrdm_name = "gfx_pwrdm", | ||
93 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) | ||
94 | }, | ||
95 | { | ||
96 | .pwrdm_name = "mpu_pwrdm", | ||
97 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) | ||
98 | }, | ||
99 | { | ||
100 | .pwrdm_name = "wkup_pwrdm", | ||
101 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) | ||
102 | }, | ||
103 | { | ||
104 | .pwrdm_name = "mdm_pwrdm", | ||
105 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
106 | }, | ||
107 | { NULL }, | ||
108 | }; | ||
109 | |||
110 | |||
111 | /* Powerdomains */ | ||
112 | |||
113 | static struct powerdomain dsp_pwrdm = { | ||
114 | .name = "dsp_pwrdm", | ||
115 | .prcm_offs = OMAP24XX_DSP_MOD, | ||
116 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), | ||
117 | .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT, | ||
118 | .wkdep_srcs = dsp_mdm_24xx_wkdeps, | ||
119 | .pwrsts = PWRSTS_OFF_RET_ON, | ||
120 | .pwrsts_logic_ret = PWRDM_POWER_RET, | ||
121 | .banks = 1, | ||
122 | .pwrsts_mem_ret = { | ||
123 | [0] = PWRDM_POWER_RET, | ||
124 | }, | ||
125 | .pwrsts_mem_on = { | ||
126 | [0] = PWRDM_POWER_ON, | ||
127 | }, | ||
128 | }; | ||
129 | |||
130 | static struct powerdomain mpu_24xx_pwrdm = { | ||
131 | .name = "mpu_pwrdm", | ||
132 | .prcm_offs = MPU_MOD, | ||
133 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), | ||
134 | .dep_bit = OMAP24XX_EN_MPU_SHIFT, | ||
135 | .wkdep_srcs = mpu_24xx_wkdeps, | ||
136 | .pwrsts = PWRSTS_OFF_RET_ON, | ||
137 | .pwrsts_logic_ret = PWRSTS_OFF_RET, | ||
138 | .banks = 1, | ||
139 | .pwrsts_mem_ret = { | ||
140 | [0] = PWRDM_POWER_RET, | ||
141 | }, | ||
142 | .pwrsts_mem_on = { | ||
143 | [0] = PWRDM_POWER_ON, | ||
144 | }, | ||
145 | }; | ||
146 | |||
147 | static struct powerdomain core_24xx_pwrdm = { | ||
148 | .name = "core_pwrdm", | ||
149 | .prcm_offs = CORE_MOD, | ||
150 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), | ||
151 | .wkdep_srcs = core_24xx_wkdeps, | ||
152 | .pwrsts = PWRSTS_OFF_RET_ON, | ||
153 | .dep_bit = OMAP24XX_EN_CORE_SHIFT, | ||
154 | .banks = 3, | ||
155 | .pwrsts_mem_ret = { | ||
156 | [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */ | ||
157 | [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */ | ||
158 | [2] = PWRSTS_OFF_RET, /* MEM3RETSTATE */ | ||
159 | }, | ||
160 | .pwrsts_mem_on = { | ||
161 | [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ | ||
162 | [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ | ||
163 | [2] = PWRSTS_OFF_RET_ON, /* MEM3ONSTATE */ | ||
164 | }, | ||
165 | }; | ||
166 | |||
167 | #endif /* CONFIG_ARCH_OMAP24XX */ | ||
168 | |||
169 | |||
170 | |||
171 | /* | ||
172 | * 2430-specific powerdomains | ||
173 | */ | ||
174 | |||
175 | #ifdef CONFIG_ARCH_OMAP2430 | ||
176 | |||
177 | /* XXX 2430 KILLDOMAINWKUP bit? No current users apparently */ | ||
178 | |||
179 | /* Another case of bit name collisions between several registers: EN_MDM */ | ||
180 | static struct powerdomain mdm_pwrdm = { | ||
181 | .name = "mdm_pwrdm", | ||
182 | .prcm_offs = OMAP2430_MDM_MOD, | ||
183 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
184 | .dep_bit = OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT, | ||
185 | .wkdep_srcs = dsp_mdm_24xx_wkdeps, | ||
186 | .pwrsts = PWRSTS_OFF_RET_ON, | ||
187 | .pwrsts_logic_ret = PWRDM_POWER_RET, | ||
188 | .banks = 1, | ||
189 | .pwrsts_mem_ret = { | ||
190 | [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ | ||
191 | }, | ||
192 | .pwrsts_mem_on = { | ||
193 | [0] = PWRDM_POWER_ON, /* MEMONSTATE */ | ||
194 | }, | ||
195 | }; | ||
196 | |||
197 | #endif /* CONFIG_ARCH_OMAP2430 */ | ||
198 | |||
199 | |||
200 | #endif | ||