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authorPaul Walmsley <paul@pwsan.com>2010-12-21 23:05:14 -0500
committerPaul Walmsley <paul@pwsan.com>2010-12-21 23:05:14 -0500
commita64bb9cda8b12f599766c7dfe81770d2082a133a (patch)
tree29886a8c126757dde407a315220e69d1b6a4554a /arch/arm/mach-omap2/powerdomain44xx.c
parentc4d7e58fb52c632d8e33cd23a4917d7a7f8302ac (diff)
OMAP4: powerdomains: add PRCM partition data; use OMAP4 PRM functions
OMAP4 powerdomain control registers are split between the PRM hardware module and the PRCM_MPU local PRCM. Add this PRCM partition information to each OMAP4 powerdomain record, and convert the OMAP4 powerdomain function implementations to use the OMAP4 PRM instance functions. Also fixes a potential null pointer dereference of pwrdm->name. The autogeneration scripts have been updated. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: BenoƮt Cousson <b-cousson@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Rajendra Nayak <rnayak@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/powerdomain44xx.c')
-rw-r--r--arch/arm/mach-omap2/powerdomain44xx.c122
1 files changed, 84 insertions, 38 deletions
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c
index 4c5ab1a2d44b..28bf5e3b000c 100644
--- a/arch/arm/mach-omap2/powerdomain44xx.c
+++ b/arch/arm/mach-omap2/powerdomain44xx.c
@@ -20,48 +20,70 @@
20#include <plat/prcm.h> 20#include <plat/prcm.h>
21#include "prm2xxx_3xxx.h" 21#include "prm2xxx_3xxx.h"
22#include "prm44xx.h" 22#include "prm44xx.h"
23#include "prminst44xx.h"
23#include "prm-regbits-44xx.h" 24#include "prm-regbits-44xx.h"
24#include "powerdomains.h" 25#include "powerdomains.h"
25 26
26static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) 27static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
27{ 28{
28 omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, 29 omap4_prminst_rmw_inst_reg_bits(OMAP_POWERSTATE_MASK,
29 (pwrst << OMAP_POWERSTATE_SHIFT), 30 (pwrst << OMAP_POWERSTATE_SHIFT),
30 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); 31 pwrdm->prcm_partition,
32 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
31 return 0; 33 return 0;
32} 34}
33 35
34static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) 36static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
35{ 37{
36 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, 38 u32 v;
37 OMAP4_PM_PWSTCTRL, OMAP_POWERSTATE_MASK); 39
40 v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
41 OMAP4_PM_PWSTCTRL);
42 v &= OMAP_POWERSTATE_MASK;
43 v >>= OMAP_POWERSTATE_SHIFT;
44
45 return v;
38} 46}
39 47
40static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm) 48static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm)
41{ 49{
42 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, 50 u32 v;
43 OMAP4_PM_PWSTST, OMAP_POWERSTATEST_MASK); 51
52 v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
53 OMAP4_PM_PWSTST);
54 v &= OMAP_POWERSTATEST_MASK;
55 v >>= OMAP_POWERSTATEST_SHIFT;
56
57 return v;
44} 58}
45 59
46static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) 60static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
47{ 61{
48 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, 62 u32 v;
49 OMAP4430_LASTPOWERSTATEENTERED_MASK); 63
64 v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
65 OMAP4_PM_PWSTST);
66 v &= OMAP4430_LASTPOWERSTATEENTERED_MASK;
67 v >>= OMAP4430_LASTPOWERSTATEENTERED_SHIFT;
68
69 return v;
50} 70}
51 71
52static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) 72static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
53{ 73{
54 omap2_prm_rmw_mod_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK, 74 omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK,
55 (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT), 75 (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT),
56 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); 76 pwrdm->prcm_partition,
77 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
57 return 0; 78 return 0;
58} 79}
59 80
60static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) 81static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
61{ 82{
62 omap2_prm_rmw_mod_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK, 83 omap4_prminst_rmw_inst_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK,
63 OMAP4430_LASTPOWERSTATEENTERED_MASK, 84 OMAP4430_LASTPOWERSTATEENTERED_MASK,
64 pwrdm->prcm_offs, OMAP4_PM_PWSTST); 85 pwrdm->prcm_partition,
86 pwrdm->prcm_offs, OMAP4_PM_PWSTST);
65 return 0; 87 return 0;
66} 88}
67 89
@@ -70,69 +92,91 @@ static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
70 u32 v; 92 u32 v;
71 93
72 v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK); 94 v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK);
73 omap2_prm_rmw_mod_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v, 95 omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v,
74 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); 96 pwrdm->prcm_partition, pwrdm->prcm_offs,
97 OMAP4_PM_PWSTCTRL);
75 98
76 return 0; 99 return 0;
77} 100}
78 101
79static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, 102static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
80 u8 pwrst) 103 u8 pwrst)
81{ 104{
82 u32 m; 105 u32 m;
83 106
84 m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); 107 m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
85 108
86 omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, 109 omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)),
87 OMAP4_PM_PWSTCTRL); 110 pwrdm->prcm_partition, pwrdm->prcm_offs,
111 OMAP4_PM_PWSTCTRL);
88 112
89 return 0; 113 return 0;
90} 114}
91 115
92static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, 116static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
93 u8 pwrst) 117 u8 pwrst)
94{ 118{
95 u32 m; 119 u32 m;
96 120
97 m = omap2_pwrdm_get_mem_bank_retst_mask(bank); 121 m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
98 122
99 omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, 123 omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)),
100 OMAP4_PM_PWSTCTRL); 124 pwrdm->prcm_partition, pwrdm->prcm_offs,
125 OMAP4_PM_PWSTCTRL);
101 126
102 return 0; 127 return 0;
103} 128}
104 129
105static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) 130static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
106{ 131{
107 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, 132 u32 v;
108 OMAP4430_LOGICSTATEST_MASK); 133
134 v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
135 OMAP4_PM_PWSTST);
136 v &= OMAP4430_LOGICSTATEST_MASK;
137 v >>= OMAP4430_LOGICSTATEST_SHIFT;
138
139 return v;
109} 140}
110 141
111static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm) 142static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
112{ 143{
113 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, 144 u32 v;
114 OMAP4_PM_PWSTCTRL, 145
115 OMAP4430_LOGICRETSTATE_MASK); 146 v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
147 OMAP4_PM_PWSTCTRL);
148 v &= OMAP4430_LOGICRETSTATE_MASK;
149 v >>= OMAP4430_LOGICRETSTATE_SHIFT;
150
151 return v;
116} 152}
117 153
118static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) 154static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
119{ 155{
120 u32 m; 156 u32 m, v;
121 157
122 m = omap2_pwrdm_get_mem_bank_stst_mask(bank); 158 m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
123 159
124 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, 160 v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
125 m); 161 OMAP4_PM_PWSTST);
162 v &= m;
163 v >>= __ffs(m);
164
165 return v;
126} 166}
127 167
128static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) 168static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
129{ 169{
130 u32 m; 170 u32 m, v;
131 171
132 m = omap2_pwrdm_get_mem_bank_retst_mask(bank); 172 m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
133 173
134 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, 174 v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
135 OMAP4_PM_PWSTCTRL, m); 175 OMAP4_PM_PWSTCTRL);
176 v &= m;
177 v >>= __ffs(m);
178
179 return v;
136} 180}
137 181
138static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm) 182static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
@@ -146,14 +190,16 @@ static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
146 */ 190 */
147 191
148 /* XXX Is this udelay() value meaningful? */ 192 /* XXX Is this udelay() value meaningful? */
149 while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP4_PM_PWSTST) & 193 while ((omap4_prminst_read_inst_reg(pwrdm->prcm_partition,
194 pwrdm->prcm_offs,
195 OMAP4_PM_PWSTST) &
150 OMAP_INTRANSITION_MASK) && 196 OMAP_INTRANSITION_MASK) &&
151 (c++ < PWRDM_TRANSITION_BAILOUT)) 197 (c++ < PWRDM_TRANSITION_BAILOUT))
152 udelay(1); 198 udelay(1);
153 199
154 if (c > PWRDM_TRANSITION_BAILOUT) { 200 if (c > PWRDM_TRANSITION_BAILOUT) {
155 printk(KERN_ERR "powerdomain: waited too long for " 201 printk(KERN_ERR "powerdomain: waited too long for "
156 "powerdomain %s to complete transition\n", pwrdm->name); 202 "powerdomain %s to complete transition\n", pwrdm->name);
157 return -EAGAIN; 203 return -EAGAIN;
158 } 204 }
159 205