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authorRajendra Nayak <rnayak@ti.com>2010-12-21 22:01:19 -0500
committerPaul Walmsley <paul@pwsan.com>2010-12-21 22:01:19 -0500
commit9b7fc907d9378f86eb6b823bbe84ec9ed584b091 (patch)
treeb4519c2eb01d58ca4a407048bcb3fd83cf846e1f /arch/arm/mach-omap2/powerdomain44xx.c
parent12627578523d2d9396cae76b1dad0ed3dccf1730 (diff)
OMAP: powerdomain: Arch specific funcs for mem control
Define the following architecture specific funtions for omap2/3/4 .pwrdm_set_mem_onst .pwrdm_set_mem_retst .pwrdm_read_mem_pwrst .pwrdm_read_prev_mem_pwrst .pwrdm_read_mem_retst .pwrdm_clear_all_prev_pwrst .pwrdm_enable_hdwr_sar .pwrdm_disable_hdwr_sar .pwrdm_wait_transition .pwrdm_set_lowpwrstchange Convert the platform-independent framework to call these functions. Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: rearranged Makefile changes] Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/powerdomain44xx.c')
-rw-r--r--arch/arm/mach-omap2/powerdomain44xx.c85
1 files changed, 85 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c
index 996790acebc9..123a25f3b96f 100644
--- a/arch/arm/mach-omap2/powerdomain44xx.c
+++ b/arch/arm/mach-omap2/powerdomain44xx.c
@@ -47,6 +47,14 @@ static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
47 OMAP4430_LASTPOWERSTATEENTERED_MASK); 47 OMAP4430_LASTPOWERSTATEENTERED_MASK);
48} 48}
49 49
50static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
51{
52 prm_rmw_mod_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK,
53 (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT),
54 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
55 return 0;
56}
57
50static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) 58static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
51{ 59{
52 u32 v; 60 u32 v;
@@ -58,6 +66,32 @@ static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
58 return 0; 66 return 0;
59} 67}
60 68
69static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
70 u8 pwrst)
71{
72 u32 m;
73
74 m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
75
76 prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
77 OMAP4_PM_PWSTCTRL);
78
79 return 0;
80}
81
82static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
83 u8 pwrst)
84{
85 u32 m;
86
87 m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
88
89 prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
90 OMAP4_PM_PWSTCTRL);
91
92 return 0;
93}
94
61static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) 95static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
62{ 96{
63 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, 97 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
@@ -70,12 +104,63 @@ static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
70 OMAP4430_LOGICRETSTATE_MASK); 104 OMAP4430_LOGICRETSTATE_MASK);
71} 105}
72 106
107static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
108{
109 u32 m;
110
111 m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
112
113 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, m);
114}
115
116static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
117{
118 u32 m;
119
120 m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
121
122 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL, m);
123}
124
125static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
126{
127 u32 c = 0;
128
129 /*
130 * REVISIT: pwrdm_wait_transition() may be better implemented
131 * via a callback and a periodic timer check -- how long do we expect
132 * powerdomain transitions to take?
133 */
134
135 /* XXX Is this udelay() value meaningful? */
136 while ((prm_read_mod_reg(pwrdm->prcm_offs, OMAP4_PM_PWSTST) &
137 OMAP_INTRANSITION_MASK) &&
138 (c++ < PWRDM_TRANSITION_BAILOUT))
139 udelay(1);
140
141 if (c > PWRDM_TRANSITION_BAILOUT) {
142 printk(KERN_ERR "powerdomain: waited too long for "
143 "powerdomain %s to complete transition\n", pwrdm->name);
144 return -EAGAIN;
145 }
146
147 pr_debug("powerdomain: completed transition in %d loops\n", c);
148
149 return 0;
150}
151
73struct pwrdm_ops omap4_pwrdm_operations = { 152struct pwrdm_ops omap4_pwrdm_operations = {
74 .pwrdm_set_next_pwrst = omap4_pwrdm_set_next_pwrst, 153 .pwrdm_set_next_pwrst = omap4_pwrdm_set_next_pwrst,
75 .pwrdm_read_next_pwrst = omap4_pwrdm_read_next_pwrst, 154 .pwrdm_read_next_pwrst = omap4_pwrdm_read_next_pwrst,
76 .pwrdm_read_pwrst = omap4_pwrdm_read_pwrst, 155 .pwrdm_read_pwrst = omap4_pwrdm_read_pwrst,
77 .pwrdm_read_prev_pwrst = omap4_pwrdm_read_prev_pwrst, 156 .pwrdm_read_prev_pwrst = omap4_pwrdm_read_prev_pwrst,
157 .pwrdm_set_lowpwrstchange = omap4_pwrdm_set_lowpwrstchange,
78 .pwrdm_set_logic_retst = omap4_pwrdm_set_logic_retst, 158 .pwrdm_set_logic_retst = omap4_pwrdm_set_logic_retst,
79 .pwrdm_read_logic_pwrst = omap4_pwrdm_read_logic_pwrst, 159 .pwrdm_read_logic_pwrst = omap4_pwrdm_read_logic_pwrst,
80 .pwrdm_read_logic_retst = omap4_pwrdm_read_logic_retst, 160 .pwrdm_read_logic_retst = omap4_pwrdm_read_logic_retst,
161 .pwrdm_read_mem_pwrst = omap4_pwrdm_read_mem_pwrst,
162 .pwrdm_read_mem_retst = omap4_pwrdm_read_mem_retst,
163 .pwrdm_set_mem_onst = omap4_pwrdm_set_mem_onst,
164 .pwrdm_set_mem_retst = omap4_pwrdm_set_mem_retst,
165 .pwrdm_wait_transition = omap4_pwrdm_wait_transition,
81}; 166};