diff options
author | Paul Walmsley <paul@pwsan.com> | 2010-12-21 23:05:14 -0500 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2010-12-21 23:05:14 -0500 |
commit | c4d7e58fb52c632d8e33cd23a4917d7a7f8302ac (patch) | |
tree | 20a56db9f93ff411fc439ea1961b1e51f2ecf15b /arch/arm/mach-omap2/powerdomain2xxx_3xxx.c | |
parent | dac9a77120e2724e22696f06f3ecb4838da1e3e4 (diff) |
OMAP2/3: PRM/CM: prefix OMAP2 PRM/CM functions with "omap2_"
Now that OMAP4-specific PRCM functions have been added, distinguish the
existing OMAP2/3-specific PRCM functions by prefixing them with "omap2_".
This patch should not result in any functional change.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jarkko Nikula <jhnikula@gmail.com>
Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/powerdomain2xxx_3xxx.c')
-rw-r--r-- | arch/arm/mach-omap2/powerdomain2xxx_3xxx.c | 66 |
1 files changed, 38 insertions, 28 deletions
diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c index 838ac758c513..b5e9e4d18b8c 100644 --- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c +++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c | |||
@@ -28,7 +28,7 @@ | |||
28 | /* Common functions across OMAP2 and OMAP3 */ | 28 | /* Common functions across OMAP2 and OMAP3 */ |
29 | static int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) | 29 | static int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) |
30 | { | 30 | { |
31 | prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, | 31 | omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, |
32 | (pwrst << OMAP_POWERSTATE_SHIFT), | 32 | (pwrst << OMAP_POWERSTATE_SHIFT), |
33 | pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); | 33 | pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); |
34 | return 0; | 34 | return 0; |
@@ -36,14 +36,16 @@ static int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) | |||
36 | 36 | ||
37 | static int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) | 37 | static int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) |
38 | { | 38 | { |
39 | return prm_read_mod_bits_shift(pwrdm->prcm_offs, | 39 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, |
40 | OMAP2_PM_PWSTCTRL, OMAP_POWERSTATE_MASK); | 40 | OMAP2_PM_PWSTCTRL, |
41 | OMAP_POWERSTATE_MASK); | ||
41 | } | 42 | } |
42 | 43 | ||
43 | static int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm) | 44 | static int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm) |
44 | { | 45 | { |
45 | return prm_read_mod_bits_shift(pwrdm->prcm_offs, | 46 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, |
46 | OMAP2_PM_PWSTST, OMAP_POWERSTATEST_MASK); | 47 | OMAP2_PM_PWSTST, |
48 | OMAP_POWERSTATEST_MASK); | ||
47 | } | 49 | } |
48 | 50 | ||
49 | static int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, | 51 | static int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, |
@@ -53,8 +55,8 @@ static int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, | |||
53 | 55 | ||
54 | m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); | 56 | m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); |
55 | 57 | ||
56 | prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, | 58 | omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, |
57 | OMAP2_PM_PWSTCTRL); | 59 | OMAP2_PM_PWSTCTRL); |
58 | 60 | ||
59 | return 0; | 61 | return 0; |
60 | } | 62 | } |
@@ -66,8 +68,8 @@ static int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, | |||
66 | 68 | ||
67 | m = omap2_pwrdm_get_mem_bank_retst_mask(bank); | 69 | m = omap2_pwrdm_get_mem_bank_retst_mask(bank); |
68 | 70 | ||
69 | prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, | 71 | omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, |
70 | OMAP2_PM_PWSTCTRL); | 72 | OMAP2_PM_PWSTCTRL); |
71 | 73 | ||
72 | return 0; | 74 | return 0; |
73 | } | 75 | } |
@@ -78,7 +80,8 @@ static int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) | |||
78 | 80 | ||
79 | m = omap2_pwrdm_get_mem_bank_stst_mask(bank); | 81 | m = omap2_pwrdm_get_mem_bank_stst_mask(bank); |
80 | 82 | ||
81 | return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST, m); | 83 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST, |
84 | m); | ||
82 | } | 85 | } |
83 | 86 | ||
84 | static int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) | 87 | static int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) |
@@ -87,7 +90,8 @@ static int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) | |||
87 | 90 | ||
88 | m = omap2_pwrdm_get_mem_bank_retst_mask(bank); | 91 | m = omap2_pwrdm_get_mem_bank_retst_mask(bank); |
89 | 92 | ||
90 | return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL, m); | 93 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, |
94 | OMAP2_PM_PWSTCTRL, m); | ||
91 | } | 95 | } |
92 | 96 | ||
93 | static int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) | 97 | static int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) |
@@ -95,8 +99,8 @@ static int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) | |||
95 | u32 v; | 99 | u32 v; |
96 | 100 | ||
97 | v = pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE_MASK); | 101 | v = pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE_MASK); |
98 | prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v, | 102 | omap2_prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v, |
99 | pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); | 103 | pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); |
100 | 104 | ||
101 | return 0; | 105 | return 0; |
102 | } | 106 | } |
@@ -112,7 +116,7 @@ static int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm) | |||
112 | */ | 116 | */ |
113 | 117 | ||
114 | /* XXX Is this udelay() value meaningful? */ | 118 | /* XXX Is this udelay() value meaningful? */ |
115 | while ((prm_read_mod_reg(pwrdm->prcm_offs, OMAP2_PM_PWSTST) & | 119 | while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP2_PM_PWSTST) & |
116 | OMAP_INTRANSITION_MASK) && | 120 | OMAP_INTRANSITION_MASK) && |
117 | (c++ < PWRDM_TRANSITION_BAILOUT)) | 121 | (c++ < PWRDM_TRANSITION_BAILOUT)) |
118 | udelay(1); | 122 | udelay(1); |
@@ -131,26 +135,30 @@ static int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm) | |||
131 | /* Applicable only for OMAP3. Not supported on OMAP2 */ | 135 | /* Applicable only for OMAP3. Not supported on OMAP2 */ |
132 | static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) | 136 | static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) |
133 | { | 137 | { |
134 | return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST, | 138 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, |
135 | OMAP3430_LASTPOWERSTATEENTERED_MASK); | 139 | OMAP3430_PM_PREPWSTST, |
140 | OMAP3430_LASTPOWERSTATEENTERED_MASK); | ||
136 | } | 141 | } |
137 | 142 | ||
138 | static int omap3_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) | 143 | static int omap3_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) |
139 | { | 144 | { |
140 | return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST, | 145 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, |
141 | OMAP3430_LOGICSTATEST_MASK); | 146 | OMAP2_PM_PWSTST, |
147 | OMAP3430_LOGICSTATEST_MASK); | ||
142 | } | 148 | } |
143 | 149 | ||
144 | static int omap3_pwrdm_read_logic_retst(struct powerdomain *pwrdm) | 150 | static int omap3_pwrdm_read_logic_retst(struct powerdomain *pwrdm) |
145 | { | 151 | { |
146 | return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL, | 152 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, |
147 | OMAP3430_LOGICSTATEST_MASK); | 153 | OMAP2_PM_PWSTCTRL, |
154 | OMAP3430_LOGICSTATEST_MASK); | ||
148 | } | 155 | } |
149 | 156 | ||
150 | static int omap3_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) | 157 | static int omap3_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) |
151 | { | 158 | { |
152 | return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST, | 159 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, |
153 | OMAP3430_LASTLOGICSTATEENTERED_MASK); | 160 | OMAP3430_PM_PREPWSTST, |
161 | OMAP3430_LASTLOGICSTATEENTERED_MASK); | ||
154 | } | 162 | } |
155 | 163 | ||
156 | static int omap3_get_mem_bank_lastmemst_mask(u8 bank) | 164 | static int omap3_get_mem_bank_lastmemst_mask(u8 bank) |
@@ -177,26 +185,28 @@ static int omap3_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) | |||
177 | 185 | ||
178 | m = omap3_get_mem_bank_lastmemst_mask(bank); | 186 | m = omap3_get_mem_bank_lastmemst_mask(bank); |
179 | 187 | ||
180 | return prm_read_mod_bits_shift(pwrdm->prcm_offs, | 188 | return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, |
181 | OMAP3430_PM_PREPWSTST, m); | 189 | OMAP3430_PM_PREPWSTST, m); |
182 | } | 190 | } |
183 | 191 | ||
184 | static int omap3_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) | 192 | static int omap3_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) |
185 | { | 193 | { |
186 | prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST); | 194 | omap2_prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST); |
187 | return 0; | 195 | return 0; |
188 | } | 196 | } |
189 | 197 | ||
190 | static int omap3_pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm) | 198 | static int omap3_pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm) |
191 | { | 199 | { |
192 | return prm_rmw_mod_reg_bits(0, 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, | 200 | return omap2_prm_rmw_mod_reg_bits(0, |
193 | pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); | 201 | 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, |
202 | pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); | ||
194 | } | 203 | } |
195 | 204 | ||
196 | static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) | 205 | static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) |
197 | { | 206 | { |
198 | return prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, 0, | 207 | return omap2_prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, |
199 | pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); | 208 | 0, pwrdm->prcm_offs, |
209 | OMAP2_PM_PWSTCTRL); | ||
200 | } | 210 | } |
201 | 211 | ||
202 | struct pwrdm_ops omap2_pwrdm_operations = { | 212 | struct pwrdm_ops omap2_pwrdm_operations = { |