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authorPaul Walmsley <paul@pwsan.com>2010-12-21 23:05:16 -0500
committerPaul Walmsley <paul@pwsan.com>2010-12-21 23:05:16 -0500
commit72e06d087204f3bc9acf281717b90ebf0b9731f7 (patch)
tree358524d58e5fdb906507ffc9549758c14fce9fbe /arch/arm/mach-omap2/pm34xx.c
parent1540f214065982e6cbc6b8da1fe65a15e358f7c5 (diff)
OMAP2+: powerdomain: move header file from plat-omap to mach-omap2
The OMAP powerdomain code and data is all OMAP2+-specific. This seems unlikely to change any time soon. Move plat-omap/include/plat/powerdomain.h to mach-omap2/powerdomain.h. The primary point of doing this is to remove the temptation for unrelated upper-layer code to access powerdomain code and data directly. As part of this process, remove the references to powerdomain data from the GPIO "driver" and the OMAP PM no-op layer, both in plat-omap. Change the DSPBridge code to point to the new location for the powerdomain headers. The DSPBridge code should not be including the powerdomain headers; these should be removed. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Felipe Contreras <felipe.contreras@gmail.com> Cc: Greg Kroah-Hartman <greg@kroah.com>
Diffstat (limited to 'arch/arm/mach-omap2/pm34xx.c')
-rw-r--r--arch/arm/mach-omap2/pm34xx.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 0fae3d6b76e8..5efd1fb8c640 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -32,7 +32,7 @@
32 32
33#include <plat/sram.h> 33#include <plat/sram.h>
34#include "clockdomain.h" 34#include "clockdomain.h"
35#include <plat/powerdomain.h> 35#include "powerdomain.h"
36#include <plat/serial.h> 36#include <plat/serial.h>
37#include <plat/sdrc.h> 37#include <plat/sdrc.h>
38#include <plat/prcm.h> 38#include <plat/prcm.h>
@@ -360,6 +360,7 @@ void omap_sram_idle(void)
360 int mpu_next_state = PWRDM_POWER_ON; 360 int mpu_next_state = PWRDM_POWER_ON;
361 int per_next_state = PWRDM_POWER_ON; 361 int per_next_state = PWRDM_POWER_ON;
362 int core_next_state = PWRDM_POWER_ON; 362 int core_next_state = PWRDM_POWER_ON;
363 int per_going_off;
363 int core_prev_state, per_prev_state; 364 int core_prev_state, per_prev_state;
364 u32 sdrc_pwr = 0; 365 u32 sdrc_pwr = 0;
365 366
@@ -411,9 +412,10 @@ void omap_sram_idle(void)
411 412
412 /* PER */ 413 /* PER */
413 if (per_next_state < PWRDM_POWER_ON) { 414 if (per_next_state < PWRDM_POWER_ON) {
415 per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
414 omap_uart_prepare_idle(2); 416 omap_uart_prepare_idle(2);
415 omap_uart_prepare_idle(3); 417 omap_uart_prepare_idle(3);
416 omap2_gpio_prepare_for_idle(per_next_state); 418 omap2_gpio_prepare_for_idle(per_going_off);
417 if (per_next_state == PWRDM_POWER_OFF) 419 if (per_next_state == PWRDM_POWER_OFF)
418 omap3_per_save_context(); 420 omap3_per_save_context();
419 } 421 }